From ff1939dda9e494d9d0ffac8b3d62137cb82903a6 Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Thu, 3 May 2018 12:44:12 +0800 Subject: [PATCH] MLK-18180 ARM64: dts: correct the pad configurations of pcie The correct default should be 0x04000021. In which we have the open drain input option for field [25:26] with a pull up resistor and low drive strength. This will allow the end point device to drive low the wake and clkreq signals when necessary and don't have the PCIe driving back to the endpoint device. Signed-off-by: Richard Zhu (cherry picked from commit 2d3e439c1b32d78807bfc74dfc90f62aa897a709) --- .../boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts | 12 ++++++------ arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dts | 10 +++++----- .../boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts | 6 +++--- arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts | 6 +++--- 4 files changed, 17 insertions(+), 17 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts index 5d3b89463054..42f1908e219c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts @@ -529,17 +529,17 @@ pinctrl_pciea: pcieagrp{ fsl,pins = < - SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x00000021 - SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x00000021 - SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x00000021 + SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x04000021 + SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x04000021 + SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x04000021 >; }; pinctrl_pcieb: pciebgrp{ fsl,pins = < - SC_P_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_IO30 0x00000021 - SC_P_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO31 0x00000021 - SC_P_PCIE_CTRL1_PERST_B_LSIO_GPIO5_IO00 0x00000021 + SC_P_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_IO30 0x04000021 + SC_P_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO31 0x04000021 + SC_P_PCIE_CTRL1_PERST_B_LSIO_GPIO5_IO00 0x04000021 >; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dts index abd13be4d4c1..502561139cb5 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dts @@ -419,11 +419,11 @@ pinctrl_pciea: pcieagrp{ fsl,pins = < - SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x00000021 - SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x00000021 - SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x00000021 - SC_P_LVDS1_I2C0_SDA_LVDS1_GPIO0_IO03 0x00000021 - SC_P_USDHC2_RESET_B_LSIO_GPIO4_IO09 0x00000021 + SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x04000021 + SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x04000021 + SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x04000021 + SC_P_LVDS1_I2C0_SDA_LVDS1_GPIO0_IO03 0x04000021 + SC_P_USDHC2_RESET_B_LSIO_GPIO4_IO09 0x04000021 >; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts index 07cf13d2f88a..0419a4a5d801 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts @@ -440,9 +440,9 @@ pinctrl_pcieb: pciebgrp{ fsl,pins = < - SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x06000021 - SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x06000021 - SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x06000021 + SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x04000021 + SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000021 + SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000021 >; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts index f842ef07c8b5..e66c55ed0d3a 100755 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts @@ -504,9 +504,9 @@ pinctrl_pcieb: pcieagrp{ fsl,pins = < - SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x06000021 - SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x06000021 - SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x06000021 + SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x04000021 + SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000021 + SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000021 >; }; -- 2.17.1