From f33b53553ec20a3c2d6300ca47c2087d9a2420d4 Mon Sep 17 00:00:00 2001 From: Liu Ying Date: Tue, 3 Dec 2019 20:17:43 +0800 Subject: [PATCH] LF-95-1 arm64: imx8qm-ss-lvds.dtsi: Correct LVDS region address and size The LVDS region is the CSR(Control Status Registers) space. The spec tells us that the CSR start address is 0x1000 and end address is 0x1FFF according to the subsystem start address. However, it turns out some space are inaccessible, which would accidently cause system hang via kernel regmap debugfs. This patch corrects the LVDS region start address and chooses a sensible size, which makes sure all exposed registers are accessible. Reviewed-by: Sandor Yu Signed-off-by: Liu Ying --- arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi index 1fe9afa12e03..b375bcf99f97 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi @@ -78,9 +78,9 @@ power-domains = <&pd IMX_SC_R_LVDS_0>; }; - lvds0_region: lvds_region@56240000 { + lvds0_region: lvds_region@56241000 { compatible = "syscon"; - reg = <0x56240000 0x10000>; + reg = <0x56241000 0xf0>; }; ldb1_phy: ldb_phy@56241000 { @@ -244,9 +244,9 @@ power-domains = <&pd IMX_SC_R_LVDS_1>; }; - lvds1_region: lvds_region@57240000 { + lvds1_region: lvds_region@57241000 { compatible = "syscon"; - reg = <0x57240000 0x10000>; + reg = <0x57241000 0xf0>; }; ldb2_phy: ldb_phy@57241000 { -- 2.17.1