From e59bb7be47af31d293d6f94d2fad11188d2ba0e7 Mon Sep 17 00:00:00 2001 From: Takeshi Kihara Date: Wed, 25 Jul 2018 21:14:17 +0200 Subject: [PATCH] clk: renesas: r8a77965: Add SATA clock This patch adds SATA clock to the R8A77965 SoC. Signed-off-by: Takeshi Kihara [wsa: rebased to upstream base] Signed-off-by: Wolfram Sang Reviewed-by: Simon Horman Signed-off-by: Geert Uytterhoeven --- drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c index c596e2afaeeb..312f9fe738e3 100644 --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c @@ -193,6 +193,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { DEF_MOD("vin1", 810, R8A77965_CLK_S0D2), DEF_MOD("vin0", 811, R8A77965_CLK_S0D2), DEF_MOD("etheravb", 812, R8A77965_CLK_S0D6), + DEF_MOD("sata0", 815, R8A77965_CLK_S3D2), DEF_MOD("imr1", 822, R8A77965_CLK_S0D2), DEF_MOD("imr0", 823, R8A77965_CLK_S0D2), -- 2.17.1