From e0e8ef98a750ba381cb87a6d5365d85b412ec8c6 Mon Sep 17 00:00:00 2001 From: Bai Ping Date: Wed, 12 Aug 2015 21:55:08 +0800 Subject: [PATCH] MLK-11343-02 cpufreq: imx: add more clk used by cpufreq This patch adds pll1, pll_bypass and pll1_bypass_src that will be used in ARM clock switching code. Signed-off-by: Bai Ping --- drivers/cpufreq/imx6q-cpufreq.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c index a0230c67533b..6338f507e3a0 100644 --- a/drivers/cpufreq/imx6q-cpufreq.c +++ b/drivers/cpufreq/imx6q-cpufreq.c @@ -31,6 +31,9 @@ static struct clk *step_clk; static struct clk *pll2_pfd2_396m_clk; /* clk used by i.MX6UL */ +static struct clk *pll1_bypass; +static struct clk *pll1_bypass_src; +static struct clk *pll1; static struct clk *pll2_bus_clk; static struct clk *secondary_sel_clk; @@ -203,8 +206,12 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) pll1_sw_clk = devm_clk_get(cpu_dev, "pll1_sw"); step_clk = devm_clk_get(cpu_dev, "step"); pll2_pfd2_396m_clk = devm_clk_get(cpu_dev, "pll2_pfd2_396m"); + pll1 = devm_clk_get(cpu_dev, "pll1"); + pll1_bypass = devm_clk_get(cpu_dev, "pll1_bypass"); + pll1_bypass_src = devm_clk_get(cpu_dev, "pll1_bypass_src"); if (IS_ERR(arm_clk) || IS_ERR(pll1_sys_clk) || IS_ERR(pll1_sw_clk) || - IS_ERR(step_clk) || IS_ERR(pll2_pfd2_396m_clk)) { + IS_ERR(step_clk) || IS_ERR(pll2_pfd2_396m_clk) || IS_ERR(pll1) || + IS_ERR(pll1_bypass) || IS_ERR(pll1_bypass_src)) { dev_err(cpu_dev, "failed to get clocks\n"); ret = -ENOENT; goto put_node; -- 2.17.1