From ddc6076928ad160e9638c200ee78caa2601e6e6d Mon Sep 17 00:00:00 2001 From: Ye Li Date: Fri, 6 Sep 2019 01:21:00 -0700 Subject: [PATCH] MLK-22622 imx8m: Add Workaround for ROM SError issue ROM SError happens on two cases: 1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but when ROM patch lock is fused, this write will cause SError. 2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB is field return mode, but the last 4K of ROM is still protected and cause SError. Since ROM mask SError until ATF unmask it, so then ATF always meets the exception. This patch works around the issue in SPL by enabling SPL Exception vectors table and the SError exception, take the exception to eret immediately to clear the SError. Signed-off-by: Ye Li Reviewed-by: Peng Fan (cherry picked from commit f05dd45251ca82cc54e13a616f00744c26faab53) (cherry picked from commit 25d059411e702a4002f1aa157839001f796dd9f6) --- arch/arm/mach-imx/imx8m/Kconfig | 1 + arch/arm/mach-imx/imx8m/soc.c | 35 +++++++++++++++++++++++++++++++++ arch/arm/mach-imx/lowlevel.S | 11 +++++++++++ 3 files changed, 47 insertions(+) diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 9a4c252871..a970127fd8 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -4,6 +4,7 @@ config IMX8M bool select HAS_CAAM select ROM_UNIFIED_SECTIONS + select ARMV8_SPL_EXCEPTION_VECTORS config SYS_SOC default "imx8m" diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 7bf8aacf65..668498a77d 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -25,6 +25,7 @@ #include #endif #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -906,6 +907,40 @@ void nxp_tmu_arch_init(void *reg_base) } } +#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_IMX8MQ) || defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN) +bool serror_need_skip = true; +void do_error(struct pt_regs *pt_regs, unsigned int esr) +{ + /* If stack is still in ROM reserved OCRAM not switch to SPL, it is the ROM SError */ + ulong sp; + asm volatile("mov %0, sp" : "=r"(sp) : ); + + if (serror_need_skip && + sp < 0x910000 && sp >= 0x900000) { + + /* Check for ERR050342, imx8mq HDCP enabled parts */ + if (is_imx8mq() && !(readl(OCOTP_BASE_ADDR + 0x450) & 0x08000000)) { + serror_need_skip = false; + return; /* Do nothing skip the SError in ROM */ + } + + /* Check for ERR050350, field return mode for imx8mq, mm and mn */ + if (readl(OCOTP_BASE_ADDR + 0x630) & 0x1) { + serror_need_skip = false; + return; /* Do nothing skip the SError in ROM */ + } + } + + efi_restore_gd(); + printf("\"Error\" handler, esr 0x%08x\n", esr); + show_regs(pt_regs); + panic("Resetting CPU ...\n"); + +} +#endif +#endif + #if defined(CONFIG_IMX8MN) enum env_location env_get_location(enum env_operation op, int prio) { diff --git a/arch/arm/mach-imx/lowlevel.S b/arch/arm/mach-imx/lowlevel.S index 158fdb7d87..2cb2d056a9 100644 --- a/arch/arm/mach-imx/lowlevel.S +++ b/arch/arm/mach-imx/lowlevel.S @@ -6,6 +6,16 @@ #include ENTRY(lowlevel_init) +#ifdef CONFIG_SPL_BUILD + mrs x0, CurrentEL + cmp x0, #12 + b.eq 1f + ret +1: + msr daifclr, #4 + isb + ret +#else mrs x0, CurrentEL cmp x0, #8 b.eq 1f @@ -19,4 +29,5 @@ ENTRY(lowlevel_init) msr hcr_el2, x0 isb ret +#endif ENDPROC(lowlevel_init) -- 2.17.1