From d94dccce78ca9dec46590ccd76cfdbaa0562bd3c Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Fri, 29 Nov 2019 18:13:03 +0800 Subject: [PATCH] LF-261: arm64: dts: imx8mq: Set parent clock for IMX8MQ_CLK_AUDIO_AHB Set parent clock for IMX8MQ_CLK_AUDIO_AHB, and move setting IMX8MQ_AUDIO_PLL1 and IMX8MQ_AUDIO_PLL2 rate to a common place. Signed-off-by: Shengjiu Wang Reviewed-by: Viorel Suman --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index fc2600fd880e..a639d5203d86 100755 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -641,12 +641,19 @@ assigned-clocks = <&clk IMX8MQ_CLK_A53_SRC>, <&clk IMX8MQ_CLK_A53_CORE>, <&clk IMX8MQ_CLK_NAND_USDHC_BUS>, - <&clk IMX8MQ_CLK_NOC>; - assigned-clock-rates = <0>, <0>, <0>, - <800000000>; + <&clk IMX8MQ_CLK_NOC>, + <&clk IMX8MQ_CLK_AUDIO_AHB>, + <&clk IMX8MQ_AUDIO_PLL1>, + <&clk IMX8MQ_AUDIO_PLL2>; + assigned-clock-rates = <0>, <0>, <266000000>, + <800000000>, <0>, + <786432000>, + <722534400>; assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, <&clk IMX8MQ_ARM_PLL_OUT>, - <&clk IMX8MQ_SYS1_PLL_266M>; + <0>, + <0>, + <&clk IMX8MQ_SYS2_PLL_500M>; }; src: reset-controller@30390000 { -- 2.17.1