From d0b647238dd048446381c2c82c76a8fec4fbd7f5 Mon Sep 17 00:00:00 2001 From: Bai Ping Date: Mon, 31 Jul 2017 10:43:28 +0800 Subject: [PATCH] MLK-16102 driver: clk: fix clock source sels for gpu ahb on i.mx8mq One of the GPU clock source should be from 'gpu_pll_out', not gpu_pll'. Signed-off-by: Bai Ping --- drivers/clk/imx/clk-imx8mq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c index cfdba90232d2..9075916ff660 100644 --- a/drivers/clk/imx/clk-imx8mq.c +++ b/drivers/clk/imx/clk-imx8mq.c @@ -92,7 +92,7 @@ static const char *imx8mq_usb_bus_sels[] = {"osc_25m", "sys2_pll_500m", "sys1_pl static const char *imx8mq_gpu_axi_sels[] = {"osc_25m", "sys1_pll_800m", "gpu_pll_out", "sys3_pll2_out", "sys2_pll_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", }; -static const char *imx8mq_gpu_ahb_sels[] = {"osc_25m", "sys1_pll_800m", "gpu_pll", "sys3_pll2_out", "sys2_pll_1000m", +static const char *imx8mq_gpu_ahb_sels[] = {"osc_25m", "sys1_pll_800m", "gpu_pll_out", "sys3_pll2_out", "sys2_pll_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", }; static const char *imx8mq_noc_sels[] = {"osc_25m", "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_1000m", "sys2_pll_500m", -- 2.17.1