From cb3eabdb56173a75495717bf88fbc1d04623f6d7 Mon Sep 17 00:00:00 2001 From: Adrian Alonso Date: Tue, 8 Mar 2016 14:53:31 -0600 Subject: [PATCH] MLK-14938-21 mxc_gpio: add support for i.MX8 Add support for iMX8 SoC platforms, and extend to support LSIO GPIO0..GPIO7 ports. Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX platforms, so we have to adjust the index accordingly. Signed-off-by: Adrian Alonso Signed-off-by: Ye Li --- arch/arm/include/asm/arch-imx8/gpio.h | 22 ++++++++++++++ drivers/gpio/mxc_gpio.c | 41 +++++++++++++++++++++------ 2 files changed, 54 insertions(+), 9 deletions(-) create mode 100644 arch/arm/include/asm/arch-imx8/gpio.h diff --git a/arch/arm/include/asm/arch-imx8/gpio.h b/arch/arm/include/asm/arch-imx8/gpio.h new file mode 100644 index 0000000000..51aa9e862f --- /dev/null +++ b/arch/arm/include/asm/arch-imx8/gpio.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2017 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARCH_IMX8_GPIO_H +#define __ASM_ARCH_IMX8_GPIO_H + +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +/* GPIO registers */ +struct gpio_regs { + u32 gpio_dr; /* data */ + u32 gpio_dir; /* direction */ + u32 gpio_psr; /* pad satus */ +}; +#endif + +/* IMX8 the GPIO index is from 0 not 1 */ +#define IMX_GPIO_NR(port, index) (((port)*32)+((index)&31)) + +#endif /* __ASM_ARCH_IMX8_GPIO_H */ diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index 3631803a96..a2f9192c11 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -6,6 +6,7 @@ * Stefano Babic, DENX Software Engineering, * * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP * * SPDX-License-Identifier: GPL-2.0+ */ @@ -39,7 +40,11 @@ struct mxc_bank_info { }; #ifndef CONFIG_DM_GPIO +#if defined(CONFIG_IMX8) +#define GPIO_TO_PORT(n) ((n / 32) - 1) +#else #define GPIO_TO_PORT(n) (n / 32) +#endif /* GPIO port description */ static unsigned long gpio_ports[] = { @@ -48,21 +53,25 @@ static unsigned long gpio_ports[] = { [2] = GPIO3_BASE_ADDR, #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ - defined(CONFIG_MX7) + defined(CONFIG_MX7) || defined(CONFIG_IMX8) [3] = GPIO4_BASE_ADDR, #endif #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ - defined(CONFIG_MX7) + defined(CONFIG_MX7) || defined(CONFIG_IMX8) [4] = GPIO5_BASE_ADDR, #ifndef CONFIG_MX6UL [5] = GPIO6_BASE_ADDR, #endif #endif -#if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_MX7) +#if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ + defined(CONFIG_IMX8) #ifndef CONFIG_MX6UL [6] = GPIO7_BASE_ADDR, #endif #endif +#if defined(CONFIG_IMX8) + [7] = GPIO8_BASE_ADDR, +#endif }; #ifdef CONFIG_IMX_RDC @@ -330,7 +339,11 @@ static int mxc_gpio_probe(struct udevice *dev) char name[18], *str; banknum = plat->bank_index; +#if defined(CONFIG_IMX8) + sprintf(name, "GPIO%d_", banknum); +#else sprintf(name, "GPIO%d_", banknum + 1); +#endif str = strdup(name); if (!str) return -ENOMEM; @@ -397,16 +410,21 @@ static const struct mxc_gpio_plat mxc_plat[] = { { 1, (struct gpio_regs *)GPIO2_BASE_ADDR }, { 2, (struct gpio_regs *)GPIO3_BASE_ADDR }, #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ - defined(CONFIG_MX53) || defined(CONFIG_MX6) + defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ + defined(CONFIG_IMX8) { 3, (struct gpio_regs *)GPIO4_BASE_ADDR }, #endif -#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) +#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ + defined(CONFIG_IMX8) { 4, (struct gpio_regs *)GPIO5_BASE_ADDR }, { 5, (struct gpio_regs *)GPIO6_BASE_ADDR }, #endif -#if defined(CONFIG_MX53) || defined(CONFIG_MX6) +#if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_IMX8) { 6, (struct gpio_regs *)GPIO7_BASE_ADDR }, #endif +#if defined(CONFIG_IMX8) + { 7, (struct gpio_regs *)GPIO8_BASE_ADDR }, +#endif }; U_BOOT_DEVICES(mxc_gpios) = { @@ -414,16 +432,21 @@ U_BOOT_DEVICES(mxc_gpios) = { { "gpio_mxc", &mxc_plat[1] }, { "gpio_mxc", &mxc_plat[2] }, #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ - defined(CONFIG_MX53) || defined(CONFIG_MX6) + defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ + defined(CONFIG_IMX8) { "gpio_mxc", &mxc_plat[3] }, #endif -#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) +#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ + defined(CONFIG_IMX8) { "gpio_mxc", &mxc_plat[4] }, { "gpio_mxc", &mxc_plat[5] }, #endif -#if defined(CONFIG_MX53) || defined(CONFIG_MX6) +#if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_IMX8) { "gpio_mxc", &mxc_plat[6] }, #endif +#if defined(CONFIG_IMX8) + { "gpio_mxc", &mxc_plat[7] }, +#endif }; #endif #endif -- 2.17.1