From beab43bbdd8937a1383dabe3d9b547c370e66967 Mon Sep 17 00:00:00 2001 From: Han Xu Date: Wed, 5 May 2021 21:37:27 -0500 Subject: [PATCH] MLK-25382: arm64: dts: fix the wrong pinctrl pad settings for lpspi Correct the pad settings, the bit 2,3 should be reserved. Signed-off-by: Han Xu Reviewed-by: Clark Wang --- arch/arm64/boot/dts/freescale/imx8dxl-ddr3-evk.dts | 8 ++++---- .../boot/dts/freescale/imx8dxl-evk-lpspi-slave.dts | 8 ++++---- arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 8 ++++---- .../freescale/imx8qm-lpddr4-val-lpspi-slave.dts | 8 ++++---- .../boot/dts/freescale/imx8qm-lpddr4-val-lpspi.dts | 14 +++++++------- arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 6 +++--- .../freescale/imx8qxp-lpddr4-val-lpspi-slave.dts | 8 ++++---- .../dts/freescale/imx8qxp-lpddr4-val-lpspi.dts | 14 +++++++------- 8 files changed, 37 insertions(+), 37 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ddr3-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-ddr3-evk.dts index cec254895560..28d7afca870a 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-ddr3-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ddr3-evk.dts @@ -781,10 +781,10 @@ pinctrl_lpspi3: lpspi3grp { fsl,pins = < - IMX8DXL_SPI3_SCK_ADMA_SPI3_SCK 0x600004c - IMX8DXL_SPI3_SDO_ADMA_SPI3_SDO 0x600004c - IMX8DXL_SPI3_SDI_ADMA_SPI3_SDI 0x600004c - IMX8DXL_SPI3_CS1_ADMA_SPI3_CS1 0x600004c + IMX8DXL_SPI3_SCK_ADMA_SPI3_SCK 0x6000040 + IMX8DXL_SPI3_SDO_ADMA_SPI3_SDO 0x6000040 + IMX8DXL_SPI3_SDI_ADMA_SPI3_SDI 0x6000040 + IMX8DXL_SPI3_CS1_ADMA_SPI3_CS1 0x6000040 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk-lpspi-slave.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk-lpspi-slave.dts index d5689b172683..a8592534241e 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-evk-lpspi-slave.dts +++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk-lpspi-slave.dts @@ -9,10 +9,10 @@ &pinctrl_lpspi3 { fsl,pins = < - IMX8DXL_SPI3_SCK_ADMA_SPI3_SCK 0x600004c - IMX8DXL_SPI3_SDO_ADMA_SPI3_SDO 0x600004c - IMX8DXL_SPI3_SDI_ADMA_SPI3_SDI 0x600004c - IMX8DXL_SPI3_CS1_ADMA_SPI3_CS1 0x600004c + IMX8DXL_SPI3_SCK_ADMA_SPI3_SCK 0x6000040 + IMX8DXL_SPI3_SDO_ADMA_SPI3_SDO 0x6000040 + IMX8DXL_SPI3_SDI_ADMA_SPI3_SDI 0x6000040 + IMX8DXL_SPI3_CS1_ADMA_SPI3_CS1 0x6000040 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts index e06bbe62b566..819213e232c1 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts @@ -840,10 +840,10 @@ pinctrl_lpspi3: lpspi3grp { fsl,pins = < - IMX8DXL_SPI3_SCK_ADMA_SPI3_SCK 0x600004c - IMX8DXL_SPI3_SDO_ADMA_SPI3_SDO 0x600004c - IMX8DXL_SPI3_SDI_ADMA_SPI3_SDI 0x600004c - IMX8DXL_SPI3_CS1_ADMA_SPI3_CS1 0x600004c + IMX8DXL_SPI3_SCK_ADMA_SPI3_SCK 0x6000040 + IMX8DXL_SPI3_SDO_ADMA_SPI3_SDO 0x6000040 + IMX8DXL_SPI3_SDI_ADMA_SPI3_SDI 0x6000040 + IMX8DXL_SPI3_CS1_ADMA_SPI3_CS1 0x6000040 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-lpspi-slave.dts b/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-lpspi-slave.dts index 302cc251e3df..9df779efd670 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-lpspi-slave.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-lpspi-slave.dts @@ -9,10 +9,10 @@ &pinctrl_lpspi3 { fsl,pins = < - IMX8QM_SPI3_SCK_DMA_SPI3_SCK 0x600004c - IMX8QM_SPI3_SDO_DMA_SPI3_SDO 0x600004c - IMX8QM_SPI3_SDI_DMA_SPI3_SDI 0x600004c - IMX8QM_SPI3_CS0_DMA_SPI3_CS0 0x600004c + IMX8QM_SPI3_SCK_DMA_SPI3_SCK 0x6000040 + IMX8QM_SPI3_SDO_DMA_SPI3_SDO 0x6000040 + IMX8QM_SPI3_SDI_DMA_SPI3_SDI 0x6000040 + IMX8QM_SPI3_CS0_DMA_SPI3_CS0 0x6000040 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-lpspi.dts b/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-lpspi.dts index da0682d0eaab..187040bc6c31 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-lpspi.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-lpspi.dts @@ -8,9 +8,9 @@ &iomuxc { pinctrl_lpspi0: lpspi0grp { fsl,pins = < - IMX8QM_SPI0_SCK_DMA_SPI0_SCK 0x600004c - IMX8QM_SPI0_SDO_DMA_SPI0_SDO 0x600004c - IMX8QM_SPI0_SDI_DMA_SPI0_SDI 0x600004c + IMX8QM_SPI0_SCK_DMA_SPI0_SCK 0x6000040 + IMX8QM_SPI0_SDO_DMA_SPI0_SDO 0x6000040 + IMX8QM_SPI0_SDI_DMA_SPI0_SDI 0x6000040 >; }; @@ -22,10 +22,10 @@ pinctrl_lpspi3: lpspi3grp { fsl,pins = < - IMX8QM_SPI3_SCK_DMA_SPI3_SCK 0x600004c - IMX8QM_SPI3_SDO_DMA_SPI3_SDO 0x600004c - IMX8QM_SPI3_SDI_DMA_SPI3_SDI 0x600004c - IMX8QM_SPI3_CS0_DMA_SPI3_CS0 0x600004c + IMX8QM_SPI3_SCK_DMA_SPI3_SCK 0x6000040 + IMX8QM_SPI3_SDO_DMA_SPI3_SDO 0x6000040 + IMX8QM_SPI3_SDI_DMA_SPI3_SDI 0x6000040 + IMX8QM_SPI3_CS0_DMA_SPI3_CS0 0x6000040 >; }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts index a3b01417638a..2b49c8cab421 100755 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -1538,9 +1538,9 @@ pinctrl_lpspi2: lpspi2grp { fsl,pins = < - IMX8QM_SPI2_SCK_DMA_SPI2_SCK 0x0600004c - IMX8QM_SPI2_SDO_DMA_SPI2_SDO 0x0600004c - IMX8QM_SPI2_SDI_DMA_SPI2_SDI 0x0600004c + IMX8QM_SPI2_SCK_DMA_SPI2_SCK 0x06000040 + IMX8QM_SPI2_SDO_DMA_SPI2_SDO 0x06000040 + IMX8QM_SPI2_SDI_DMA_SPI2_SDI 0x06000040 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-lpspi-slave.dts b/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-lpspi-slave.dts index ef997e2f9361..7bbd5b6d4d85 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-lpspi-slave.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-lpspi-slave.dts @@ -9,10 +9,10 @@ &pinctrl_lpspi2 { fsl,pins = < - IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x600004c - IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x600004c - IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x600004c - IMX8QXP_SPI2_CS0_ADMA_SPI2_CS0 0x600004c + IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x6000040 + IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x6000040 + IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x6000040 + IMX8QXP_SPI2_CS0_ADMA_SPI2_CS0 0x6000040 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-lpspi.dts b/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-lpspi.dts index bc4535647fc4..c7bfeae30ac7 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-lpspi.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-lpddr4-val-lpspi.dts @@ -8,9 +8,9 @@ &iomuxc { pinctrl_lpspi0: lpspi0grp { fsl,pins = < - IMX8QXP_SPI0_SCK_ADMA_SPI0_SCK 0x600004c - IMX8QXP_SPI0_SDO_ADMA_SPI0_SDO 0x600004c - IMX8QXP_SPI0_SDI_ADMA_SPI0_SDI 0x600004c + IMX8QXP_SPI0_SCK_ADMA_SPI0_SCK 0x6000040 + IMX8QXP_SPI0_SDO_ADMA_SPI0_SDO 0x6000040 + IMX8QXP_SPI0_SDI_ADMA_SPI0_SDI 0x6000040 >; }; @@ -22,10 +22,10 @@ pinctrl_lpspi2: lpspi2grp { fsl,pins = < - IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x600004c - IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x600004c - IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x600004c - IMX8QXP_SPI2_CS0_ADMA_SPI2_CS0 0x600004c + IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x6000040 + IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x6000040 + IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x6000040 + IMX8QXP_SPI2_CS0_ADMA_SPI2_CS0 0x6000040 >; }; }; -- 2.17.1