From b555657784a6d2e1d93a434984927e954d854f9f Mon Sep 17 00:00:00 2001 From: Sandor Yu Date: Tue, 17 Nov 2015 17:20:51 +0800 Subject: [PATCH] MLK-11859: dts: Fix imx7D mipi csi reset bit error There is a error in i.MX7D RM RevB. Actually the register of SRC_MIPIPHY_RCR(src offset 0x28) bit 1 for MIPI PHY Master Reset bit 2 for MIPI PHY Slave Reset. Signed-off-by: Sandor Yu (cherry picked from commit 4f3128a79c023319c9e21690be866dc46a9d6816) --- arch/arm/boot/dts/imx7d.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index ed0593309472..67348ccae257 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -341,7 +341,7 @@ <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; clock-names = "mipi_clk", "phy_clk"; mipi-phy-supply = <®_1p0d>; - csis-phy-reset = <&src 0x28 1>; + csis-phy-reset = <&src 0x28 2>; bus-width = <4>; status = "disabled"; }; -- 2.17.1