From 9ecda7c84899dfed3a9a50496a3756c2eed363e3 Mon Sep 17 00:00:00 2001 From: Liu Ying Date: Sun, 19 Jan 2020 17:54:22 +0800 Subject: [PATCH] MLK-23252-10 arm64: imx8mp.dtsi: Add LCDIF2 node This patch adds LCDIF2 node support. Reviewed-by: Sandor Yu Signed-off-by: Liu Ying --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 24 +++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 538e4d39b99c..6ce511cd7217 100755 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1116,6 +1116,30 @@ }; }; + lcdif2: lcd-controller@32e90000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx8mp-lcdif2"; + reg = <0x32e90000 0x10000>; + clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + clock-names = "pix", "disp-axi", "disp-apb"; + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>, + <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_APB>; + assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>, + <&clk IMX8MP_SYS_PLL2_1000M>, + <&clk IMX8MP_SYS_PLL1_800M>; + assigned-clock-rates = <1039500000>, <500000000>, <200000000>; + interrupts = ; + status = "disabled"; + + lcdif2_disp: port@0 { + reg = <0>; + }; + }; + mediamix_blk_ctl: blk-ctl@32ec0000 { compatible = "fsl,imx8mp-mediamix-blk-ctl", "syscon"; -- 2.17.1