From 9ad30c8439ece3a8b88040847155405fca40facf Mon Sep 17 00:00:00 2001 From: Ye Li Date: Wed, 13 Dec 2017 00:16:31 -0600 Subject: [PATCH] MLK-17200-1 mx7ulp: Add CPU revision check for B0 Since there is no register for CPU revision, we use ROM version to check the A0 or B0 chip. Signed-off-by: Ye Li Reviewed-by: Peng Fan --- arch/arm/cpu/armv7/mx7ulp/soc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/mx7ulp/soc.c b/arch/arm/cpu/armv7/mx7ulp/soc.c index 888aacc6e8..587835ed46 100644 --- a/arch/arm/cpu/armv7/mx7ulp/soc.c +++ b/arch/arm/cpu/armv7/mx7ulp/soc.c @@ -22,10 +22,14 @@ struct imx_sec_config_fuse_t const imx_sec_config_fuse = { }; #endif +#define ROM_VERSION_ADDR 0x80 u32 get_cpu_rev(void) { - /* Temporally hard code the CPU rev to 0x73, rev 1.0. Fix it later */ - return (MXC_CPU_MX7ULP << 12) | (1 << 4); + /* Check the ROM version for cpu revision */ + uint32_t rom_version; + rom_version = readl((void __iomem *)ROM_VERSION_ADDR); + + return (MXC_CPU_MX7ULP << 12) | (rom_version & 0xFF); } #ifdef CONFIG_REVISION_TAG -- 2.17.1