From 9960cacbaeb1ccc1b2d9840cadb18844d48a337b Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 20 Jun 2020 18:10:10 +0200 Subject: [PATCH] ARM: dts: meson8b: add power domain controller The Meson8b SoCs have a power domain controller which can turn on/off various register areas (such as: Ethernet, VPU, etc.). Add the main "pwrc" controller and configure the Ethernet power domain. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20200620161010.23171-4-martin.blumenstingl@googlemail.com --- arch/arm/boot/dts/meson8b.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index ba36168b9c1b..2069c57343e5 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include "meson.dtsi" @@ -433,6 +434,8 @@ resets = <&reset RESET_ETHERNET>; reset-names = "stmmaceth"; + + power-domains = <&pwrc PWRC_MESON8_ETHERNET_MEM_ID>; }; &gpio_intc { @@ -449,6 +452,30 @@ #clock-cells = <1>; #reset-cells = <1>; }; + + pwrc: power-controller { + compatible = "amlogic,meson8b-pwrc"; + #power-domain-cells = <1>; + amlogic,ao-sysctrl = <&pmu>; + resets = <&reset RESET_DBLK>, + <&reset RESET_PIC_DC>, + <&reset RESET_HDMI_APB>, + <&reset RESET_HDMI_SYSTEM_RESET>, + <&reset RESET_VENCI>, + <&reset RESET_VENCP>, + <&reset RESET_VDAC_4>, + <&reset RESET_VENCL>, + <&reset RESET_VIU>, + <&reset RESET_VENC>, + <&reset RESET_RDMA>; + reset-names = "dblk", "pic_dc", "hdmi_apb", "hdmi_system", + "venci", "vencp", "vdac", "vencl", "viu", + "venc", "rdma"; + clocks = <&clkc CLKID_VPU>; + clock-names = "vpu"; + assigned-clocks = <&clkc CLKID_VPU>; + assigned-clock-rates = <182142857>; + }; }; &hwrng { -- 2.17.1