From 8ef1a9b2f6112384817298196fe5d7960e6af448 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Mon, 20 Jul 2015 16:59:24 +0800 Subject: [PATCH] MLK-11265-9 ARM: imx: add ddrc driver support i.MX7D has a new IP block of DDR controller called DDRC, add driver for this module. Signed-off-by: Anson Huang --- arch/arm/mach-imx/Kconfig | 4 ++ arch/arm/mach-imx/Makefile | 1 + arch/arm/mach-imx/common.h | 2 +- arch/arm/mach-imx/ddrc.c | 86 ++++++++++++++++++++++++++++++++++++++ arch/arm/mach-imx/mxc.h | 2 + 5 files changed, 94 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-imx/ddrc.c diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 9155b639c9aa..b33af656d0bb 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -54,6 +54,9 @@ config HAVE_IMX_GPC config HAVE_IMX_MMDC bool +config HAVE_IMX_DDRC + bool + config HAVE_IMX_SRC def_bool y if SMP select ARCH_HAS_RESET_CONTROLLER @@ -535,6 +538,7 @@ config SOC_IMX7D select HAVE_ARM_ARCH_TIMER select HAVE_IMX_ANATOP select HAVE_IMX_MMDC + select HAVE_IMX_DDRC select HAVE_IMX_SRC help This enables support for Freescale i.MX7 Dual processor. diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index cab128913e72..d7f5586d34ae 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -69,6 +69,7 @@ obj-$(CONFIG_MACH_IMX35_DT) += imx35-dt.o obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o +obj-$(CONFIG_HAVE_IMX_DDRC) += ddrc.o obj-$(CONFIG_HAVE_IMX_SRC) += src.o ifneq ($(CONFIG_SOC_IMX6)$(CONFIG_SOC_LS1021A),) AFLAGS_headsmp.o :=-Wa,-march=armv7-a diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index c4436d9c52ff..623c6454b4bb 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -107,7 +107,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode); void imx6_set_int_mem_clk_lpm(bool enable); void imx6sl_set_wait_clk(bool enter); int imx_mmdc_get_ddr_type(void); - +int imx_ddrc_get_ddr_type(void); void imx_cpu_die(unsigned int cpu); int imx_cpu_kill(unsigned int cpu); diff --git a/arch/arm/mach-imx/ddrc.c b/arch/arm/mach-imx/ddrc.c new file mode 100644 index 000000000000..9c7f627d465e --- /dev/null +++ b/arch/arm/mach-imx/ddrc.c @@ -0,0 +1,86 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include + +#include "hardware.h" + +#define DDRC_MSTR 0x0 +#define BM_DDRC_MSTR_DDR3 0x1 +#define BM_DDRC_MSTR_LPDDR2 0x4 +#define BM_DDRC_MSTR_LPDDR3 0x8 + +static int ddr_type; + +static int imx_ddrc_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + void __iomem *ddrc_base, *reg; + u32 val; + + ddrc_base = of_iomap(np, 0); + WARN_ON(!ddrc_base); + + reg = ddrc_base + DDRC_MSTR; + /* Get ddr type */ + val = readl_relaxed(reg); + val &= (BM_DDRC_MSTR_DDR3 | BM_DDRC_MSTR_LPDDR2 + | BM_DDRC_MSTR_LPDDR3); + + switch (val) { + case BM_DDRC_MSTR_DDR3: + pr_info("DDR type is DDR3!\n"); + ddr_type = IMX_DDR_TYPE_DDR3; + break; + case BM_DDRC_MSTR_LPDDR2: + pr_info("DDR type is LPDDR2!\n"); + ddr_type = IMX_DDR_TYPE_LPDDR2; + break; + case BM_DDRC_MSTR_LPDDR3: + pr_info("DDR type is LPDDR3!\n"); + ddr_type = IMX_DDR_TYPE_LPDDR3; + break; + default: + break; + } + + return 0; +} + +int imx_ddrc_get_ddr_type(void) +{ + return ddr_type; +} + +static struct of_device_id imx_ddrc_dt_ids[] = { + { .compatible = "fsl,imx7-ddrc", }, + { /* sentinel */ } +}; + +static struct platform_driver imx_ddrc_driver = { + .driver = { + .name = "imx-ddrc", + .owner = THIS_MODULE, + .of_match_table = imx_ddrc_dt_ids, + }, + .probe = imx_ddrc_probe, +}; + +static int __init imx_ddrc_init(void) +{ + return platform_driver_register(&imx_ddrc_driver); +} +postcore_initcall(imx_ddrc_init); diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index 34f2ff62583c..9af12a684ba5 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -41,7 +41,9 @@ #define MXC_CPU_IMX6UL 0x64 #define MXC_CPU_IMX7D 0x72 +#define IMX_DDR_TYPE_DDR3 0 #define IMX_DDR_TYPE_LPDDR2 1 +#define IMX_DDR_TYPE_LPDDR3 2 #ifndef __ASSEMBLY__ extern unsigned int __mxc_cpu_type; -- 2.17.1