From 8c4b25ae95112bfaba8b21b5056f17a82971c2ce Mon Sep 17 00:00:00 2001 From: Ye Li Date: Sun, 20 Jan 2019 19:48:08 -0800 Subject: [PATCH] MLK-20781-3 mx7ulp: clock: adjust LCDIF pixclock algorithm Since LCDIF does not have a dedicated PLL as its source, we have to find a best frequency closed to the target frequency. The previous method is finding a closed clock with actual frequency higher than target. But this causes problem to DSI PHY clock which uses target frequency to calculate its clock parameters. When the actaul pixclock is higher, it may violates the requirement between DSI PHY clock and LCDIF pixclock clock. clk_byte_freq >= dpi_pclk_freq * DPI_pixel_size / ( 8 * (cfg_num_lanes + 1)) So we'd better selecting a LCDIF clock not exceed the target frequency. Signed-off-by: Ye Li (cherry picked from commit fcd5fac9eb68c3bfed27c5a613315414f37b5990) (cherry picked from commit ce59d991d21eaa929b20a50f168fde6d6bbfaaf4) --- arch/arm/mach-imx/mx7ulp/clock.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index 3503247f0e..16ea4240e2 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -345,7 +345,12 @@ void enable_mipi_dsi_clk(unsigned char enable) void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq_in_khz) { - /* Scan the parent clock to find best fit clock, which should generate actual frequence >= freq */ + /* Scan the parent clock to find best fit clock, whose generate actual frequence <= freq + * Otherwise, the higher actual freq may introduce some problem + * 1. The real frequency exceeds max framerate that screen supports + * 2. The DSI PHY clock depends on the lcdif clock, so the higher lcdif clock may violate + * DSI PHY clock requirement + */ u8 pcd, best_pcd = 0; u32 parent, frac, rate, parent_rate; u32 best_parent = 0, best_frac = 0, best = 0; @@ -375,10 +380,10 @@ void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq_in_khz) continue; rate = parent_rate * (frac + 1) / (pcd + 1); - if (rate < freq_in_khz) + if (rate > freq_in_khz) continue; - if (best == 0 || rate < best) { + if (best == 0 || rate > best) { best = rate; best_parent = parent; best_frac = frac; -- 2.17.1