From 8c04f7a3e347cb2a00074d197f5cd5b25c6fe383 Mon Sep 17 00:00:00 2001
From: Romain Perier <romain.perier@collabora.com>
Date: Mon, 4 Sep 2017 10:51:16 +0200
Subject: [PATCH] clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs

Signed-off-by: Romain Perier <romain.perier@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 include/dt-bindings/clock/rk3368-cru.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/clock/rk3368-cru.h b/include/dt-bindings/clock/rk3368-cru.h
index aeb83e581a11..a0063ed7284a 100644
--- a/include/dt-bindings/clock/rk3368-cru.h
+++ b/include/dt-bindings/clock/rk3368-cru.h
@@ -156,6 +156,7 @@
 #define PCLK_ISP		366
 #define PCLK_VIP		367
 #define PCLK_WDT		368
+#define PCLK_EFUSE256		369
 
 /* hclk gates */
 #define HCLK_SFC		448
-- 
2.17.1