From 89d1299864e7f12901c7712caffde8491ec73cf5 Mon Sep 17 00:00:00 2001 From: Josep Orga Date: Tue, 4 Apr 2023 13:22:09 +0200 Subject: [PATCH] =?utf8?q?arm64:=20dts:=20imx8mn-somdevices.dtsi:=20arm64:?= =?utf8?q?=20dts:=20Change=20old=20I2C4=5FSCL=20pin:=20=09=C2=B7=20PMIC=20?= =?utf8?q?INT=20changed=20to=20SD1=5FSTROBE=5FGPIO2=5FIO11.?= MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Josep Orga --- arch/arm64/boot/dts/freescale/imx8mn-somdevices.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-somdevices.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-somdevices.dtsi index 3170d756a4bb..43f0ca2c22d7 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-somdevices.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-somdevices.dtsi @@ -229,8 +229,8 @@ reg = <0x25>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; - interrupt-parent = <&gpio5>; - interrupts = <20 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; nxp,i2c-lt-enable; regulators { @@ -680,7 +680,7 @@ pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MN_IOMUXC_I2C4_SCL_GPIO5_IO20 0x141 + MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x141 >; }; -- 2.17.1