From 7f151ff980a1decb9b6b5d91bd0cdb64fc533b99 Mon Sep 17 00:00:00 2001 From: "Guoniu.Zhou" Date: Mon, 5 Feb 2018 14:52:07 +0800 Subject: [PATCH] MLK-17230-1: CI_PI: register clocks for CI_PI ss Register clocks for CI_PI subsystem. Reviewed-by: Sandor.Yu Signed-off-by: Guoniu.Zhou (cherry picked from commit d29308ec4fa29addd049c114520d7628e9e921d7) --- drivers/clk/imx/clk-imx8qxp.c | 19 ++++++++++++++++++- include/dt-bindings/clock/imx8qxp-clock.h | 13 +++++++++++-- include/soc/imx8/imx8qxp/lpcg.h | 5 ++++- 3 files changed, 33 insertions(+), 4 deletions(-) diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index 36955a4ca714..b9915627ed51 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -1,6 +1,6 @@ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. - * Copyright 2017 NXP + * Copyright 2017-2018 NXP * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -131,6 +131,14 @@ static const char *sdhc2_sels[] = { "dummy", }; +static const char *pll0_sels[] = { + "dummy", + "parallel_pll_clk", + "dummy", + "dummy", + "dummy", +}; + static struct clk *clks[IMX8QXP_CLK_END]; static struct clk_onecell_data clk_data; @@ -568,6 +576,15 @@ static int imx8qxp_clk_probe(struct platform_device *pdev) clks[IMX8QXP_CSI0_CORE_CLK] = imx_clk_gate_scu("mipi_csi0_core_clk", "mipi_csi0_core_div", SC_R_CSI_0, SC_PM_CLK_PER, (void __iomem *)(MIPI_CSI_0_LPCG + 0x18), 16, 0); clks[IMX8QXP_CSI0_ESC_CLK] = imx_clk_gate_scu("mipi_csi0_esc_clk", "mipi_csi0_esc_div", SC_R_CSI_0, SC_PM_CLK_MISC, (void __iomem *)(MIPI_CSI_0_LPCG + 0x1C), 16, 0); + /* Parallel CSI */ + clks[IMX8QXP_PARALLEL_CSI_CLK_DPLL] = imx_clk_divider_scu("parallel_pll_clk", SC_R_PI_0_PLL, SC_PM_CLK_PLL); + clks[IMX8QXP_PARALLEL_CSI_CLK_SEL] = imx_clk_mux2_scu("pll0_sel", pll0_sels, ARRAY_SIZE(pll0_sels), SC_R_PI_0, SC_PM_CLK_PER); + clks[IMX8QXP_PARALLEL_CSI_PER_CLK_DIV] = imx_clk_divider2_scu("parallel_per_clk", "pll0_sel", SC_R_PI_0, SC_PM_CLK_PER); + clks[IMX8QXP_PARALLEL_CSI_MCLK_DIV] = imx_clk_divider_scu("parallel_csi_mclk_div", SC_R_PI_0, SC_PM_CLK_MISC0); + clks[IMX8QXP_PARALLEL_CSI_PIXEL_CLK] = imx_clk_gate_scu("parallel_pixel_clk", "parallel_per_clk", SC_R_PI_0, SC_PM_CLK_PER, (void __iomem *)(PARALLEL_CSI_LPCG + 0x18), 0, 0); + clks[IMX8QXP_PARALLEL_CSI_IPG_CLK] = imx_clk_gate_scu("parallel_ipg_clk", "parallel_per_clk", SC_R_PI_0, SC_PM_CLK_PER, (void __iomem *)(PARALLEL_CSI_LPCG + 0x4), 16, 0); + clks[IMX8QXP_PARALLEL_CSI_MISC0_CLK] = imx_clk_gate_scu("parallel_csi_mclk", "parallel_csi_mclk_div", SC_R_PI_0, SC_PM_CLK_MISC0, (void __iomem *)(PARALLEL_CSI_LPCG + 0x1C), 0, 0); + /* HSIO SS */ clks[IMX8QXP_HSIO_PCIE_MSTR_AXI_CLK] = imx_clk_gate2_scu("hsio_pcie_mstr_axi_clk", "axi_hsio_clk_root", (void __iomem *)(HSIO_PCIE_X1_LPCG), 16, FUNCTION_NAME(PD_HSIO_PCIE_B)); clks[IMX8QXP_HSIO_PCIE_SLV_AXI_CLK] = imx_clk_gate2_scu("hsio_pcie_slv_axi_clk", "axi_hsio_clk_root", (void __iomem *)(HSIO_PCIE_X1_LPCG), 20, FUNCTION_NAME(PD_HSIO_PCIE_B)); diff --git a/include/dt-bindings/clock/imx8qxp-clock.h b/include/dt-bindings/clock/imx8qxp-clock.h index b713a0ff8c6f..9d95e7b87e49 100644 --- a/include/dt-bindings/clock/imx8qxp-clock.h +++ b/include/dt-bindings/clock/imx8qxp-clock.h @@ -1,6 +1,6 @@ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. - * Copyright 2017 NXP + * Copyright 2017-2018 NXP * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -572,5 +572,14 @@ #define IMX8QXP_SDHC1_SEL 515 #define IMX8QXP_SDHC2_SEL 516 -#define IMX8QXP_CLK_END 517 +/* PARALLER CSI */ +#define IMX8QXP_PARALLEL_CSI_CLK_DPLL 517 +#define IMX8QXP_PARALLEL_CSI_CLK_SEL 518 +#define IMX8QXP_PARALLEL_CSI_PER_CLK_DIV 519 +#define IMX8QXP_PARALLEL_CSI_PIXEL_CLK 520 +#define IMX8QXP_PARALLEL_CSI_IPG_CLK 521 +#define IMX8QXP_PARALLEL_CSI_MCLK_DIV 522 +#define IMX8QXP_PARALLEL_CSI_MISC0_CLK 523 + +#define IMX8QXP_CLK_END 524 #endif /* __DT_BINDINGS_CLOCK_IMX8QXP_H */ diff --git a/include/soc/imx8/imx8qxp/lpcg.h b/include/soc/imx8/imx8qxp/lpcg.h index cb06b03584be..77be9ce77bb6 100644 --- a/include/soc/imx8/imx8qxp/lpcg.h +++ b/include/soc/imx8/imx8qxp/lpcg.h @@ -1,6 +1,6 @@ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. - * Copyright 2017 NXP + * Copyright 2017-2018 NXP * * SPDX-License-Identifier: GPL-2.0+ */ @@ -89,6 +89,9 @@ #define MIPI_CSI_0_LPCG 0x58223000 #define MIPI_CSI_1_LPCG 0x58243000 +/* PARALLEL CSI SS */ +#define PARALLEL_CSI_LPCG 0x58263000 + /* Display MIPI SS */ #define DI_MIPI0_LPCG 0x56223000 #define DI_MIPI1_LPCG 0x56243000 -- 2.17.1