From 7e05dcf668fc6af64964353fdc7b3b4ded63f910 Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Fri, 17 Nov 2017 16:38:41 +0800 Subject: [PATCH] MLK-16839-2: ARM64: dts: add clock source for asrc add IMX8QM_ACM_AUD_CLK0_SEL and IMX8QM_ACM_AUD_CLK1_SEL for asrc clock source. There is no clock gate for them, only clock mux. Signed-off-by: Shengjiu Wang --- arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | 8 ++++---- arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi index b83c871da30e..d9c143dd97ef 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi @@ -2866,8 +2866,8 @@ <&clk IMX8QM_AUD_ASRC_0_MEM>, <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>, <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>, - <&clk IMX8QM_CLK_DUMMY>, - <&clk IMX8QM_CLK_DUMMY>, + <&clk IMX8QM_ACM_AUD_CLK0_SEL>, + <&clk IMX8QM_ACM_AUD_CLK1_SEL>, <&clk IMX8QM_CLK_DUMMY>, <&clk IMX8QM_CLK_DUMMY>, <&clk IMX8QM_CLK_DUMMY>, @@ -2906,8 +2906,8 @@ <&clk IMX8QM_AUD_ASRC_1_MEM>, <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>, <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>, - <&clk IMX8QM_CLK_DUMMY>, - <&clk IMX8QM_CLK_DUMMY>, + <&clk IMX8QM_ACM_AUD_CLK0_SEL>, + <&clk IMX8QM_ACM_AUD_CLK1_SEL>, <&clk IMX8QM_CLK_DUMMY>, <&clk IMX8QM_CLK_DUMMY>, <&clk IMX8QM_CLK_DUMMY>, diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi index ae6a16e2480f..1e603c102358 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi @@ -2018,8 +2018,8 @@ <&clk IMX8QXP_CLK_DUMMY>, <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>, <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK1_CLK>, - <&clk IMX8QXP_CLK_DUMMY>, - <&clk IMX8QXP_CLK_DUMMY>, + <&clk IMX8QXP_ACM_AUD_CLK0_SEL>, + <&clk IMX8QXP_ACM_AUD_CLK1_SEL>, <&clk IMX8QXP_CLK_DUMMY>, <&clk IMX8QXP_CLK_DUMMY>, <&clk IMX8QXP_CLK_DUMMY>, @@ -2058,8 +2058,8 @@ <&clk IMX8QXP_CLK_DUMMY>, <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>, <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK1_CLK>, - <&clk IMX8QXP_CLK_DUMMY>, - <&clk IMX8QXP_CLK_DUMMY>, + <&clk IMX8QXP_ACM_AUD_CLK0_CLK>, + <&clk IMX8QXP_ACM_AUD_CLK1_CLK>, <&clk IMX8QXP_CLK_DUMMY>, <&clk IMX8QXP_CLK_DUMMY>, <&clk IMX8QXP_CLK_DUMMY>, -- 2.17.1