From 766c4f5e18d221975f4eed5a2a8add8bc7fba01f Mon Sep 17 00:00:00 2001 From: Zhou Peng Date: Thu, 23 Apr 2020 11:48:10 +0800 Subject: [PATCH] MLK-23211-2: arm64: imx8mp: dts: add vpu node Add vpu node: g1/g2/vc8000e Signed-off-by: Zhou Peng --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 42 +++++++++++++++++++++++ 1 file changed, 42 insertions(+) mode change 100644 => 100755 arch/arm64/boot/dts/freescale/imx8mp.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi old mode 100644 new mode 100755 index bc179075a671..4211897751e5 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -916,4 +916,46 @@ interrupts = ; }; }; + + vpu_g1: vpu_g1@38300000 { + compatible = "nxp,imx8mm-hantro","nxp,imx8mp-hantro"; + reg = <0x0 0x38300000 0x0 0x100000>; + reg-names = "regs_hantro"; + interrupts = ; + interrupt-names = "irq_hantro"; + clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>, <&clk IMX8MP_CLK_VPU_ROOT>; + clock-names = "clk_hantro", "clk_hantro_bus"; + assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>, <&clk IMX8MP_CLK_VPU_BUS>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL3_OUT>, <&clk IMX8MP_SYS_PLL3_OUT>; + assigned-clock-rates = <600000000>, <600000000>; + status = "disabled"; + }; + + vpu_g2: vpu_g2@38310000 { + compatible = "nxp,imx8mm-hantro","nxp,imx8mp-hantro"; + reg = <0x0 0x38310000 0x0 0x100000>; + reg-names = "regs_hantro"; + interrupts = ; + interrupt-names = "irq_hantro"; + clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>, <&clk IMX8MP_CLK_VPU_ROOT>; + clock-names = "clk_hantro", "clk_hantro_bus"; + assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>, <&clk IMX8MP_CLK_VPU_BUS>; + assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>, <&clk IMX8MP_SYS_PLL3_OUT>; + assigned-clock-rates = <400000000>, <600000000>; + status = "disabled"; + }; + + vpu_vc8000e: vpu_vc8000e@38320000 { + compatible = "nxp,imx8mp-hantro-vc8000e"; + reg = <0x0 0x38320000 0x0 0x10000>; + reg-names = "regs_hantro_vc8000e"; + interrupts = ; + interrupt-names = "irq_hantro_vc8000e"; + clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>, <&clk IMX8MP_CLK_VPU_ROOT>; + clock-names = "clk_hantro_vc8000e", "clk_hantro_vc8000e_bus"; + assigned-clocks = <&clk IMX8MP_CLK_VPU_VC8000E>,<&clk IMX8MP_CLK_VPU_BUS>; + assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>, <&clk IMX8MP_SYS_PLL3_OUT>; + assigned-clock-rates = <400000000>, <600000000>; + status = "disabled"; + }; }; -- 2.17.1