From 72dfc71df88a39e3c4f115823d2627a4662b5653 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 24 Feb 2016 11:57:02 +0800 Subject: [PATCH] MLK-12443 ARM: imx: disable low power mode before entering LPSR mode Before entering LPSR mode, as GPC was set to STOP/DSM mode already, the wfi loop after LPSR mode would cause system enter STOP/DSM mode first, then SNVS will force PMIC_ON_REQ to low, as SNVS needs IPG clock to be on before entering SNVS/LPSR mode, so we have to disable STOP/DSM mode to make sure IPG clock is on before SNVS actually enters LPSR mode. Signed-off-by: Anson Huang --- arch/arm/mach-imx/suspend-imx7.S | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-imx/suspend-imx7.S b/arch/arm/mach-imx/suspend-imx7.S index 7ae894c2e8c2..8a77ba953358 100644 --- a/arch/arm/mach-imx/suspend-imx7.S +++ b/arch/arm/mach-imx/suspend-imx7.S @@ -558,6 +558,12 @@ ENTRY(imx7_suspend) cmp r7, #0x0 beq ddr_retention_enter_out + /* disable STOP mode before entering LPSR */ + ldr r11, [r0, #PM_INFO_MX7_GPC_V_OFFSET] + ldr r7, [r11] + bic r7, #0xf + str r7, [r11] + /* shut down vddsoc to enter lpsr mode */ ldr r11, [r0, #PM_INFO_MX7_SNVS_V_OFFSET] ldr r7, [r11, #0x38] -- 2.17.1