From 705fb6d931d3670c875530b597b0580664fb1e7c Mon Sep 17 00:00:00 2001 From: =?utf8?q?St=C3=A9phane=20Dion?= Date: Tue, 25 Jun 2019 14:36:15 +0200 Subject: [PATCH] HSM-24: arm64: dtx: imx8qxp: enable more seco MU users MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Enable all SECO MUs and increase number of users on the first one. Signed-off-by: Stéphane Dion (cherry picked from commit 56099536022e7e66cfc932069aa4a4701d84aa0b) --- arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi | 8 ++++++++ 2 files changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi index 32b755391bb6..1c562d3a81c5 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi @@ -181,6 +181,8 @@ reg = <0x0 0x31560000 0x0 0x10000>; power-domains = <&pd_seco_mu_2>; interrupts = ; + fsl,seco_mu_id = <1>; + fsl,seco_max_users = <4>; status = "disabled"; }; @@ -189,6 +191,8 @@ reg = <0x0 0x31570000 0x0 0x10000>; power-domains = <&pd_seco_mu_3>; interrupts = ; + fsl,seco_mu_id = <2>; + fsl,seco_max_users = <2>; status = "disabled"; }; @@ -197,6 +201,8 @@ reg = <0x0 0x31580000 0x0 0x10000>; power-domains = <&pd_seco_mu_4>; interrupts = ; + fsl,seco_mu_id = <3>; + fsl,seco_max_users = <2>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi index 659b360d81cf..3e1782fc8413 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi @@ -44,6 +44,14 @@ mu_seco2: mu@31560000 { status = "okay"; }; + + mu_seco3: mu@31570000 { + status = "okay"; + }; + + mu_seco4: mu@31580000 { + status = "okay"; + }; }; &A35_2 { -- 2.17.1