From 6706ac3a4f8f17e27925908ba05456297d0769da Mon Sep 17 00:00:00 2001 From: Liu Ying Date: Wed, 27 Apr 2016 16:40:45 +0800 Subject: [PATCH] MLK-12721 mxc IPUv3: PRE: Correct irq mask in ipu_pre_irq_mask() We should do bitwise OR operation for all valid irq enable bits to get the full irq mask. So, to take the bit4(HANDSHAKE_ERROR_IRQ_EN) into calculation, the mask should be 0x1f instead of 0xf. Reported-by: Asim Zaidi Signed-off-by: Liu Ying --- drivers/mxc/ipu3/pre.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mxc/ipu3/pre.c b/drivers/mxc/ipu3/pre.c index 0f30336fae16..f1ce02b3fe90 100644 --- a/drivers/mxc/ipu3/pre.c +++ b/drivers/mxc/ipu3/pre.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2014-2015 Freescale Semiconductor, Inc. + * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License @@ -291,10 +291,10 @@ static void ipu_pre_irq_mask(struct ipu_pre_data *pre, unsigned long mask, bool clear) { if (clear) { - pre_write(pre, mask & 0xf, HW_PRE_IRQ_MASK_CLR); + pre_write(pre, mask & 0x1f, HW_PRE_IRQ_MASK_CLR); return; } - pre_write(pre, mask & 0xf, HW_PRE_IRQ_MASK_SET); + pre_write(pre, mask & 0x1f, HW_PRE_IRQ_MASK_SET); } static int ipu_pre_buf_set(unsigned int id, unsigned long cur_buf, -- 2.17.1