From 5fa1f7680f2728d62561db6d4a9282c4d21f2324 Mon Sep 17 00:00:00 2001 From: Tiezhu Yang Date: Thu, 17 Sep 2020 20:39:01 +0800 Subject: [PATCH] MIPS: Loongson64: Add UART node for LS7A PCH When I update the latest kernel on the Loongson platform used with LS7A bridge chip, the serial console has no output, this is because the machine uses LS7A UART0 instead of CPU UART0, add UART node for LS7A PCH to enhance the compatibility. Signed-off-by: Tiezhu Yang Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 39 +++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi index e574a062dfae..f99a7a11fded 100644 --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi @@ -19,6 +19,45 @@ #interrupt-cells = <2>; }; + ls7a_uart0: serial@10080000 { + compatible = "ns16550a"; + reg = <0 0x10080000 0 0x100>; + clock-frequency = <50000000>; + interrupt-parent = <&pic>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + }; + + ls7a_uart1: serial@10080100 { + status = "disabled"; + compatible = "ns16550a"; + reg = <0 0x10080100 0 0x100>; + clock-frequency = <50000000>; + interrupt-parent = <&pic>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + }; + + ls7a_uart2: serial@10080200 { + status = "disabled"; + compatible = "ns16550a"; + reg = <0 0x10080200 0 0x100>; + clock-frequency = <50000000>; + interrupt-parent = <&pic>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + }; + + ls7a_uart3: serial@10080300 { + status = "disabled"; + compatible = "ns16550a"; + reg = <0 0x10080300 0 0x100>; + clock-frequency = <50000000>; + interrupt-parent = <&pic>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + }; + pci@1a000000 { compatible = "loongson,ls7a-pci"; device_type = "pci"; -- 2.17.1