From 54f495c715c79e0a1ecc1798f71dfb3e3edb7d22 Mon Sep 17 00:00:00 2001 From: Li Jun Date: Tue, 8 Aug 2017 21:24:21 +0800 Subject: [PATCH] MLK-16013-40 phy: phy-fsl-imx8mq-usb: clear COMMONONN to keep FREECLK running MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit COMMONONN: This signal controls whether the high-speed Bias and PLL blocks remain powered—consuming additional current during Suspend and Sleep modes. As imx8mq USB3 ITP&SOF have to use FREECLK, so clear COMMONONN to be 0(valid) to make FREECLK always running, this is the recommended setting from design team. Acked-by: Peter Chen Signed-off-by: Li Jun --- drivers/phy/phy-fsl-imx8mq-usb.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/phy/phy-fsl-imx8mq-usb.c b/drivers/phy/phy-fsl-imx8mq-usb.c index 5d6e9198a6ab..113bc5b192e1 100644 --- a/drivers/phy/phy-fsl-imx8mq-usb.c +++ b/drivers/phy/phy-fsl-imx8mq-usb.c @@ -18,6 +18,7 @@ #define PHY_CTRL1 0x4 #define PHY_CTRL1_RESET BIT(0) +#define PHY_CTRL1_COMMONONN BIT(1) #define PHY_CTRL1_ATERESET BIT(3) #define PHY_CTRL1_VDATSRCENB0 BIT(19) #define PHY_CTRL1_VDATDETENB0 BIT(20) @@ -58,7 +59,8 @@ static void imx8mq_usb_phy_init(struct imx8mq_usb_phy *phy) u32 value; value = readl(phy->base + PHY_CTRL1); - value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0); + value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0 | + PHY_CTRL1_COMMONONN); value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET; writel(value, phy->base + PHY_CTRL1); -- 2.17.1