From 52b7548d60a53506cdce055018ef358553e10b96 Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Tue, 9 Mar 2021 15:13:13 +0800 Subject: [PATCH] MLK-25334-1 dt-bindings: imx6q-pcie: add one property to disable l1ss support or not HW board design may not support the L1.1 ASPM, although the L1.1 ASPM can be supported by the SOC chip. So, export one property to disable L1.1 ASPM supported or not. Signed-off-by: Richard Zhu Reviewed-by: Jun Li (cherry picked from commit 7bd2d56b72d33e223305aa2ef9046c0e38f225e6) --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index 0aa60c59dae4..e2e194b4600f 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -60,6 +60,9 @@ Optional properties: - interrupt-names: Optional include the following entries: - "dma": The interrupt that is asserted when an DMA interrupter is received +- l1ss-disabled: Force to disable L1SS or not. If present then the L1 + substate would be force disabled although it might be supported by the + chip. Additional required properties for imx6sx-pcie: - clock names: Must include the following additional entries: -- 2.17.1