From 4d1006c1b6eac22cda8a186dc5e68f6bada969b7 Mon Sep 17 00:00:00 2001 From: Josep Orga Date: Tue, 4 Apr 2023 12:46:01 +0200 Subject: [PATCH] =?utf8?q?imx8mn-somdevices:=20arm64:=20dts:=20arm64:=20dt?= =?utf8?q?s:=20Change=20old=20I2C4=5FSCL=20pin.=20=C2=B7=20PMIC=20INT=20ch?= =?utf8?q?anged=20to=20SD1=5FSTROBE=5FGPIO2=5FIO11.?= MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Josep Orga --- arch/arm/dts/imx8mn-somdevices.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/imx8mn-somdevices.dts b/arch/arm/dts/imx8mn-somdevices.dts index fee48d7612..d8a77be221 100644 --- a/arch/arm/dts/imx8mn-somdevices.dts +++ b/arch/arm/dts/imx8mn-somdevices.dts @@ -104,8 +104,8 @@ reg = <0x25>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; - interrupt-parent = <&gpio5>; - interrupts = <20 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; regulators { buck1: BUCK1{ @@ -380,7 +380,7 @@ pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MN_IOMUXC_I2C4_SCL_GPIO5_IO20 0x141 + MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x141 >; }; -- 2.17.1