From 4c029c499fb446d97b85509c151f8564dfe1dcc3 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Mon, 20 Jan 2020 19:47:20 +0200 Subject: [PATCH] drm/i915: swap() the entire cdclk state MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit To make life less confusing let's swap() the entire cdclk state rather than swapping some parts, copying other parts, and leaving the rest just as is. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20200120174728.21095-11-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_cdclk.c | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index ecf6664645b2..65ae842e450a 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1851,19 +1851,7 @@ void intel_cdclk_swap_state(struct intel_atomic_state *state) { struct drm_i915_private *dev_priv = to_i915(state->base.dev); - /* FIXME maybe swap() these too */ - memcpy(dev_priv->cdclk_state.min_cdclk, - state->cdclk_state.min_cdclk, - sizeof(state->cdclk_state.min_cdclk)); - memcpy(dev_priv->cdclk_state.min_voltage_level, - state->cdclk_state.min_voltage_level, - sizeof(state->cdclk_state.min_voltage_level)); - - dev_priv->cdclk_state.force_min_cdclk = - state->cdclk_state.force_min_cdclk; - - swap(state->cdclk_state.logical, dev_priv->cdclk_state.logical); - swap(state->cdclk_state.actual, dev_priv->cdclk_state.actual); + swap(state->cdclk_state, dev_priv->cdclk_state); } void intel_dump_cdclk_config(const struct intel_cdclk_config *cdclk_config, @@ -1919,7 +1907,7 @@ intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state) /* called after intel_cdclk_swap_state()! */ const struct intel_cdclk_state *old_cdclk_state = &state->cdclk_state; const struct intel_cdclk_state *new_cdclk_state = &dev_priv->cdclk_state; - enum pipe pipe = old_cdclk_state->pipe; /* not swapped */ + enum pipe pipe = new_cdclk_state->pipe; if (pipe == INVALID_PIPE || old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk) @@ -1940,7 +1928,7 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state) /* called after intel_cdclk_swap_state()! */ const struct intel_cdclk_state *old_cdclk_state = &state->cdclk_state; const struct intel_cdclk_state *new_cdclk_state = &dev_priv->cdclk_state; - enum pipe pipe = old_cdclk_state->pipe; /* not swapped */ + enum pipe pipe = new_cdclk_state->pipe; if (pipe != INVALID_PIPE && old_cdclk_state->actual.cdclk > new_cdclk_state->actual.cdclk) -- 2.17.1