From 3f45433f74171e3960d08a17941eaeadcb923922 Mon Sep 17 00:00:00 2001 From: Clark Wang Date: Thu, 8 Aug 2019 16:56:21 +0800 Subject: [PATCH] MLK-22412-1 Revert "MLK-22337 dts: clk: remove non-exist lvds1 recources for imx8qm" This reverts commit 9811210cb25a98b65be4e3ef35ccaf9c05e0ca83. No need to remove PD_LVDS1_I2C0 and SC_R_LVDS_1_I2C_0. Reviewed-by: Anson Huang Signed-off-by: Clark Wang --- arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 7 ++++++- .../boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-dom0.dts | 1 + arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts | 2 ++ arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu-car.dts | 2 +- 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index 9b71c86ac225..f4d985233187 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -176,6 +176,11 @@ #address-cells = <1>; #size-cells = <0>; + pd_lvds1_i2c0: PD_LVDS1_I2C0 { + reg = ; + #power-domain-cells = <0>; + power-domains =<&pd_lvds1>; + }; pd_lvds1_pwm: PD_LVDS1_PWM { reg = ; @@ -2828,7 +2833,7 @@ clock-names = "per", "ipg"; assigned-clocks = <&clk IMX8QM_LVDS1_I2C0_CLK>; assigned-clock-rates = <24000000>; - power-domains = <&pd_lvds1>; + power-domains = <&pd_lvds1_i2c0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-dom0.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-dom0.dts index 7c3e5eaf4a8b..cb009a4b76a8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-dom0.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-dom0.dts @@ -62,6 +62,7 @@ SC_R_GPU_1_PID2 SC_R_GPU_1_PID3 SC_R_LVDS_1 + SC_R_LVDS_1_I2C_0 SC_R_LVDS_1_PWM_0 SC_R_DC_1 SC_R_DC_1_BLIT0 diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts index c20b47cb48e3..38e92b9da2df 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-dom0.dts @@ -76,6 +76,7 @@ SC_R_CSI_0_PWM_0 SC_R_CSI_0_I2C_0 SC_R_LVDS_1 + SC_R_LVDS_1_I2C_0 SC_R_LVDS_1_PWM_0 SC_R_DC_1 SC_R_DC_1_BLIT0 @@ -97,6 +98,7 @@ SC_R_GPU_1_PID2 SC_R_GPU_1_PID3 SC_R_LVDS_1 + SC_R_LVDS_1_I2C_0 SC_R_LVDS_1_PWM_0 SC_R_DC_1 SC_R_DC_1_BLIT0 diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu-car.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu-car.dts index 2da87d7528a7..d8ff2c05bbc3 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu-car.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu-car.dts @@ -635,7 +635,7 @@ clock-names = "per", "ipg"; assigned-clocks = <&clk_post IMX8QM_LVDS1_I2C0_CLK>; assigned-clock-rates = <24000000>; - power-domains = <&pd_lvds1>; + power-domains = <&pd_lvds1_i2c0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lvds1_lpi2c1>; clock-frequency = <400000>; -- 2.17.1