From 3d53365fd68e52ec70dcf814b4dc7ff6204d6cbb Mon Sep 17 00:00:00 2001 From: Josep Orga Date: Wed, 5 Oct 2022 18:06:02 +0200 Subject: [PATCH] arm64: dts: Enable PCIe and set PCIe reference clock as internal PLL. Signed-off-by: Josep Orga --- arch/arm64/boot/dts/freescale/imx8mm-somdevices.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-somdevices.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-somdevices.dtsi index f33576d0333e..3eaaf86738b4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-somdevices.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-somdevices.dtsi @@ -480,8 +480,8 @@ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, <&clk IMX8MM_SYS_PLL2_100M>, <&clk IMX8MM_SYS_PLL2_250M>; - ext_osc = <1>; - status = "disabled"; + ext_osc = <0>; + status = "okay"; }; &pcie0_ep{ @@ -499,7 +499,7 @@ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, <&clk IMX8MM_SYS_PLL2_100M>, <&clk IMX8MM_SYS_PLL2_250M>; - ext_osc = <1>; + ext_osc = <0>; l1ss-disabled; status = "disabled"; }; -- 2.17.1