From 3767b22baaf8da352a0faaca6b8e813156cca600 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 22 Jul 2020 10:00:15 +0800 Subject: [PATCH] LF-1790 arm64: dts: imx8mn-ddr4-evk: Correct GPU clock rate For i.MX8MN DDR4 EVK board, system runs at nominal mode, so GPU can ONLY run up to 400MHz, correct the clock settings, new GPU clock settings on i.MX8MN DDR4 EVK board are as below: root@imx8mnevk:~# cat /sys/kernel/debug/clk/clk_summary | grep gpu gpu_ahb 0 0 0 400000000 0 0 50000 gpu_axi 0 0 0 800000000 0 0 50000 gpu_root_clk 0 0 0 800000000 0 0 50000 gpu_pll_ref_sel 0 0 0 24000000 0 0 50000 gpu_pll 0 0 0 1200000000 0 0 50000 gpu_pll_bypass 0 0 0 1200000000 0 0 50000 gpu_pll_out 0 0 0 1200000000 0 0 50000 gpu_shader 0 0 0 400000000 0 0 50000 gpu_core 0 0 0 400000000 0 0 50000 gpu_core_root_clk 0 0 0 400000000 0 0 50000 Signed-off-by: Anson Huang Reviewed-by: Jacky Bai --- arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts index bdcd416c39ce..08296c9bb71f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts @@ -143,5 +143,18 @@ }; &gpu { + assigned-clocks = <&clk IMX8MN_CLK_GPU_CORE_SRC>, + <&clk IMX8MN_CLK_GPU_SHADER_SRC>, + <&clk IMX8MN_CLK_GPU_AXI>, + <&clk IMX8MN_CLK_GPU_AHB>, + <&clk IMX8MN_GPU_PLL>, + <&clk IMX8MN_CLK_GPU_CORE_DIV>, + <&clk IMX8MN_CLK_GPU_SHADER_DIV>; + assigned-clock-parents = <&clk IMX8MN_GPU_PLL_OUT>, + <&clk IMX8MN_GPU_PLL_OUT>, + <&clk IMX8MN_SYS_PLL1_800M>, + <&clk IMX8MN_SYS_PLL1_800M>; + assigned-clock-rates = <0>, <0>, <800000000>, <400000000>, <1200000000>, + <400000000>, <400000000>; status= "okay"; }; -- 2.17.1