From 31ee0661ffc15c800c95a0f0defb6ea6bbca4c61 Mon Sep 17 00:00:00 2001 From: Viorel Suman Date: Thu, 24 Aug 2017 14:52:03 +0300 Subject: [PATCH] MLK-16275-2: ARM64: dts: imx8qm/qxp: Sync ESAI0 and AMIX SAIs rates The ESAI0 and AMIX SAIs rates need to be the same for the common and master clocks in the clock tree given the existing clock rates store/restore functionality and the asynchronous nature of the drivers "probe" method invocation. Signed-off-by: Viorel Suman --- arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts | 8 ++++---- arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts index 17838fc8ee4d..85d88ced6389 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts @@ -135,7 +135,7 @@ }; &asrc1 { - fsl,asrc-rate = <48000>; + fsl,asrc-rate = <48000>; status = "okay"; }; @@ -148,7 +148,7 @@ <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>, <&clk IMX8QM_AUD_ESAI_0_EXTAL_IPG>; assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>; - assigned-clock-rates = <0>, <786432000>, <24576000>, <24576000>, <24576000>; + assigned-clock-rates = <0>, <786432000>, <49152000>, <24576000>, <49152000>; status = "okay"; }; @@ -159,7 +159,7 @@ <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>, <&clk IMX8QM_AUD_SAI_6_MCLK>; assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>; - assigned-clock-rates = <0>, <786432000>, <49152000>, <49152000>, <49152000>; + assigned-clock-rates = <0>, <786432000>, <49152000>, <24576000>, <49152000>; fsl,sai-asynchronous; fsl,txm-rxs; status = "okay"; @@ -172,7 +172,7 @@ <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>, <&clk IMX8QM_AUD_SAI_7_MCLK>; assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>; - assigned-clock-rates = <0>, <786432000>, <49152000>, <49152000>, <49152000>; + assigned-clock-rates = <0>, <786432000>, <49152000>, <24576000>, <49152000>; fsl,sai-asynchronous; fsl,txm-rxs; status = "okay"; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts index 2df744ea1549..ee6e94e0204b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts @@ -125,7 +125,7 @@ <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>, <&clk IMX8QXP_AUD_ESAI_0_EXTAL_IPG>; assigned-clock-parents = <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>; - assigned-clock-rates = <0>, <786432000>, <24576000>, <24576000>, <24576000>; + assigned-clock-rates = <0>, <786432000>, <49152000>, <24576000>, <49152000>; dmas = <&edma2 23 0 3>, <&edma2 21 0 2>; status = "okay"; }; @@ -137,7 +137,7 @@ <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>, <&clk IMX8QXP_AUD_SAI_4_MCLK>; assigned-clock-parents = <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>; - assigned-clock-rates = <0>, <786432000>, <49152000>, <49152000>, <49152000>; + assigned-clock-rates = <0>, <786432000>, <49152000>, <24576000>, <49152000>; fsl,sai-asynchronous; fsl,txm-rxs; status = "okay"; @@ -150,7 +150,7 @@ <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>, <&clk IMX8QXP_AUD_SAI_5_MCLK>; assigned-clock-parents = <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>; - assigned-clock-rates = <0>, <786432000>, <49152000>, <49152000>, <49152000>; + assigned-clock-rates = <0>, <786432000>, <49152000>, <24576000>, <49152000>; fsl,sai-asynchronous; fsl,txm-rxs; status = "okay"; -- 2.17.1