From 294a5006908e806823b2f72bbf715793922c58ad Mon Sep 17 00:00:00 2001 From: Haibo Chen Date: Mon, 21 Nov 2016 18:33:14 +0800 Subject: [PATCH] MLK-13498 ARM: dts: add eMMC support for ulp-evk board Add eMMC support (8 bit mode) for ulp-evk board. Signed-off-by: Haibo Chen --- arch/arm/boot/dts/Makefile | 3 ++- arch/arm/boot/dts/imx7ulp-evk-emmc.dts | 18 ++++++++++++++++++ arch/arm/boot/dts/imx7ulp-evk.dts | 15 +++++++++++++++ 3 files changed, 35 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/imx7ulp-evk-emmc.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f91c8fbccece..01c587bbdf3a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -567,7 +567,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-sdb-reva-touch.dtb \ imx7d-sdb-reva-wm8960.dtb dtb-$(CONFIG_SOC_IMX7ULP) += \ - imx7ulp-evk.dtb + imx7ulp-evk.dtb \ + imx7ulp-evk-emmc.dtb dtb-$(CONFIG_SOC_LS1021A) += \ ls1021a-qds.dtb \ ls1021a-twr.dtb diff --git a/arch/arm/boot/dts/imx7ulp-evk-emmc.dts b/arch/arm/boot/dts/imx7ulp-evk-emmc.dts new file mode 100644 index 000000000000..4f667b83a978 --- /dev/null +++ b/arch/arm/boot/dts/imx7ulp-evk-emmc.dts @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx7ulp-evk.dts" + +&usdhc1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_usdhc1_8bit>; + pinctrl-1 = <&pinctrl_usdhc1_8bit>; + non-removable; + bus-width = <8>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts b/arch/arm/boot/dts/imx7ulp-evk.dts index 1135b5315710..d95aa84a6bc7 100644 --- a/arch/arm/boot/dts/imx7ulp-evk.dts +++ b/arch/arm/boot/dts/imx7ulp-evk.dts @@ -47,6 +47,21 @@ ULP1_PAD_PTD10__SDHC0_D0 0x843 >; }; + + pinctrl_usdhc1_8bit: usdhc1grp_8bit { + fsl,pins = < + ULP1_PAD_PTD1__SDHC0_CMD 0x843 + ULP1_PAD_PTD2__SDHC0_CLK 0x843 + ULP1_PAD_PTD3__SDHC0_D7 0x843 + ULP1_PAD_PTD4__SDHC0_D6 0x843 + ULP1_PAD_PTD5__SDHC0_D5 0x843 + ULP1_PAD_PTD6__SDHC0_D4 0x843 + ULP1_PAD_PTD7__SDHC0_D3 0x843 + ULP1_PAD_PTD8__SDHC0_D2 0x843 + ULP1_PAD_PTD9__SDHC0_D1 0x843 + ULP1_PAD_PTD10__SDHC0_D0 0x843 + >; + }; }; }; -- 2.17.1