From 25515dfb16d987931152c1d93aed3a16f7197921 Mon Sep 17 00:00:00 2001 From: Ye Li Date: Mon, 15 May 2017 04:04:07 -0500 Subject: [PATCH] MLK-14890 i2c: Enable I2C force idle bus This patch enables the I2C force idle bus for all i.MX6 and i.MX7 boards to avoid i2c bus problem during reboot. To use it, we must add some i2c properties in DTB file and the GPIO pinctrl for i2c. For mx6qsabreauto, mx6slevk, mx6sxsabresd and mx6sxscm, these boards call the setup_i2c. To remove conflict, change to use "setup_i2c" only for non-DM i2c driver. Signed-off-by: Ye Li --- arch/arm/dts/imx6qdl-sabreauto.dtsi | 24 +++++- arch/arm/dts/imx6qdl-sabresd.dtsi | 36 ++++++++- arch/arm/dts/imx6sl-evk.dts | 23 +++++- arch/arm/dts/imx6sll-evk.dts | 24 +++++- arch/arm/dts/imx6sll-lpddr3-arm2.dts | 24 +++++- arch/arm/dts/imx6sx-14x14-arm2.dts | 73 +++++++++++++++---- arch/arm/dts/imx6sx-17x17-arm2.dts | 73 +++++++++++++++---- arch/arm/dts/imx6sx-19x19-arm2.dts | 49 ++++++++++++- arch/arm/dts/imx6sx-sabreauto.dts | 24 +++++- arch/arm/dts/imx6sx-sdb.dtsi | 53 ++++++++++++-- arch/arm/dts/imx6ul-14x14-ddr3-arm2.dts | 12 ++- arch/arm/dts/imx6ul-14x14-evk.dts | 24 +++++- arch/arm/dts/imx6ul-9x9-evk.dts | 24 +++++- arch/arm/dts/imx6ull-14x14-ddr3-arm2.dts | 24 +++++- arch/arm/dts/imx6ull-14x14-evk.dts | 24 +++++- arch/arm/dts/imx6ull-9x9-evk.dts | 24 +++++- arch/arm/dts/imx7d-12x12-ddr3-arm2.dts | 24 +++++- arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts | 24 +++++- arch/arm/dts/imx7d-19x19-ddr3-arm2.dts | 36 ++++++++- arch/arm/dts/imx7d-19x19-lpddr2-arm2.dts | 24 +++++- arch/arm/dts/imx7d-19x19-lpddr3-arm2.dts | 24 +++++- arch/arm/dts/imx7d-sdb.dts | 48 +++++++++++- board/freescale/mx6qsabreauto/mx6qsabreauto.c | 9 +-- board/freescale/mx6slevk/mx6slevk.c | 7 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 4 +- board/freescale/mx6sxscm/mx6sxscm.c | 4 +- 26 files changed, 648 insertions(+), 91 deletions(-) diff --git a/arch/arm/dts/imx6qdl-sabreauto.dtsi b/arch/arm/dts/imx6qdl-sabreauto.dtsi index 711cc63871..992ee81c62 100644 --- a/arch/arm/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/dts/imx6qdl-sabreauto.dtsi @@ -411,8 +411,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; status = "okay"; egalax_ts@04 { @@ -556,8 +559,11 @@ }; &i2c3 { - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; status = "okay"; adv7180: adv7180@21 { @@ -775,6 +781,13 @@ >; }; + pinctrl_i2c2_gpio: i2c2grp_gpio { + fsl,pins = < + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b8b1 + MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b8b1 + >; + }; + pinctrl_ipu1_1: ipu1grp-1 { /* parallel port 16-bit */ fsl,pins = < MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x80000000 @@ -806,6 +819,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3grp_gpio { + fsl,pins = < + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b8b1 + MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x1b8b1 + >; + }; + pinctrl_mlb: mlb { fsl,pins = < MX6QDL_PAD_ENET_TXD1__MLB_CLK 0x80000000 diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi index 04ad185206..93c154bb68 100644 --- a/arch/arm/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/dts/imx6qdl-sabresd.dtsi @@ -371,8 +371,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8962@1a { @@ -430,8 +433,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; status = "okay"; egalax_ts@04 { @@ -576,8 +582,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; status = "okay"; egalax_ts@04 { @@ -728,6 +737,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b8b1 + MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b8b1 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 @@ -735,6 +751,13 @@ >; }; + pinctrl_i2c2_gpio: i2c2grp_gpio { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b8b1 + MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b8b1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 @@ -742,6 +765,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3grp_gpio { + fsl,pins = < + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b8b1 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b8b1 + >; + }; + pinctrl_ipu1: ipu1grp { fsl,pins = < MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 diff --git a/arch/arm/dts/imx6sl-evk.dts b/arch/arm/dts/imx6sl-evk.dts index 6a7e9aabc9..d22623de4c 100644 --- a/arch/arm/dts/imx6sl-evk.dts +++ b/arch/arm/dts/imx6sl-evk.dts @@ -203,8 +203,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -393,8 +396,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8962@1a { @@ -565,6 +571,12 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6SL_PAD_I2C1_SCL__GPIO3_IO12 0x1b8b1 + MX6SL_PAD_I2C1_SDA__GPIO3_IO13 0x1b8b1 + >; + }; pinctrl_i2c2: i2c2grp { fsl,pins = < @@ -573,6 +585,13 @@ >; }; + pinctrl_i2c2_gpio: i2c2grp_gpio { + fsl,pins = < + MX6SL_PAD_I2C2_SCL__GPIO3_IO14 0x1b8b1 + MX6SL_PAD_I2C2_SDA__GPIO3_IO15 0x1b8b1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6SL_PAD_EPDC_SDCE2__I2C3_SCL 0x4001b8b1 diff --git a/arch/arm/dts/imx6sll-evk.dts b/arch/arm/dts/imx6sll-evk.dts index ee72b86a4e..a254b48bbd 100644 --- a/arch/arm/dts/imx6sll-evk.dts +++ b/arch/arm/dts/imx6sll-evk.dts @@ -162,8 +162,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -339,8 +342,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8962@1a { @@ -659,6 +665,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6SLL_PAD_I2C1_SCL__GPIO3_IO12 0x1b8b1 + MX6SLL_PAD_I2C1_SDA__GPIO3_IO13 0x1b8b1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6SLL_PAD_AUD_RXFS__I2C3_SCL 0x4041b8b1 @@ -666,6 +679,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3grp_gpio { + fsl,pins = < + MX6SLL_PAD_AUD_RXFS__GPIO1_IO00 0x41b8b1 + MX6SLL_PAD_AUD_RXC__GPIO1_IO01 0x41b8b1 + >; + }; + pinctrl_pwm1: pmw1grp { fsl,pins = < MX6SLL_PAD_PWM1__PWM1_OUT 0x110b0 diff --git a/arch/arm/dts/imx6sll-lpddr3-arm2.dts b/arch/arm/dts/imx6sll-lpddr3-arm2.dts index 17381f78a7..ad2106e156 100644 --- a/arch/arm/dts/imx6sll-lpddr3-arm2.dts +++ b/arch/arm/dts/imx6sll-lpddr3-arm2.dts @@ -173,8 +173,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -350,8 +353,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8962@1a { @@ -674,6 +680,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6SLL_PAD_I2C1_SCL__GPIO3_IO12 0x1b8b1 + MX6SLL_PAD_I2C1_SDA__GPIO3_IO13 0x1b8b1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6SLL_PAD_EPDC_SDCE2__I2C3_SCL 0x4041b8b1 @@ -681,6 +694,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3grp_gpio { + fsl,pins = < + MX6SLL_PAD_EPDC_SDCE2__GPIO1_IO29 0x41b8b1 + MX6SLL_PAD_EPDC_SDCE3__GPIO1_IO30 0x41b8b1 + >; + }; + pinctrl_pwm1: pmw1grp { fsl,pins = < MX6SLL_PAD_PWM1__PWM1_OUT 0x110b0 diff --git a/arch/arm/dts/imx6sx-14x14-arm2.dts b/arch/arm/dts/imx6sx-14x14-arm2.dts index 7b770f1b14..ec48b7de53 100644 --- a/arch/arm/dts/imx6sx-14x14-arm2.dts +++ b/arch/arm/dts/imx6sx-14x14-arm2.dts @@ -212,10 +212,13 @@ }; &i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1_1>; - status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_1>; + pinctrl-1 = <&pinctrl_i2c1_1_gpio>; + scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + status = "okay"; pmic: pfuze100@08 { compatible = "fsl,pfuze200"; @@ -306,10 +309,13 @@ }; &i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2_1>; - status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2_1>; + pinctrl-1 = <&pinctrl_i2c2_1_gpio>; + scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + status = "okay"; max7322_1: gpio@68 { compatible = "maxim,max7322"; @@ -338,17 +344,23 @@ &i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3_1>; - status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c3_1>; + pinctrl-1 = <&pinctrl_i2c3_1_gpio>; + scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; + status = "okay"; }; &i2c4 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c4_1>; - status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c4_1>; + pinctrl-1 = <&pinctrl_i2c4_1_gpio>; + scl-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + status = "okay"; }; &iomuxc { @@ -767,6 +779,13 @@ >; }; + pinctrl_i2c1_1_gpio: i2c1grp-1-gpio { + fsl,pins = < + MX6SX_PAD_GPIO1_IO01__GPIO1_IO_1 0x1b8b1 + MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 0x1b8b1 + >; + }; + pinctrl_i2c1_2: i2c1grp-2 { fsl,pins = < MX6SX_PAD_CSI_DATA01__I2C1_SDA 0x4001b8b1 @@ -782,6 +801,13 @@ MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1 >; }; + + pinctrl_i2c2_1_gpio: i2c2grp-1-gpio { + fsl,pins = < + MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3 0x1b8b1 + MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2 0x1b8b1 + >; + }; }; i2c3 { @@ -792,6 +818,13 @@ >; }; + pinctrl_i2c3_1_gpio: i2c3grp-1-gpio { + fsl,pins = < + MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0x1b8b1 + MX6SX_PAD_KEY_COL4__GPIO2_IO_14 0x1b8b1 + >; + }; + pinctrl_i2c3_2: i2c3grp-2 { fsl,pins = < MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1 @@ -807,6 +840,14 @@ MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1 >; }; + + pinctrl_i2c4_1_gpio: i2c4grp-1-gpio { + fsl,pins = < + MX6SX_PAD_CSI_DATA07__GPIO1_IO_21 0x1b8b1 + MX6SX_PAD_CSI_DATA06__GPIO1_IO_20 0x1b8b1 + >; + }; + pinctrl_i2c4_2: i2c4grp-2 { fsl,pins = < MX6SX_PAD_SD3_DATA1__I2C4_SDA 0x4001b8b1 diff --git a/arch/arm/dts/imx6sx-17x17-arm2.dts b/arch/arm/dts/imx6sx-17x17-arm2.dts index 40b381e8b5..d29143bc40 100644 --- a/arch/arm/dts/imx6sx-17x17-arm2.dts +++ b/arch/arm/dts/imx6sx-17x17-arm2.dts @@ -218,10 +218,13 @@ }; &i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1_1>; - status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_1>; + pinctrl-1 = <&pinctrl_i2c1_1_gpio>; + scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + status = "okay"; pmic: pfuze100@08 { compatible = "fsl,pfuze100"; @@ -325,10 +328,13 @@ }; &i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2_1>; - status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2_1>; + pinctrl-1 = <&pinctrl_i2c2_1_gpio>; + scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + status = "okay"; max7322_1: gpio@68 { compatible = "maxim,max7322"; @@ -357,17 +363,23 @@ &i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3_1>; - status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c3_1>; + pinctrl-1 = <&pinctrl_i2c3_1_gpio>; + scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; + status = "okay"; }; &i2c4 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c4_1>; - status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c4_1>; + pinctrl-1 = <&pinctrl_i2c4_1_gpio>; + scl-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + status = "okay"; }; &iomuxc { @@ -776,6 +788,13 @@ >; }; + pinctrl_i2c1_1_gpio: i2c1grp-1-gpio { + fsl,pins = < + MX6SX_PAD_GPIO1_IO01__GPIO1_IO_1 0x1b8b1 + MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 0x1b8b1 + >; + }; + pinctrl_i2c1_2: i2c1grp-2 { fsl,pins = < MX6SX_PAD_CSI_DATA01__I2C1_SDA 0x4001b8b1 @@ -791,6 +810,13 @@ MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1 >; }; + + pinctrl_i2c2_1_gpio: i2c2grp-1-gpio { + fsl,pins = < + MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3 0x1b8b1 + MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2 0x1b8b1 + >; + }; }; i2c3 { @@ -801,6 +827,13 @@ >; }; + pinctrl_i2c3_1_gpio: i2c3grp-1-gpio { + fsl,pins = < + MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0x1b8b1 + MX6SX_PAD_KEY_COL4__GPIO2_IO_14 0x1b8b1 + >; + }; + pinctrl_i2c3_2: i2c3grp-2 { fsl,pins = < MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1 @@ -816,6 +849,14 @@ MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1 >; }; + + pinctrl_i2c4_1_gpio: i2c4grp-1-gpio { + fsl,pins = < + MX6SX_PAD_CSI_DATA07__GPIO1_IO_21 0x1b8b1 + MX6SX_PAD_CSI_DATA06__GPIO1_IO_20 0x1b8b1 + >; + }; + pinctrl_i2c4_2: i2c4grp-2 { fsl,pins = < MX6SX_PAD_SD3_DATA1__I2C4_SDA 0x4001b8b1 diff --git a/arch/arm/dts/imx6sx-19x19-arm2.dts b/arch/arm/dts/imx6sx-19x19-arm2.dts index 36f11a7017..14eef732ca 100644 --- a/arch/arm/dts/imx6sx-19x19-arm2.dts +++ b/arch/arm/dts/imx6sx-19x19-arm2.dts @@ -170,8 +170,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1_1>; + pinctrl-1 = <&pinctrl_i2c1_1_gpio>; + scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -277,8 +280,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2_1>; + pinctrl-1 = <&pinctrl_i2c2_1_gpio>; + scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; status = "okay"; max7322_1: gpio@68 { @@ -322,15 +328,21 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3_1>; + pinctrl-1 = <&pinctrl_i2c3_1_gpio>; + scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; status = "okay"; }; &i2c4 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c4_2>; + pinctrl-1 = <&pinctrl_i2c4_2_gpio>; + scl-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>; status = "okay"; sgtl5000: sgtl5000@0a { @@ -743,6 +755,13 @@ >; }; + pinctrl_i2c1_1_gpio: i2c1grp-1-gpio { + fsl,pins = < + MX6SX_PAD_GPIO1_IO01__GPIO1_IO_1 0x1b8b1 + MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 0x1b8b1 + >; + }; + pinctrl_i2c1_2: i2c1grp-2 { fsl,pins = < MX6SX_PAD_CSI_DATA01__I2C1_SDA 0x4001b8b1 @@ -758,6 +777,13 @@ MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1 >; }; + + pinctrl_i2c2_1_gpio: i2c2grp-1-gpio { + fsl,pins = < + MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3 0x1b8b1 + MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2 0x1b8b1 + >; + }; }; i2c3 { @@ -768,6 +794,13 @@ >; }; + pinctrl_i2c3_1_gpio: i2c3grp-1-gpio { + fsl,pins = < + MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0x1b8b1 + MX6SX_PAD_KEY_COL4__GPIO2_IO_14 0x1b8b1 + >; + }; + pinctrl_i2c3_2: i2c3grp-2 { fsl,pins = < MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1 @@ -783,12 +816,20 @@ MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1 >; }; + pinctrl_i2c4_2: i2c4grp-2 { fsl,pins = < MX6SX_PAD_SD3_DATA1__I2C4_SDA 0x4001b8b1 MX6SX_PAD_SD3_DATA0__I2C4_SCL 0x4001b8b1 >; }; + + pinctrl_i2c4_2_gpio: i2c4grp-2-gpio { + fsl,pins = < + MX6SX_PAD_SD3_DATA1__GPIO7_IO_3 0x1b8b1 + MX6SX_PAD_SD3_DATA0__GPIO7_IO_2 0x1b8b1 + >; + }; }; lcdif1 { diff --git a/arch/arm/dts/imx6sx-sabreauto.dts b/arch/arm/dts/imx6sx-sabreauto.dts index bd8c9d71fe..39438a7733 100644 --- a/arch/arm/dts/imx6sx-sabreauto.dts +++ b/arch/arm/dts/imx6sx-sabreauto.dts @@ -285,8 +285,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2_1>; + pinctrl-1 = <&pinctrl_i2c2_1_gpio>; + scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; status = "okay"; codec: cs42888@048 { @@ -435,8 +438,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3_2>; + pinctrl-1 = <&pinctrl_i2c3_2_gpio>; + scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; status = "okay"; max7310_a: gpio@30 { @@ -746,6 +752,13 @@ >; }; + pinctrl_i2c2_1_gpio: i2c2grp-1-gpio { + fsl,pins = < + MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3 0x1b8b1 + MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2 0x1b8b1 + >; + }; + pinctrl_i2c3_2: i2c3grp-2 { fsl,pins = < MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1 @@ -753,6 +766,13 @@ >; }; + pinctrl_i2c3_2_gpio: i2c3grp-2-gpio { + fsl,pins = < + MX6SX_PAD_KEY_ROW4__GPIO2_IO_19 0x1b8b1 + MX6SX_PAD_KEY_COL4__GPIO2_IO_14 0x1b8b1 + >; + }; + pinctrl_mlb_2: mlbgrp-2 { fsl,pins = < MX6SX_PAD_ENET2_RX_CLK__MLB_DATA 0x31 diff --git a/arch/arm/dts/imx6sx-sdb.dtsi b/arch/arm/dts/imx6sx-sdb.dtsi index 523dfdb26d..9781adcc48 100644 --- a/arch/arm/dts/imx6sx-sdb.dtsi +++ b/arch/arm/dts/imx6sx-sdb.dtsi @@ -322,8 +322,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -449,8 +452,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; status = "okay"; egalax_ts@04 { @@ -466,8 +472,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; status = "okay"; isl29023@44 { @@ -499,10 +508,13 @@ }; &i2c4 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c4>; - status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c4>; + pinctrl-1 = <&pinctrl_i2c4_gpio>; + scl-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + status = "okay"; codec: wm8962@1a { compatible = "wlf,wm8962"; @@ -820,6 +832,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp-gpio { + fsl,pins = < + MX6SX_PAD_GPIO1_IO01__GPIO1_IO_1 0x1b8b1 + MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 0x1b8b1 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1 @@ -827,6 +846,12 @@ >; }; + pinctrl_i2c2_gpio: i2c2grp-gpio { + fsl,pins = < + MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3 0x1b8b1 + MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2 0x1b8b1 + >; + }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1 @@ -834,6 +859,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3grp-gpio { + fsl,pins = < + MX6SX_PAD_KEY_ROW4__GPIO2_IO_19 0x1b8b1 + MX6SX_PAD_KEY_COL4__GPIO2_IO_14 0x1b8b1 + >; + }; + pinctrl_i2c4: i2c4grp { fsl,pins = < MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x4001b8b1 @@ -841,6 +873,13 @@ >; }; + pinctrl_i2c4_gpio: i2c4grp-gpio { + fsl,pins = < + MX6SX_PAD_CSI_DATA07__GPIO1_IO_21 0x1b8b1 + MX6SX_PAD_CSI_DATA06__GPIO1_IO_20 0x1b8b1 + >; + }; + pinctrl_lcd: lcdgrp { fsl,pins = < MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0 diff --git a/arch/arm/dts/imx6ul-14x14-ddr3-arm2.dts b/arch/arm/dts/imx6ul-14x14-ddr3-arm2.dts index d7df567e76..7bb4f262eb 100644 --- a/arch/arm/dts/imx6ul-14x14-ddr3-arm2.dts +++ b/arch/arm/dts/imx6ul-14x14-ddr3-arm2.dts @@ -194,8 +194,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -407,6 +410,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x1b8b1 + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x1b8b1 + >; + }; + pinctrl_i2c4: i2c4grp { fsl,pins = < MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001b8b0 diff --git a/arch/arm/dts/imx6ul-14x14-evk.dts b/arch/arm/dts/imx6ul-14x14-evk.dts index f2b3ec3b84..c160f7e353 100644 --- a/arch/arm/dts/imx6ul-14x14-evk.dts +++ b/arch/arm/dts/imx6ul-14x14-evk.dts @@ -223,8 +223,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; status = "okay"; mag3110@0e { @@ -244,8 +247,11 @@ &i2c2 { clock_frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8960@1a { @@ -362,6 +368,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0 + MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 @@ -369,6 +382,13 @@ >; }; + pinctrl_i2c2_gpio: i2c2grp_gpio { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0 + MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0 + >; + }; + pinctrl_lcdif_dat: lcdifdatgrp { fsl,pins = < MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 diff --git a/arch/arm/dts/imx6ul-9x9-evk.dts b/arch/arm/dts/imx6ul-9x9-evk.dts index 04a562b9a8..cc4e83a86b 100644 --- a/arch/arm/dts/imx6ul-9x9-evk.dts +++ b/arch/arm/dts/imx6ul-9x9-evk.dts @@ -243,8 +243,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze3000@08 { @@ -355,8 +358,11 @@ &i2c2 { clock_frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8960@1a { @@ -473,6 +479,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0 + MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 @@ -480,6 +493,13 @@ >; }; + pinctrl_i2c2_gpio: i2c2grp_gpio { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0 + MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0 + >; + }; + pinctrl_lcdif_ctrl: lcdifctrlgrp { fsl,pins = < MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 diff --git a/arch/arm/dts/imx6ull-14x14-ddr3-arm2.dts b/arch/arm/dts/imx6ull-14x14-ddr3-arm2.dts index 4a30557ec1..3194cb2cde 100644 --- a/arch/arm/dts/imx6ull-14x14-ddr3-arm2.dts +++ b/arch/arm/dts/imx6ull-14x14-ddr3-arm2.dts @@ -210,8 +210,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -320,8 +323,11 @@ &i2c4 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c4>; + pinctrl-1 = <&pinctrl_i2c4_gpio>; + scl-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; status = "okay"; max17135: max17135@48 { @@ -554,6 +560,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x1b8b1 + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x1b8b1 + >; + }; + pinctrl_i2c4: i2c4grp { fsl,pins = < MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001b8b0 @@ -561,6 +574,13 @@ >; }; + pinctrl_i2c4_gpio: i2c4grp_gpio { + fsl,pins = < + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x1b8b0 + MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21 0x1b8b0 + >; + }; + pinctrl_lcdif_dat: lcdifdatgrp { fsl,pins = < MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 diff --git a/arch/arm/dts/imx6ull-14x14-evk.dts b/arch/arm/dts/imx6ull-14x14-evk.dts index 113a084d80..ae544f0b33 100644 --- a/arch/arm/dts/imx6ull-14x14-evk.dts +++ b/arch/arm/dts/imx6ull-14x14-evk.dts @@ -223,8 +223,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; status = "okay"; mag3110@0e { @@ -244,8 +247,11 @@ &i2c2 { clock_frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8960@1a { @@ -355,6 +361,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0 + MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 @@ -362,6 +375,13 @@ >; }; + pinctrl_i2c2_gpio: i2c2grp_gpio { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0 + MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0 + >; + }; + pinctrl_lcdif_dat: lcdifdatgrp { fsl,pins = < MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 diff --git a/arch/arm/dts/imx6ull-9x9-evk.dts b/arch/arm/dts/imx6ull-9x9-evk.dts index 003a20679e..9377b1fc91 100644 --- a/arch/arm/dts/imx6ull-9x9-evk.dts +++ b/arch/arm/dts/imx6ull-9x9-evk.dts @@ -243,8 +243,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze3000@08 { @@ -355,8 +358,11 @@ &i2c2 { clock_frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8960@1a { @@ -466,6 +472,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0 + MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 @@ -473,6 +486,13 @@ >; }; + pinctrl_i2c2_gpio: i2c2grp_gpio { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0 + MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0 + >; + }; + pinctrl_lcdif_ctrl: lcdifctrlgrp { fsl,pins = < MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 diff --git a/arch/arm/dts/imx7d-12x12-ddr3-arm2.dts b/arch/arm/dts/imx7d-12x12-ddr3-arm2.dts index f29da2b40a..725dd16964 100644 --- a/arch/arm/dts/imx7d-12x12-ddr3-arm2.dts +++ b/arch/arm/dts/imx7d-12x12-ddr3-arm2.dts @@ -154,8 +154,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1_1>; + pinctrl-1 = <&pinctrl_i2c1_1_gpio>; + scl-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze3000@08 { @@ -250,8 +253,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3_1>; + pinctrl-1 = <&pinctrl_i2c3_1_gpio>; + scl-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; status = "okay"; }; @@ -313,6 +319,13 @@ >; }; + pinctrl_i2c3_1_gpio: i2c3grp-1-gpio { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x7f + MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x7f + >; + }; + pinctrl_i2c4_1: i2c4grp-1 { fsl,pins = < MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f @@ -449,6 +462,13 @@ >; }; + pinctrl_i2c1_1_gpio: i2c1grp-1-gpio { + fsl,pins = < + MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x7f + MX7D_PAD_GPIO1_IO06__GPIO1_IO6 0x7f + >; + }; + pinctrl_i2c2_1: i2c2grp-1 { fsl,pins = < MX7D_PAD_GPIO1_IO06__I2C2_SCL 0x4000007f diff --git a/arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts b/arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts index eb4af7df7b..e74707bd57 100644 --- a/arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts +++ b/arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts @@ -245,9 +245,12 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default", "sleep"; + pinctrl-names = "default", "sleep", "gpio"; pinctrl-0 = <&pinctrl_i2c1_1>; pinctrl-1 = <&pinctrl_i2c1_1>; + pinctrl-2 = <&pinctrl_i2c1_1_gpio>; + scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze3000@08 { @@ -343,9 +346,12 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default", "sleep"; + pinctrl-names = "default", "sleep", "gpio"; pinctrl-0 = <&pinctrl_i2c3_1>; pinctrl-1 = <&pinctrl_i2c3_1>; + pinctrl-2 = <&pinctrl_i2c3_1_gpio>; + scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; status = "okay"; max7322: gpio@68 { @@ -613,6 +619,13 @@ >; }; + pinctrl_i2c1_1_gpio: i2c1grp-1-gpio { + fsl,pins = < + MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x7f + MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x7f + >; + }; + pinctrl_i2c2_1: i2c2grp-1 { fsl,pins = < MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f @@ -627,6 +640,13 @@ >; }; + pinctrl_i2c3_1_gpio: i2c3grp-1-gpio { + fsl,pins = < + MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x7f + MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x7f + >; + }; + pinctrl_i2c4_1: i2c4grp-1 { fsl,pins = < MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f diff --git a/arch/arm/dts/imx7d-19x19-ddr3-arm2.dts b/arch/arm/dts/imx7d-19x19-ddr3-arm2.dts index d487d13bbd..58b5e3139b 100644 --- a/arch/arm/dts/imx7d-19x19-ddr3-arm2.dts +++ b/arch/arm/dts/imx7d-19x19-ddr3-arm2.dts @@ -216,8 +216,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1_1>; + pinctrl-1 = <&pinctrl_i2c1_1_gpio>; + scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze3000@08 { @@ -312,15 +315,21 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2_1>; + pinctrl-1 = <&pinctrl_i2c2_1_gpio>; + scl-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; status = "okay"; }; &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3_1>; + pinctrl-1 = <&pinctrl_i2c3_1_gpio>; + scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; status = "okay"; max7322: gpio@68 { @@ -460,6 +469,13 @@ >; }; + pinctrl_i2c1_1_gpio: i2c1grp-1-gpio { + fsl,pins = < + MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x7f + MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x7f + >; + }; + pinctrl_i2c2_1: i2c2grp-1 { fsl,pins = < MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f @@ -467,6 +483,13 @@ >; }; + pinctrl_i2c2_1_gpio: i2c2grp-1-gpio { + fsl,pins = < + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x7f + MX7D_PAD_I2C2_SCL__GPIO4_IO10 0x7f + >; + }; + pinctrl_i2c3_1: i2c3grp-1 { fsl,pins = < MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f @@ -474,6 +497,13 @@ >; }; + pinctrl_i2c3_1_gpio: i2c3grp-1-gpio { + fsl,pins = < + MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x7f + MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x7f + >; + }; + pinctrl_i2c4_1: i2c4grp-1 { fsl,pins = < MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f diff --git a/arch/arm/dts/imx7d-19x19-lpddr2-arm2.dts b/arch/arm/dts/imx7d-19x19-lpddr2-arm2.dts index 2af374c666..8541551c31 100644 --- a/arch/arm/dts/imx7d-19x19-lpddr2-arm2.dts +++ b/arch/arm/dts/imx7d-19x19-lpddr2-arm2.dts @@ -92,8 +92,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1_1>; + pinctrl-1 = <&pinctrl_i2c1_1_gpio>; + scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze3000@08 { @@ -188,8 +191,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2_1>; + pinctrl-1 = <&pinctrl_i2c2_1_gpio>; + scl-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; status = "okay"; }; @@ -246,6 +252,13 @@ >; }; + pinctrl_i2c1_1_gpio: i2c1grp-1-gpio { + fsl,pins = < + MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x7f + MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x7f + >; + }; + pinctrl_i2c2_1: i2c2grp-1 { fsl,pins = < MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f @@ -253,6 +266,13 @@ >; }; + pinctrl_i2c2_1_gpio: i2c2grp-1-gpio { + fsl,pins = < + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x7f + MX7D_PAD_I2C2_SCL__GPIO4_IO10 0x7f + >; + }; + pinctrl_weim_cs0_1: weim_cs0grp-1 { fsl,pins = < MX7D_PAD_EPDC_DATA10__EIM_CS0_B 0x71 diff --git a/arch/arm/dts/imx7d-19x19-lpddr3-arm2.dts b/arch/arm/dts/imx7d-19x19-lpddr3-arm2.dts index 35f1bf7745..8c000da233 100644 --- a/arch/arm/dts/imx7d-19x19-lpddr3-arm2.dts +++ b/arch/arm/dts/imx7d-19x19-lpddr3-arm2.dts @@ -99,8 +99,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1_1>; + pinctrl-1 = <&pinctrl_i2c1_1_gpio>; + scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze3000@08 { @@ -195,8 +198,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2_1>; + pinctrl-1 = <&pinctrl_i2c2_1_gpio>; + scl-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; status = "okay"; }; @@ -253,6 +259,13 @@ >; }; + pinctrl_i2c1_1_gpio: i2c1grp-1-gpio { + fsl,pins = < + MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x7f + MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x7f + >; + }; + pinctrl_i2c2_1: i2c2grp-1 { fsl,pins = < MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f @@ -260,6 +273,13 @@ >; }; + pinctrl_i2c2_1_gpio: i2c2grp-1-gpio { + fsl,pins = < + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x7f + MX7D_PAD_I2C2_SCL__GPIO4_IO10 0x7f + >; + }; + pinctrl_weim_cs0_1: weim_cs0grp-1 { fsl,pins = < MX7D_PAD_EPDC_DATA10__EIM_CS0_B 0x71 diff --git a/arch/arm/dts/imx7d-sdb.dts b/arch/arm/dts/imx7d-sdb.dts index 5b882bbc12..9be4d48c82 100644 --- a/arch/arm/dts/imx7d-sdb.dts +++ b/arch/arm/dts/imx7d-sdb.dts @@ -298,8 +298,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze3000@08 { @@ -396,8 +399,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; status = "okay"; fxas2100x@20 { @@ -418,8 +424,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; status = "okay"; sii902x: sii902x@39 { @@ -507,8 +516,11 @@ &i2c4 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c4>; + pinctrl-1 = <&pinctrl_i2c4_gpio>; + scl-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8960@1a { @@ -687,6 +699,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x7f + MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x7f + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f @@ -694,6 +713,13 @@ >; }; + pinctrl_i2c2_gpio: i2c2grp_gpio { + fsl,pins = < + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x7f + MX7D_PAD_I2C2_SCL__GPIO4_IO10 0x7f + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f @@ -701,6 +727,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3grp_gpio { + fsl,pins = < + MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x7f + MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x7f + >; + }; + pinctrl_i2c4: i2c4grp { fsl,pins = < MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f @@ -708,6 +741,13 @@ >; }; + pinctrl_i2c4_gpio: i2c4grp_gpio { + fsl,pins = < + MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x7f + MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x7f + >; + }; + pinctrl_lcdif_dat: lcdifdatgrp { fsl,pins = < MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 3565780999..159d9f3581 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -130,7 +130,6 @@ static struct i2c_pads_info i2c_pad_info1 = { .gp = IMX_GPIO_NR(4, 13) } }; -#endif #ifndef CONFIG_SYS_FLASH_CFI /* @@ -150,6 +149,7 @@ static struct i2c_pads_info i2c_pad_info2 = { } }; #endif +#endif static iomux_v3_cfg_t const i2c3_pads[] = { MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), @@ -819,16 +819,15 @@ int board_init(void) #ifdef CONFIG_SYS_I2C /* I2C 2 and 3 setup - I2C 3 hw mux with EIM */ setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); +#ifndef CONFIG_SYS_FLASH_CFI + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); +#endif #endif /* I2C 3 Steer */ gpio_request(IMX_GPIO_NR(5, 4), "steer logic"); gpio_direction_output(IMX_GPIO_NR(5, 4), 1); imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads)); - -#ifndef CONFIG_SYS_FLASH_CFI - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); -#endif gpio_request(IMX_GPIO_NR(1, 15), "expander en"); gpio_direction_output(IMX_GPIO_NR(1, 15), 1); diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index 108305e5bd..f541425e9d 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -362,6 +362,7 @@ int board_mmc_init(bd_t *bis) #endif } +#ifdef CONFIG_SYS_I2C #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) /* I2C1 for PMIC */ struct i2c_pads_info i2c_pad_info1 = { @@ -376,6 +377,7 @@ struct i2c_pads_info i2c_pad_info1 = { .gp = IMX_GPIO_NR(3, 12), }, }; +#endif #ifdef CONFIG_POWER int power_init_board(void) @@ -817,11 +819,12 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; -#ifdef CONFIG_SYS_I2C_MXC +#ifdef CONFIG_SYS_I2C setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - setup_elan_pads(); #endif + setup_elan_pads(); + #ifdef CONFIG_FEC_MXC setup_fec(); #endif diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 9563acfd2c..f99048af71 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -269,6 +269,7 @@ int board_eth_init(bd_t *bis) return cpu_eth_init(bis); } +#ifdef CONFIG_SYS_I2C #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) /* I2C1 for PMIC */ static struct i2c_pads_info i2c_pad_info1 = { @@ -297,6 +298,7 @@ struct i2c_pads_info i2c_pad_info2 = { .gp = IMX_GPIO_NR(1, 3), }, }; +#endif #ifdef CONFIG_POWER int power_init_board(void) @@ -927,7 +929,7 @@ int board_init(void) gpio_request(IMX_GPIO_NR(4, 16), "peri_3v3"); gpio_direction_output(IMX_GPIO_NR(4, 16) , 1); -#ifdef CONFIG_SYS_I2C_MXC +#ifdef CONFIG_SYS_I2C setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); #endif diff --git a/board/freescale/mx6sxscm/mx6sxscm.c b/board/freescale/mx6sxscm/mx6sxscm.c index a5a559b864..36d527dd52 100644 --- a/board/freescale/mx6sxscm/mx6sxscm.c +++ b/board/freescale/mx6sxscm/mx6sxscm.c @@ -271,6 +271,7 @@ int mx6_rgmii_rework(struct phy_device *phydev) return 0; } +#ifdef CONFIG_SYS_I2C #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) /* I2C1 for PMIC */ static struct i2c_pads_info i2c_pad_info1 = { @@ -313,6 +314,7 @@ struct i2c_pads_info i2c_pad_info4 = { .gp = IMX_GPIO_NR(1, 21), }, }; +#endif #ifdef CONFIG_POWER int power_init_board(void) @@ -907,7 +909,7 @@ int board_init(void) gpio_request(IMX_GPIO_NR(4, 16), "peri_3v3"); gpio_direction_output(IMX_GPIO_NR(4, 16) , 1); -#ifdef CONFIG_SYS_I2C_MXC +#ifdef CONFIG_SYS_I2C setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info4); -- 2.17.1