From 0ed92100f3f61f9004aebe7b88b3aa1198af03af Mon Sep 17 00:00:00 2001
From: Leonard Crestez <leonard.crestez@nxp.com>
Date: Thu, 2 May 2019 16:58:34 +0300
Subject: [PATCH] MLK-21682-2 arm64: dts: imx8mq: Fix DT warnings from power
 domains

Move under a power-domains node, add reg properties and rename
everything to power-domain@X

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Jacky Bai <ping.bai@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi | 129 ++++++++++--------
 1 file changed, 72 insertions(+), 57 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
index b49ce7e5c6f1..8bba31266477 100755
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
@@ -196,71 +196,86 @@
 		};
 	};
 
-	mipi_pd: gpc_power_domain@0 {
-		compatible = "fsl,imx8mq-pm-domain";
-		#power-domain-cells = <0>;
-		domain-id = <0>;
-		domain-name = "MIPI_PD";
-	};
+	power-domains {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
 
-	pcie0_pd: gpc_power_domain@1 {
-		compatible = "fsl,imx8mq-pm-domain";
-		#power-domain-cells = <0>;
-		domain-id = <1>;
-		domain-name = "PCIE0_PD";
-	};
+		mipi_pd: power-domain@0 {
+			compatible = "fsl,imx8mq-pm-domain";
+			reg = <0>;
+			#power-domain-cells = <0>;
+			domain-id = <0>;
+			domain-name = "MIPI_PD";
+		};
 
-	usb_otg1_pd: gpc_power_domain@2 {
-		compatible = "fsl,imx8mq-pm-domain";
-		#power-domain-cells = <0>;
-		domain-id = <2>;
-		domain-name = "USB_OTG1_PD";
-	};
+		pcie0_pd: power-domain@1 {
+			compatible = "fsl,imx8mq-pm-domain";
+			reg = <1>;
+			#power-domain-cells = <0>;
+			domain-id = <1>;
+			domain-name = "PCIE0_PD";
+		};
 
-	usb_otg2_pd: gpc_power_domain@3 {
-		compatible = "fsl,imx8mq-pm-domain";
-		#power-domain-cells = <0>;
-		domain-id = <3>;
-		domain-name = "USB_OTG2_PD";
-	};
+		usb_otg1_pd: power-domain@2 {
+			compatible = "fsl,imx8mq-pm-domain";
+			reg = <2>;
+			#power-domain-cells = <0>;
+			domain-id = <2>;
+			domain-name = "USB_OTG1_PD";
+		};
 
-	gpu_pd: gpc_power_domain@4 {
-		compatible = "fsl,imx8mq-pm-domain";
-		#power-domain-cells = <0>;
-		domain-id = <4>;
-		domain-name = "GPU_PD";
-		clocks = <&clk IMX8MQ_CLK_GPU_AXI>, <&clk IMX8MQ_CLK_GPU_SHADER_DIV>,
-			 <&clk IMX8MQ_CLK_GPU_ROOT>, <&clk IMX8MQ_CLK_GPU_AHB>;
-	};
+		usb_otg2_pd: power-domain@3 {
+			compatible = "fsl,imx8mq-pm-domain";
+			reg = <3>;
+			#power-domain-cells = <0>;
+			domain-id = <3>;
+			domain-name = "USB_OTG2_PD";
+		};
 
-	vpu_pd: gpc_power_domain@5 {
-		compatible = "fsl,imx8mq-pm-domain";
-		#power-domain-cells = <0>;
-		domain-id = <5>;
-		domain-name = "VPU_PD";
-		clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
-			 <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
-	};
+		gpu_pd: power-domain@4 {
+			compatible = "fsl,imx8mq-pm-domain";
+			reg = <4>;
+			#power-domain-cells = <0>;
+			domain-id = <4>;
+			domain-name = "GPU_PD";
+			clocks = <&clk IMX8MQ_CLK_GPU_AXI>, <&clk IMX8MQ_CLK_GPU_SHADER_DIV>,
+				 <&clk IMX8MQ_CLK_GPU_ROOT>, <&clk IMX8MQ_CLK_GPU_AHB>;
+		};
 
-	mipi_csi1_pd: gpc_power_domain@8 {
-		compatible = "fsl,imx8mq-pm-domain";
-		#power-domain-cells = <0>;
-		domain-id = <8>;
-		domain-name = "MIPI_CSI1_PD";
-	};
+		vpu_pd: power-domain@5 {
+			compatible = "fsl,imx8mq-pm-domain";
+			reg = <5>;
+			#power-domain-cells = <0>;
+			domain-id = <5>;
+			domain-name = "VPU_PD";
+			clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
+				 <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
+		};
 
-	mipi_csi2_pd: gpc_power_domain@9 {
-		compatible = "fsl,imx8mq-pm-domain";
-		#power-domain-cells = <0>;
-		domain-id = <9>;
-		domain-name = "MIPI_CSI2_PD";
-	};
+		mipi_csi1_pd: power-domain@8 {
+			compatible = "fsl,imx8mq-pm-domain";
+			reg = <8>;
+			#power-domain-cells = <0>;
+			domain-id = <8>;
+			domain-name = "MIPI_CSI1_PD";
+		};
 
-	pcie1_pd: gpc_power_domain@10 {
-		compatible = "fsl,imx8mq-pm-domain";
-		#power-domain-cells = <0>;
-		domain-id = <10>;
-		domain-name = "PCIE1_PD";
+		mipi_csi2_pd: power-domain@9 {
+			compatible = "fsl,imx8mq-pm-domain";
+			reg = <9>;
+			#power-domain-cells = <0>;
+			domain-id = <9>;
+			domain-name = "MIPI_CSI2_PD";
+		};
+
+		pcie1_pd: power-domain@10 {
+			compatible = "fsl,imx8mq-pm-domain";
+			reg = <10>;
+			#power-domain-cells = <0>;
+			domain-id = <10>;
+			domain-name = "PCIE1_PD";
+		};
 	};
 
 	pwm1: pwm@30660000 {
-- 
2.17.1