From 0ec436b34498cbf1a52868fb53cacef01013aaec Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Thu, 13 Jul 2017 20:40:25 +0800 Subject: [PATCH] MLK-15978 arm64: dts: imx8: change can clock rate to 40Mhz CAN needs at least 40Mhz PE clock rate to support CAN FD well. Signed-off-by: Dong Aisheng --- arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | 6 +++--- arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi index 54b05e1ba226..548250657ea0 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi @@ -1573,7 +1573,7 @@ <&clk IMX8QM_CAN0_CLK>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX8QM_CAN0_CLK>; - assigned-clock-rates = <24000000>; + assigned-clock-rates = <40000000>; power-domains = <&pd_dma_flexcan0>; status = "disabled"; }; @@ -1586,7 +1586,7 @@ <&clk IMX8QM_CAN1_CLK>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX8QM_CAN1_CLK>; - assigned-clock-rates = <24000000>; + assigned-clock-rates = <40000000>; power-domains = <&pd_dma_flexcan1>; status = "disabled"; }; @@ -1599,7 +1599,7 @@ <&clk IMX8QM_CAN2_CLK>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX8QM_CAN2_CLK>; - assigned-clock-rates = <24000000>; + assigned-clock-rates = <40000000>; power-domains = <&pd_dma_flexcan2>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi index 71c86c13c7a7..787c229d8377 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi @@ -1344,7 +1344,7 @@ <&clk IMX8QXP_CAN0_CLK>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX8QXP_CAN0_CLK>; - assigned-clock-rates = <24000000>; + assigned-clock-rates = <40000000>; power-domains = <&pd_dma_flexcan0>; status = "disabled"; }; @@ -1358,7 +1358,7 @@ <&clk IMX8QXP_CAN0_CLK>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX8QXP_CAN0_CLK>; - assigned-clock-rates = <24000000>; + assigned-clock-rates = <40000000>; power-domains = <&pd_dma_flexcan0>; status = "disabled"; }; @@ -1372,7 +1372,7 @@ <&clk IMX8QXP_CAN0_CLK>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX8QXP_CAN0_CLK>; - assigned-clock-rates = <24000000>; + assigned-clock-rates = <40000000>; power-domains = <&pd_dma_flexcan0>; status = "disabled"; }; -- 2.17.1