From 0baaf942fb6f753716d4172fa0a36bfce4c9f98a Mon Sep 17 00:00:00 2001 From: Sandor Yu Date: Thu, 12 Apr 2018 10:59:21 +0800 Subject: [PATCH] MLK-18267-3: hdp api: Add HDMI RX API function Add HDMI RX video and audio API function and head files. This API base on CDN_API_1_0_36. Signed-off-by: Sandor Yu --- drivers/mxc/hdp/API_AFE.h | 1 + drivers/mxc/hdp/API_HDMIRX.c | 236 ++++++++++++++++ drivers/mxc/hdp/API_HDMIRX.h | 135 +++++++++ drivers/mxc/hdp/API_HDMI_RX_Audio.c | 185 ++++++++++++ drivers/mxc/hdp/API_HDMI_RX_Audio.h | 80 ++++++ drivers/mxc/hdp/Kconfig | 9 +- drivers/mxc/hdp/Makefile | 4 + drivers/mxc/hdp/all.h | 3 + drivers/mxc/hdp/sink_aif_encoder.h | 367 ++++++++++++++++++++++++ drivers/mxc/hdp/sink_car.h | 168 +++++++++++ drivers/mxc/hdp/sink_clk_meters.h | 241 ++++++++++++++++ drivers/mxc/hdp/sink_core.h | 117 ++++++++ drivers/mxc/hdp/sink_mhl_hd.h | 418 ++++++++++++++++++++++++++++ drivers/mxc/hdp/sink_pif.h | 160 +++++++++++ drivers/mxc/hdp/sink_vif.h | 285 +++++++++++++++++++ 15 files changed, 2402 insertions(+), 7 deletions(-) create mode 100644 drivers/mxc/hdp/API_HDMIRX.c create mode 100644 drivers/mxc/hdp/API_HDMIRX.h create mode 100644 drivers/mxc/hdp/API_HDMI_RX_Audio.c create mode 100644 drivers/mxc/hdp/API_HDMI_RX_Audio.h create mode 100644 drivers/mxc/hdp/sink_aif_encoder.h create mode 100644 drivers/mxc/hdp/sink_car.h create mode 100644 drivers/mxc/hdp/sink_clk_meters.h create mode 100644 drivers/mxc/hdp/sink_core.h create mode 100644 drivers/mxc/hdp/sink_mhl_hd.h create mode 100644 drivers/mxc/hdp/sink_pif.h create mode 100644 drivers/mxc/hdp/sink_vif.h diff --git a/drivers/mxc/hdp/API_AFE.h b/drivers/mxc/hdp/API_AFE.h index 54e49be554cf..37ddaa4ff568 100644 --- a/drivers/mxc/hdp/API_AFE.h +++ b/drivers/mxc/hdp/API_AFE.h @@ -83,6 +83,7 @@ typedef struct { u32 value; u8 lsb; u8 msb; + u8 *label; } reg_field_t; u8 AFE_check_rate_supported(ENUM_AFE_LINK_RATE rate); diff --git a/drivers/mxc/hdp/API_HDMIRX.c b/drivers/mxc/hdp/API_HDMIRX.c new file mode 100644 index 000000000000..7dcb9254fd06 --- /dev/null +++ b/drivers/mxc/hdp/API_HDMIRX.c @@ -0,0 +1,236 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * API_HDMIRX.c + * + ****************************************************************************** + */ + +#include "API_HDMIRX.h" +#include "util.h" +#include "opcodes.h" +#include "address.h" +#include "sink_vif.h" + +CDN_API_STATUS CDN_API_HDMIRX_ReadEvent(state_struct *state, u8 *Events_5v) +{ + CDN_API_STATUS ret; + u8 reserved1; + u8 reserved2; + u8 reserved3; + if (!state->running) { + if (!internal_apb_available(state)) + return CDN_BSY; + internal_tx_mkfullmsg(state, MB_MODULE_ID_HDMI_RX, HDMI_RX_READ_EVENTS, 0); + state->rxEnable = 1; + state->bus_type = CDN_BUS_TYPE_APB; + return CDN_STARTED; + } + internal_process_messages(state); + ret = internal_test_rx_head(state, MB_MODULE_ID_HDMI_RX, HDMI_RX_READ_EVENTS); + if (ret != CDN_OK) + return ret; + internal_readmsg(state, + 4, + 1, + Events_5v, + 1, + &reserved1, + 1, + &reserved2, + 1, + &reserved3); + return CDN_OK; +} + +CDN_API_STATUS CDN_API_HDMIRX_ReadEvent_blocking( + state_struct *state, + u8 *Events_5v) +{ + internal_block_function(&state->mutex, CDN_API_HDMIRX_ReadEvent(state, Events_5v)); +} + +CDN_API_STATUS CDN_API_HDMIRX_Init_blocking(state_struct *state) +{ + CDN_API_STATUS ret; + + ret = + CDN_API_General_Write_Register_blocking(state, + ADDR_SINK_VIDEO_HD + (VIDEO_UNPACK_CTRL << 2), + F_CD_ENABLE(1)); + ret = + CDN_API_General_Write_Register_blocking(state, + ADDR_SINK_VIDEO_HD + (VANLYZ_CTRL << 2), + F_VANLYZ_START(1) | + F_VANLYZ_FRAMES_CHECK_EN(1) | + F_VANLYZ_FORMAT_FINDER_EN(1)); + + return ret; +} + +CDN_API_STATUS CDN_API_HDMIRX_Stop_blocking(state_struct *state) +{ + CDN_API_STATUS ret; + + ret = + CDN_API_General_Write_Register_blocking(state, + ADDR_SINK_VIDEO_HD + (VIDEO_UNPACK_CTRL << 2), + F_CD_ENABLE(0)); + ret = + CDN_API_General_Write_Register_blocking(state, + ADDR_SINK_VIDEO_HD + (VANLYZ_CTRL << 2), F_VANLYZ_RESET(1)); + + return ret; +} + +CDN_API_STATUS CDN_API_HDMIRX_SET_EDID( + state_struct *state, + u8 segment, + u8 extension, + u8 *edid_buff) +{ + if (!state->running) { + if (!internal_apb_available(state)) + return CDN_BSY; + internal_tx_mkfullmsg(state, + MB_MODULE_ID_HDMI_RX, + HDMI_RX_SET_EDID, + 3, + 1, + segment, + 1, + extension, + -128, + edid_buff); + state->bus_type = CDN_BUS_TYPE_APB; + return CDN_STARTED; + } + internal_process_messages(state); + return CDN_OK; +} + +CDN_API_STATUS CDN_API_HDMIRX_SET_EDID_blocking( + state_struct *state, + u8 segment, + u8 extension, + u8 *edid_buff) +{ + internal_block_function(&state->mutex, + CDN_API_HDMIRX_SET_EDID(state, segment, extension, edid_buff)); +} + +CDN_API_STATUS CDN_API_HDMIRX_SET_SCDC_SLAVE(state_struct *state, + S_HDMI_SCDC_SET_MSG *scdcData) +{ + if (!state->running) { + if (!internal_apb_available(state)) + return CDN_BSY; + internal_tx_mkfullmsg(state, + MB_MODULE_ID_HDMI_RX, + HDMI_RX_SCDC_SET, + 1, + -sizeof(S_HDMI_SCDC_SET_MSG), + scdcData); + state->bus_type = CDN_BUS_TYPE_APB; + return CDN_STARTED; + } + internal_process_messages(state); + return CDN_OK; +} + +CDN_API_STATUS CDN_API_HDMIRX_SET_SCDC_SLAVE_blocking( + state_struct *state, + S_HDMI_SCDC_SET_MSG *scdcData) +{ + internal_block_function(&state->mutex, + CDN_API_HDMIRX_SET_SCDC_SLAVE(state, scdcData)); +} + +CDN_API_STATUS CDN_API_HDMIRX_GET_SCDC_SLAVE(state_struct *state, + S_HDMI_SCDC_GET_MSG *scdcData) +{ + CDN_API_STATUS ret; + if (!state->running) { + if (!internal_apb_available(state)) + return CDN_BSY; + internal_tx_mkfullmsg(state, MB_MODULE_ID_HDMI_RX, HDMI_RX_SCDC_GET, 0); + state->bus_type = CDN_BUS_TYPE_APB; + state->rxEnable = 1; + return CDN_STARTED; + } + internal_process_messages(state); + ret = internal_test_rx_head(state, MB_MODULE_ID_HDMI_RX, HDMI_RX_SCDC_GET); + if (ret != CDN_OK) + return ret; + internal_readmsg(state, + 4, + 1, &scdcData->source_ver, + 1, &scdcData->TMDS_Config, + 1, &scdcData->config_0, + -sizeof(scdcData->manufacturerSpecific), + &scdcData->manufacturerSpecific); + return CDN_OK; +} + +CDN_API_STATUS CDN_API_HDMIRX_GET_SCDC_SLAVE_blocking(state_struct *state, + S_HDMI_SCDC_GET_MSG *scdcData) +{ + internal_block_function(&state->mutex, + CDN_API_HDMIRX_GET_SCDC_SLAVE(state, scdcData)); +} + +CDN_API_STATUS CDN_API_HDMIRX_SetHpd(state_struct *state, u8 hpd) +{ + if (!state->running) { + if (!internal_apb_available(state)) + return CDN_BSY; + internal_tx_mkfullmsg(state, MB_MODULE_ID_HDMI_RX, HDMI_RX_SET_HPD, 1, 1, hpd); + state->bus_type = CDN_BUS_TYPE_APB; + return CDN_STARTED; + } + internal_process_messages(state); + return CDN_OK; +} + +CDN_API_STATUS CDN_API_HDMIRX_SetHpd_blocking(state_struct *state, u8 hpd) +{ + internal_block_function(&state->mutex, CDN_API_HDMIRX_SetHpd(state, hpd)); +} diff --git a/drivers/mxc/hdp/API_HDMIRX.h b/drivers/mxc/hdp/API_HDMIRX.h new file mode 100644 index 000000000000..4adbe422b7a9 --- /dev/null +++ b/drivers/mxc/hdp/API_HDMIRX.h @@ -0,0 +1,135 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * API_HDMIRX.h + * + ****************************************************************************** + */ + +#ifndef _API_HDMIRX_H_ +#define _API_HDMIRX_H_ + +#include "API_General.h" +#include "hdmi.h" + +/** + * \addtogroup HDMI_RX_API + * \{ + */ + +/** + * \brief init hdmi rx registers + * \returns status + */ +CDN_API_STATUS CDN_API_HDMIRX_Init_blocking(state_struct *state); +CDN_API_STATUS CDN_API_HDMIRX_Stop_blocking(state_struct *state); + +/** + * \brief get hdmi rx events (currently 5v events) + * \returns status + */ +CDN_API_STATUS CDN_API_HDMIRX_ReadEvent(state_struct *state, u8 *Events_5v); + +/** + * \brief blocking version of CDN_API_HDMIRX_ReadEvent + * \returns status + */ +CDN_API_STATUS CDN_API_HDMIRX_ReadEvent_blocking(state_struct *state, u8 *Events_5v); + + +/** + * \brief Cadence API for HDMI TX to set EDID + * \param [in] segment - EDID segment to read + * \param [in] extension - EDID extension to read + * \param [in] edid_buff - pointer to buffer with 128 bytes of edid block + * please note, edid_buff should be allocated\clear by caller + * \return status + * + */ +CDN_API_STATUS CDN_API_HDMIRX_SET_EDID(state_struct *state, u8 segment, u8 extension, u8 *edid_buff); +/** + * \brief blocking version of #CDN_API_HDMIRX_SET_EDID + */ +CDN_API_STATUS CDN_API_HDMIRX_SET_EDID_blocking(state_struct *state, u8 segment, u8 extension, u8 *edid_buff); + +/** + * \brief Cadence API for HDMI Rx to set general scdc information + * \param [in] scdcData - general slave scdc information + * \return status + * + */ +CDN_API_STATUS CDN_API_HDMIRX_SET_SCDC_SLAVE(state_struct *state, S_HDMI_SCDC_SET_MSG *scdcData); + +/** + * \brief blocking version of #CDN_API_HDMIRX_SET_SCDC_SLAVE + */ +CDN_API_STATUS CDN_API_HDMIRX_SET_SCDC_SLAVE_blocking(state_struct *state, S_HDMI_SCDC_SET_MSG *scdcData); + +/** + * \brief Cadence API for HDMI Rx to get general scdc information + * \param [in] source_ver - SCDC register - Source Version + * \param [in] TMDS_Config - SCDC register - TMDS_Config + * \param [in] config_0 - SCDC register - Config_0 + * \param [in] manufacturerSpecific - manufacturer specific data + * \return status + * + */ +CDN_API_STATUS CDN_API_HDMIRX_GET_SCDC_SLAVE(state_struct *state, S_HDMI_SCDC_GET_MSG *scdcData); + +/** + * \brief blocking version of #CDN_API_HDMIRX_GET_SCDC_SLAVE + */ +CDN_API_STATUS CDN_API_HDMIRX_GET_SCDC_SLAVE_blocking(state_struct *state, S_HDMI_SCDC_GET_MSG *scdcData); + +/** + * \brief Cadence API for HDMI Rx to set hpd + * \param [in] hpd - 0 or 1 + * \return status + * + */ +CDN_API_STATUS CDN_API_HDMIRX_SetHpd(state_struct *state, u8 hpd); + +/** + * \brief blocking version of #CDN_API_HDMIRX_SetHpd + */ +CDN_API_STATUS CDN_API_HDMIRX_SetHpd_blocking(state_struct *state, u8 hpd); + +#endif diff --git a/drivers/mxc/hdp/API_HDMI_RX_Audio.c b/drivers/mxc/hdp/API_HDMI_RX_Audio.c new file mode 100644 index 000000000000..aed6f8a4b26c --- /dev/null +++ b/drivers/mxc/hdp/API_HDMI_RX_Audio.c @@ -0,0 +1,185 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * API_HDMI_RX_Audio.c + * + ****************************************************************************** + */ + +#include "API_HDMI_RX_Audio.h" +#include "sink_aif_encoder.h" +#include "aif_pckt2smp.h" +#include "address.h" +#include "util.h" +#include "API_General.h" + +CDN_API_STATUS CDN_API_RX_AudioAutoConfig( + state_struct *state, + u8 max_ch_num, + u8 i2s_ports_num, + u8 dis_port3, + u8 enc_sample_width, + u8 i2s_sample_width) +{ + u32 regread; + u8 num_of_pairs_of_channels_per_port = max_ch_num / (i2s_ports_num * 2); + u8 enc_size_code; + u8 i2s_size_code; + u8 i2s_port3_dis = (dis_port3 != 0 && i2s_ports_num == 4) ? 1 : 0; + + /* Valid values: 1/2/4. */ + /* 3 ports can be emulated with 'i2s_ports_num = 4' and 'dis_port3 = 1'. */ + if (i2s_ports_num == 0 || i2s_ports_num == 3 || i2s_ports_num > 4) + return CDN_ERR; + + /* 'dis_port3' makes sense only with 4 ports enabled */ + if (dis_port3 != 0 && i2s_ports_num < 4) + return CDN_ERR; + + switch (enc_sample_width) { + case 16: + enc_size_code = 0x0; + break; + case 24: + enc_size_code = 0x1; + break; + case 32: + enc_size_code = 0x2; + break; + default: + return CDN_ERR; + } + + switch (i2s_sample_width) { + case 16: + i2s_size_code = 0x0; + break; + case 24: + i2s_size_code = 0x1; + break; + case 32: + i2s_size_code = 0x2; + break; + default: + return CDN_ERR; + } + + /* Maximum number of channels has to be in range from 2 to 32 */ + if (max_ch_num < 2 || max_ch_num > 32) + return CDN_ERR; + /* Maximum number of channels has to be power of 2 */ + else if (!(max_ch_num * (max_ch_num - 1))) + return CDN_ERR; + /* Each active port shall carry the same number of sub-channels */ + else if (max_ch_num % i2s_ports_num) + return CDN_ERR; + + /* Disable ACR during configuration */ + if (cdn_apb_write(state, ADDR_AIF_ENCODER + (ACR_CFG << 2), F_ACR_SW_RESET(1))) + return CDN_ERR; + + /* Configuring audio FIFO */ + if (cdn_apb_write(state, + ADDR_AIF_ENCODER + ((0x40 + FIFO_CNTL_ADDR) << 2), + F_CFG_FIFO_SW_RST(0) | F_CFG_INDEX_SYNC_EN(1) | + F_CFG_FIFO_DIR(1) | F_CFG_DIS_PORT3(i2s_port3_dis))) + return CDN_ERR; + + /* Configuring audio parameters */ + if (cdn_apb_write(state, + ADDR_AIF_ENCODER + ((0x40 + AUDIO_SINK_CNFG) << 2), + F_ENC_LOW_INDEX_MSB(0) | F_SINK_AUDIO_CH_NUM(max_ch_num - 1) | + F_ENC_SAMPLE_JUST(0x1) | F_ENC_SMPL_WIDTH(enc_size_code) | + F_I2S_ENC_WL_SIZE(i2s_size_code) | F_CNTL_SMPL_ONLY_EN(1) | + F_CNTL_TYPE_OVRD(0x0) | F_CNTL_TYPE_OVRD_EN(0) | + F_I2S_ENC_PORT_EN((1 << i2s_ports_num) - 1) | F_WS_POLARITY(0))) + return CDN_ERR; + + /* Waiting for N value... */ + do { + if (cdn_apb_read(state, + ADDR_AIF_ENCODER + (AIF_ACR_N_ST << 2), ®read)) + return CDN_ERR; + } while (!(regread)); + + /* Enable ACR */ + if (cdn_apb_write(state, + ADDR_AIF_ENCODER + (ACR_CFG << 2), F_ACR_SW_RESET(0))) + return CDN_ERR; + + /* Important: */ + /* Write to AIF_ACR_N_OFST_CFG register is interpreted as new N_CTS value. */ + /* The ACR has to be enabled (reset released) to register that event. */ + + if (cdn_apb_write(state, + ADDR_AIF_ENCODER + (AIF_ACR_N_OFST_CFG << 2), + F_ACR_N_OFFSET(regread * (num_of_pairs_of_channels_per_port - 1)))) + return CDN_ERR; + + /* Enable sample decoder */ + if (cdn_apb_write(state, + ADDR_AIF_ENCODER + (PKT2SMPL_CNTL << 2), F_PKT2SMPL_EN(1))) + return CDN_ERR; + + /* Enable I2S encoder */ + if (cdn_apb_write(state, + ADDR_AIF_ENCODER + ((0x40 + AUDIO_SINK_CNTL) << 2), F_I2S_ENC_START(1))) + return CDN_ERR; + + return CDN_OK; + +} + +CDN_API_STATUS CDN_API_RX_AudioAutoConfig_blocking(state_struct *state, + u8 max_ch_num, + u8 i2s_ports_num, + u8 dis_port3, + u8 enc_sample_width, + u8 i2s_sample_width) +{ + internal_block_function(&state->mutex, + CDN_API_RX_AudioAutoConfig(state, + max_ch_num, + i2s_ports_num, + dis_port3, + enc_sample_width, + i2s_sample_width)); +} diff --git a/drivers/mxc/hdp/API_HDMI_RX_Audio.h b/drivers/mxc/hdp/API_HDMI_RX_Audio.h new file mode 100644 index 000000000000..3dc0c2819527 --- /dev/null +++ b/drivers/mxc/hdp/API_HDMI_RX_Audio.h @@ -0,0 +1,80 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * API_HDMI_RX_Audio.h + * + ****************************************************************************** + */ + +#ifndef API_HDMI_RX_AUDIO_H_ +#define API_HDMI_RX_AUDIO_H_ + +#include "API_General.h" + +/** + * \addtogroup AUDIO_API + * \{ + */ + +/** + * \brief start audio reception with the input parameters + */ +CDN_API_STATUS CDN_API_RX_AudioAutoConfig( + state_struct *state, + u8 max_ch_num, + u8 i2s_ports_num, + u8 dis_port3, + u8 enc_sample_width, + u8 i2s_sample_width); + +/** + * \brief blocking version of #CDN_API_RX_AudioAutoConfig + */ +CDN_API_STATUS CDN_API_RX_AudioAutoConfig_blocking( + state_struct *state, + u8 max_ch_num, + u8 i2s_ports_num, + u8 dis_port3, + u8 enc_sample_width, + u8 i2s_sample_width); + +#endif + diff --git a/drivers/mxc/hdp/Kconfig b/drivers/mxc/hdp/Kconfig index 6b26f1055da3..fe98359c5c07 100644 --- a/drivers/mxc/hdp/Kconfig +++ b/drivers/mxc/hdp/Kconfig @@ -1,10 +1,5 @@ config MX8_HDP tristate "IMX8 HDP API " -config MX8_HDP_DP - select MX8_HDP - tristate "IMX8 HDP DP API " - -config MX8_HDP_HDMI - select MX8_HDP - tristate "IMX8 HDP HDMI API " +config MX8_HDP_RX + tristate "IMX8 HDP RX API " diff --git a/drivers/mxc/hdp/Makefile b/drivers/mxc/hdp/Makefile index 38d355eec444..363cdba3fe41 100644 --- a/drivers/mxc/hdp/Makefile +++ b/drivers/mxc/hdp/Makefile @@ -7,3 +7,7 @@ obj-$(CONFIG_MX8_HDP) += \ API_Infoframe.o \ API_DPTX.o \ util.o + +obj-$(CONFIG_MX8_HDP_RX) += \ + API_HDMIRX.o \ + API_HDMI_RX_Audio.o diff --git a/drivers/mxc/hdp/all.h b/drivers/mxc/hdp/all.h index 96d94f00be38..f233699f4122 100644 --- a/drivers/mxc/hdp/all.h +++ b/drivers/mxc/hdp/all.h @@ -58,3 +58,6 @@ #include "source_vif.h" #include "util.h" #include "general_handler.h" +#include "sink_pif.h" +#include "sink_mhl_hd.h" +#include "API_HDMIRX.h" diff --git a/drivers/mxc/hdp/sink_aif_encoder.h b/drivers/mxc/hdp/sink_aif_encoder.h new file mode 100644 index 000000000000..c75a1033ebd3 --- /dev/null +++ b/drivers/mxc/hdp/sink_aif_encoder.h @@ -0,0 +1,367 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * This file was auto-generated. Do not edit it manually. + * + ****************************************************************************** + * + * sink_aif_encoder.h + * + ****************************************************************************** + */ + +#ifndef SINK_AIF_ENCODER_H_ +#define SINK_AIF_ENCODER_H_ + +/* register AUDIO_SINK_CNTL */ +#define AUDIO_SINK_CNTL 0 +#define F_SINK_SW_RST(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_SW_RST_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_I2S_ENC_START(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_I2S_ENC_START_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) + +/* register AUDIO_SINK_STTS */ +#define AUDIO_SINK_STTS 1 +#define F_CH_INDX_ERR(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_CH_INDX_ERR_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) + +/* register AUDIO_SINK_CNFG */ +#define AUDIO_SINK_CNFG 2 +#define F_ENC_LOW_INDEX_MSB(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_ENC_LOW_INDEX_MSB_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_AUDIO_CH_NUM(x) (((x) & ((1 << 5) - 1)) << 1) +#define F_SINK_AUDIO_CH_NUM_RD(x) (((x) & (((1 << 5) - 1) << 1)) >> 1) +#define F_ENC_SAMPLE_JUST(x) (((x) & ((1 << 2) - 1)) << 6) +#define F_ENC_SAMPLE_JUST_RD(x) (((x) & (((1 << 2) - 1) << 6)) >> 6) +#define F_ENC_SMPL_WIDTH(x) (((x) & ((1 << 2) - 1)) << 8) +#define F_ENC_SMPL_WIDTH_RD(x) (((x) & (((1 << 2) - 1) << 8)) >> 8) +#define F_I2S_ENC_WL_SIZE(x) (((x) & ((1 << 2) - 1)) << 10) +#define F_I2S_ENC_WL_SIZE_RD(x) (((x) & (((1 << 2) - 1) << 10)) >> 10) +#define F_CNTL_SMPL_ONLY_EN(x) (((x) & ((1 << 1) - 1)) << 12) +#define F_CNTL_SMPL_ONLY_EN_RD(x) (((x) & (((1 << 1) - 1) << 12)) >> 12) +#define F_SINK_AIF_TYPE_SMPL(x) (((x) & ((1 << 4) - 1)) << 13) +#define F_SINK_AIF_TYPE_SMPL_RD(x) (((x) & (((1 << 4) - 1) << 13)) >> 13) +#define F_CNTL_TYPE_OVRD(x) (((x) & ((1 << 4) - 1)) << 17) +#define F_CNTL_TYPE_OVRD_RD(x) (((x) & (((1 << 4) - 1) << 17)) >> 17) +#define F_CNTL_TYPE_OVRD_EN(x) (((x) & ((1 << 1) - 1)) << 21) +#define F_CNTL_TYPE_OVRD_EN_RD(x) (((x) & (((1 << 1) - 1) << 21)) >> 21) +#define F_I2S_ENC_PORT_EN(x) (((x) & ((1 << 4) - 1)) << 22) +#define F_I2S_ENC_PORT_EN_RD(x) (((x) & (((1 << 4) - 1) << 22)) >> 22) +#define F_WS_POLARITY(x) (((x) & ((1 << 1) - 1)) << 26) +#define F_WS_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 26)) >> 26) + +/* register FIFO_CNTL_ADDR */ +#define FIFO_CNTL_ADDR 3 +#define F_CFG_FIFO_SW_RST(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_CFG_FIFO_SW_RST_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_CFG_INDEX_SYNC_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_CFG_INDEX_SYNC_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_CFG_FIFO_DIR(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_CFG_FIFO_DIR_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_CFG_DIS_PORT3(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_CFG_DIS_PORT3_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) + +/* register FIFO_STTS_ADDR */ +#define FIFO_STTS_ADDR 4 +#define F_ST_WFULL_REG(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_ST_WFULL_REG_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_ST_REMPTY_REG(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_ST_REMPTY_REG_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_ST_OVERRUN_REG(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_ST_OVERRUN_REG_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_ST_UNDERRUN_REG(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_ST_UNDERRUN_REG_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) + +/* register SINK_COM_CH_STTS_BITS */ +#define SINK_COM_CH_STTS_BITS 5 +#define F_BYTE0(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_BYTE0_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_CATEGORY_CODE(x) (((x) & ((1 << 8) - 1)) << 8) +#define F_CATEGORY_CODE_RD(x) (((x) & (((1 << 8) - 1) << 8)) >> 8) +#define F_SAMPLING_FREQ(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_SAMPLING_FREQ_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_CLOCK_ACCURACY(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_CLOCK_ACCURACY_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) +#define F_ORIGINAL_SAMP_FREQ(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_ORIGINAL_SAMP_FREQ_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register SINK_STTS_BIT_CH01 */ +#define SINK_STTS_BIT_CH01 6 +#define F_SOURCE_NUM_CH0(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH0_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH0(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH0_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH0(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH0_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH1(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH1_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH1(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH1_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH1(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH1_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH23 */ +#define SINK_STTS_BIT_CH23 7 +#define F_SOURCE_NUM_CH2(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH2_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH2(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH2_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH2(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH2_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH3(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH3_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH3(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH3_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH3(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH3_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH45 */ +#define SINK_STTS_BIT_CH45 8 +#define F_SOURCE_NUM_CH4(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH4_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH4(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH4_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH4(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH4_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH5(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH5_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH5(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH5_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH5(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH5_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH67 */ +#define SINK_STTS_BIT_CH67 9 +#define F_SOURCE_NUM_CH6(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH6_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH6(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH6_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH6(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH6_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH7(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH7_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH7(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH7_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH7(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH7_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH89 */ +#define SINK_STTS_BIT_CH89 10 +#define F_SOURCE_NUM_CH8(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH8_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH8(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH8_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH8(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH8_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH9(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH9_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH9(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH9_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH9(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH9_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH1011 */ +#define SINK_STTS_BIT_CH1011 11 +#define F_SOURCE_NUM_CH10(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH10_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH10(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH10_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH10(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH10_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH11(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH11_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH11(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH11_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH11(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH11_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH1213 */ +#define SINK_STTS_BIT_CH1213 12 +#define F_SOURCE_NUM_CH12(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH12_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH12(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH12_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH12(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH12_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH13(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH13_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH13(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH13_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH13(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH13_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH1415 */ +#define SINK_STTS_BIT_CH1415 13 +#define F_SOURCE_NUM_CH14(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH14_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH14(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH14_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH14(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH14_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH15(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH15_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH15(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH15_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH15(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH15_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH1617 */ +#define SINK_STTS_BIT_CH1617 14 +#define F_SOURCE_NUM_CH16(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH16_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH16(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH16_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH16(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH16_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH17(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH17_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH17(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH17_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH17(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH17_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH1819 */ +#define SINK_STTS_BIT_CH1819 15 +#define F_SOURCE_NUM_CH18(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH18_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH18(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH18_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH18(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH18_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH19(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH19_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH19(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH19_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH19(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH19_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH2021 */ +#define SINK_STTS_BIT_CH2021 16 +#define F_SOURCE_NUM_CH20(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH20_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH20(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH20_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH20(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH20_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH21(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH21_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH21(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH21_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH21(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH21_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH2223 */ +#define SINK_STTS_BIT_CH2223 17 +#define F_SOURCE_NUM_CH22(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH22_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH22(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH22_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH22(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH22_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH23(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH23_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH23(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH23_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH23(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH23_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH2425 */ +#define SINK_STTS_BIT_CH2425 18 +#define F_SOURCE_NUM_CH24(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH24_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH24(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH24_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH24(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH24_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH25(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH25_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH25(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH25_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH25(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH25_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH2627 */ +#define SINK_STTS_BIT_CH2627 19 +#define F_SOURCE_NUM_CH26(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH26_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH26(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH26_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH26(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH26_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH27(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH27_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH27(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH27_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH27(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH27_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH2829 */ +#define SINK_STTS_BIT_CH2829 20 +#define F_SOURCE_NUM_CH28(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH28_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH28(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH28_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH28(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH28_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH29(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH29_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH29(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH29_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH29(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH29_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +/* register SINK_STTS_BIT_CH3031 */ +#define SINK_STTS_BIT_CH3031 21 +#define F_SOURCE_NUM_CH30(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SOURCE_NUM_CH30_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHANNEL_NUM_CH30(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHANNEL_NUM_CH30_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_WORD_LENGTH_CH30(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_WORD_LENGTH_CH30_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_SOURCE_NUM_CH31(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_SOURCE_NUM_CH31_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_CHANNEL_NUM_CH31(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_CHANNEL_NUM_CH31_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) +#define F_WORD_LENGTH_CH31(x) (((x) & ((1 << 4) - 1)) << 20) +#define F_WORD_LENGTH_CH31_RD(x) (((x) & (((1 << 4) - 1) << 20)) >> 20) + +#endif /* SINK_AIF_ENCODER */ + diff --git a/drivers/mxc/hdp/sink_car.h b/drivers/mxc/hdp/sink_car.h new file mode 100644 index 000000000000..ec175d24c917 --- /dev/null +++ b/drivers/mxc/hdp/sink_car.h @@ -0,0 +1,168 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * This file was auto-generated. Do not edit it manually. + * + ****************************************************************************** + * + * sink_car.h + * + ****************************************************************************** + */ + +#ifndef SINK_CAR_H_ +#define SINK_CAR_H_ + +/* register SINK_MHL_HD_CAR */ +#define SINK_MHL_HD_CAR 0 +#define F_SINK_MHL_HD_VIF_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_MHL_HD_VIF_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_MHL_HD_VIF_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_MHL_HD_VIF_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_SINK_MHL_HD_SYS_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_SINK_MHL_HD_SYS_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_SINK_MHL_HD_SYS_CLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_SINK_MHL_HD_SYS_CLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) +#define F_SINK_MHL_HD_PHY_DATA_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_SINK_MHL_HD_PHY_DATA_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_SINK_MHL_HD_PHY_DATA_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 5) +#define F_SINK_MHL_HD_PHY_DATA_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 5)) >> 5) + +/* register SINK_CEC_CAR */ +#define SINK_CEC_CAR 1 +#define F_SINK_CEC_SYS_CLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_CEC_SYS_CLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_CEC_SYS_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_CEC_SYS_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) + +/* register SINK_SCDC_CAR */ +#define SINK_SCDC_CAR 2 +#define F_SCDC_SYS_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SCDC_SYS_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SCDC_SYS_CLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SCDC_SYS_CLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_SCDC_RSTN_EN(x) (((x) & ((1 << 8) - 1)) << 8) +#define F_SCDC_RSTN_EN_RD(x) (((x) & (((1 << 8) - 1) << 8)) >> 8) +#define F_SCDC_CLK_EN(x) (((x) & ((1 << 8) - 1)) << 16) +#define F_SCDC_CLK_EN_RD(x) (((x) & (((1 << 8) - 1) << 16)) >> 16) + +/* register SINK_PKT_CAR */ +#define SINK_PKT_CAR 3 +#define F_SINK_PKT_SYS_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_PKT_SYS_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_PKT_SYS_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_PKT_SYS_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_SINK_PKT_DATA_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_SINK_PKT_DATA_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_SINK_PKT_DATA_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_SINK_PKT_DATA_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) + +/* register SINK_AIF_CAR */ +#define SINK_AIF_CAR 4 +#define F_SINK_AIF_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_AIF_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_AIF_CLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_AIF_CLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_SINK_AIF_SYS_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_SINK_AIF_SYS_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_SINK_AIF_SYS_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_SINK_AIF_SYS_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) +#define F_SINK_ACR_CHAR_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_SINK_ACR_CHAR_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_SINK_ACR_CHAR_CLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 5) +#define F_SINK_ACR_CHAR_CLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 5)) >> 5) + +/* register SINK_CIPHER_CAR */ +#define SINK_CIPHER_CAR 5 +#define F_SINK_CIPHER_CHAR_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_CIPHER_CHAR_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_CIPHER_CHAR_CLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_CIPHER_CHAR_CLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_SINK_CIPHER_SYS_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_SINK_CIPHER_SYS_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_SINK_CIPHER_SYS_CLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_SINK_CIPHER_SYS_CLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) + +/* register SINK_CRYPTO_CAR */ +#define SINK_CRYPTO_CAR 6 +#define F_SINK_CRYPTO_SYS_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_CRYPTO_SYS_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_CRYPTO_SYS_CLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_CRYPTO_SYS_CLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) + +/* register SINK_VIF_CAR */ +#define SINK_VIF_CAR 7 +#define F_SINK_VIF_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_VIF_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_VIF_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_VIF_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) + +/* register SINK_AUDIO_CAR */ +#define SINK_AUDIO_CAR 8 +#define F_ACR_REF_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_ACR_REF_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_ACR_REF_CLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_ACR_REF_CLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_SPDIF_MCLK_EN(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_SPDIF_MCLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_SPDIF_MCLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_SPDIF_MCLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) +#define F_I2S_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_I2S_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_I2S_CLK_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 5) +#define F_I2S_CLK_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 5)) >> 5) + +/* register SINK_PHY_CAR */ +#define SINK_PHY_CAR 9 +#define F_SINK_XT_PCLK_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_XT_PCLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_XT_PRESETN_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_XT_PRESETN_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) + +/* register SINK_DEBUG_CAR */ +#define SINK_DEBUG_CAR 10 +#define F_SINK_CLOCK_METER_SYS_CLK_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_CLOCK_METER_SYS_CLK_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_CLOCK_METER_SYS_RSTN_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_CLOCK_METER_SYS_RSTN_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) + +#endif /* SINK_CAR */ + diff --git a/drivers/mxc/hdp/sink_clk_meters.h b/drivers/mxc/hdp/sink_clk_meters.h new file mode 100644 index 000000000000..c238b9785583 --- /dev/null +++ b/drivers/mxc/hdp/sink_clk_meters.h @@ -0,0 +1,241 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * This file was auto-generated. Do not edit it manually. + * + ****************************************************************************** + * + * sink_clk_meters.h + * + ****************************************************************************** + */ + +#ifndef SINK_CLK_METERS_H_ +#define SINK_CLK_METERS_H_ + +/* register CLK_METER_REF_CFG */ +#define CLK_METER_REF_CFG 0 +#define F_REF_CYCLES_SINK_REF_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_REF_CYCLES_SINK_REF_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_TOLERANCE_SINK_REF_CLK(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_MEAS_TOLERANCE_SINK_REF_CLK_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register CLK_METER_PHY_CHAR_CFG */ +#define CLK_METER_PHY_CHAR_CFG 1 +#define F_REF_CYCLES_SINK_PHY_CHAR_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_REF_CYCLES_SINK_PHY_CHAR_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_TOLERANCE_SINK_PHY_CHAR_CLK(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_MEAS_TOLERANCE_SINK_PHY_CHAR_CLK_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register CLK_METER_PHY_DATA_CFG */ +#define CLK_METER_PHY_DATA_CFG 2 +#define F_REF_CYCLES_SINK_PHY_DATA_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_REF_CYCLES_SINK_PHY_DATA_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_TOLERANCE_SINK_PHY_DATA_CLK(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_MEAS_TOLERANCE_SINK_PHY_DATA_CLK_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register CLK_METER_PHY_PIXEL_CFG */ +#define CLK_METER_PHY_PIXEL_CFG 3 +#define F_REF_CYCLES_SINK_PHY_PIXEL_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_REF_CYCLES_SINK_PHY_PIXEL_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_TOLERANCE_SINK_PHY_PIXEL_CLK(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_MEAS_TOLERANCE_SINK_PHY_PIXEL_CLK_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register CLK_METER_SPDIF_CFG */ +#define CLK_METER_SPDIF_CFG 4 +#define F_REF_CYCLES_SINK_SPDIF_MCLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_REF_CYCLES_SINK_SPDIF_MCLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_TOLERANCE_SINK_SPDIF_MCLK(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_MEAS_TOLERANCE_SINK_SPDIF_MCLK_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register CLK_METER_I2S_CFG */ +#define CLK_METER_I2S_CFG 5 +#define F_REF_CYCLES_SINK_I2S_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_REF_CYCLES_SINK_I2S_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_TOLERANCE_SINK_I2S_CLK(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_MEAS_TOLERANCE_SINK_I2S_CLK_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register CLK_METER_PCLK_CFG */ +#define CLK_METER_PCLK_CFG 6 +#define F_REF_CYCLES_SINK_PCLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_REF_CYCLES_SINK_PCLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_TOLERANCE_SINK_PCLK(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_MEAS_TOLERANCE_SINK_PCLK_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register CLK_METER_SCLK_CFG */ +#define CLK_METER_SCLK_CFG 7 +#define F_REF_CYCLES_SINK_SCLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_REF_CYCLES_SINK_SCLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_TOLERANCE_SINK_SCLK(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_MEAS_TOLERANCE_SINK_SCLK_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register CLK_METER_CCLK_CFG */ +#define CLK_METER_CCLK_CFG 8 +#define F_REF_CYCLES_SINK_CCLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_REF_CYCLES_SINK_CCLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_TOLERANCE_SINK_CCLK(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_MEAS_TOLERANCE_SINK_CCLK_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register CLK_METER_TRNG_CFG */ +#define CLK_METER_TRNG_CFG 9 +#define F_REF_CYCLES_SINK_TRNG_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_REF_CYCLES_SINK_TRNG_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_TOLERANCE_SINK_TRNG_CLK(x) (((x) & ((1 << 4) - 1)) << 24) +#define F_MEAS_TOLERANCE_SINK_TRNG_CLK_RD(x) (((x) & (((1 << 4) - 1) << 24)) >> 24) + +/* register CLK_METER_REF_ST */ +#define CLK_METER_REF_ST 10 +#define F_MEAS_CYCLES_SINK_REF_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_MEAS_CYCLES_SINK_REF_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_STABLE_SINK_REF_CLK(x) (((x) & ((1 << 1) - 1)) << 24) +#define F_MEAS_STABLE_SINK_REF_CLK_RD(x) (((x) & (((1 << 1) - 1) << 24)) >> 24) + +/* register CLK_METER_PHY_CHAR_ST */ +#define CLK_METER_PHY_CHAR_ST 11 +#define F_MEAS_CYCLES_SINK_PHY_CHAR_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_MEAS_CYCLES_SINK_PHY_CHAR_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_STABLE_SINK_PHY_CHAR_CLK(x) (((x) & ((1 << 1) - 1)) << 24) +#define F_MEAS_STABLE_SINK_PHY_CHAR_CLK_RD(x) (((x) & (((1 << 1) - 1) << 24)) >> 24) + +/* register CLK_METER_PHY_DATA_ST */ +#define CLK_METER_PHY_DATA_ST 12 +#define F_MEAS_CYCLES_SINK_PHY_DATA_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_MEAS_CYCLES_SINK_PHY_DATA_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_STABLE_SINK_PHY_DATA_CLK(x) (((x) & ((1 << 1) - 1)) << 24) +#define F_MEAS_STABLE_SINK_PHY_DATA_CLK_RD(x) (((x) & (((1 << 1) - 1) << 24)) >> 24) + +/* register CLK_METER_PHY_PIXEL_ST */ +#define CLK_METER_PHY_PIXEL_ST 13 +#define F_MEAS_CYCLES_SINK_PHY_PIXEL_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_MEAS_CYCLES_SINK_PHY_PIXEL_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_STABLE_SINK_PHY_PIXEL_CLK(x) (((x) & ((1 << 1) - 1)) << 24) +#define F_MEAS_STABLE_SINK_PHY_PIXEL_CLK_RD(x) (((x) & (((1 << 1) - 1) << 24)) >> 24) + +/* register CLK_METER_SPDIF_ST */ +#define CLK_METER_SPDIF_ST 14 +#define F_MEAS_CYCLES_SINK_SPDIF_MCLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_MEAS_CYCLES_SINK_SPDIF_MCLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_STABLE_SINK_SPDIF_MCLK(x) (((x) & ((1 << 1) - 1)) << 24) +#define F_MEAS_STABLE_SINK_SPDIF_MCLK_RD(x) (((x) & (((1 << 1) - 1) << 24)) >> 24) + +/* register CLK_METER_I2S_ST */ +#define CLK_METER_I2S_ST 15 +#define F_MEAS_CYCLES_SINK_I2S_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_MEAS_CYCLES_SINK_I2S_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_STABLE_SINK_I2S_CLK(x) (((x) & ((1 << 1) - 1)) << 24) +#define F_MEAS_STABLE_SINK_I2S_CLK_RD(x) (((x) & (((1 << 1) - 1) << 24)) >> 24) + +/* register CLK_METER_PCLK_ST */ +#define CLK_METER_PCLK_ST 16 +#define F_MEAS_CYCLES_SINK_PCLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_MEAS_CYCLES_SINK_PCLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_STABLE_SINK_PCLK(x) (((x) & ((1 << 1) - 1)) << 24) +#define F_MEAS_STABLE_SINK_PCLK_RD(x) (((x) & (((1 << 1) - 1) << 24)) >> 24) + +/* register CLK_METER_SCLK_ST */ +#define CLK_METER_SCLK_ST 17 +#define F_MEAS_CYCLES_SINK_SCLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_MEAS_CYCLES_SINK_SCLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_STABLE_SINK_SCLK(x) (((x) & ((1 << 1) - 1)) << 24) +#define F_MEAS_STABLE_SINK_SCLK_RD(x) (((x) & (((1 << 1) - 1) << 24)) >> 24) + +/* register CLK_METER_CCLK_ST */ +#define CLK_METER_CCLK_ST 18 +#define F_MEAS_CYCLES_SINK_CCLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_MEAS_CYCLES_SINK_CCLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_STABLE_SINK_CCLK(x) (((x) & ((1 << 1) - 1)) << 24) +#define F_MEAS_STABLE_SINK_CCLK_RD(x) (((x) & (((1 << 1) - 1) << 24)) >> 24) + +/* register CLK_METER_TRNG_ST */ +#define CLK_METER_TRNG_ST 19 +#define F_MEAS_CYCLES_SINK_TRNG_CLK(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_MEAS_CYCLES_SINK_TRNG_CLK_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_MEAS_STABLE_SINK_TRNG_CLK(x) (((x) & ((1 << 1) - 1)) << 24) +#define F_MEAS_STABLE_SINK_TRNG_CLK_RD(x) (((x) & (((1 << 1) - 1) << 24)) >> 24) + +/* register CLK_METER_INT_MASK */ +#define CLK_METER_INT_MASK 20 +#define F_MEAS_MASK_SINK_REF_CLK(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_MEAS_MASK_SINK_REF_CLK_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_MEAS_MASK_SINK_PHY_CHAR_CLK(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_MEAS_MASK_SINK_PHY_CHAR_CLK_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_MEAS_MASK_SINK_PHY_DATA_CLK(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_MEAS_MASK_SINK_PHY_DATA_CLK_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_MEAS_MASK_SINK_PHY_PIXEL_CLK(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_MEAS_MASK_SINK_PHY_PIXEL_CLK_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) +#define F_MEAS_MASK_SINK_SPDIF_MCLK(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_MEAS_MASK_SINK_SPDIF_MCLK_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_MEAS_MASK_SINK_I2S_CLK(x) (((x) & ((1 << 1) - 1)) << 5) +#define F_MEAS_MASK_SINK_I2S_CLK_RD(x) (((x) & (((1 << 1) - 1) << 5)) >> 5) +#define F_MEAS_MASK_SINK_PCLK(x) (((x) & ((1 << 1) - 1)) << 6) +#define F_MEAS_MASK_SINK_PCLK_RD(x) (((x) & (((1 << 1) - 1) << 6)) >> 6) +#define F_MEAS_MASK_SINK_SCLK(x) (((x) & ((1 << 1) - 1)) << 7) +#define F_MEAS_MASK_SINK_SCLK_RD(x) (((x) & (((1 << 1) - 1) << 7)) >> 7) +#define F_MEAS_MASK_SINK_CCLK(x) (((x) & ((1 << 1) - 1)) << 8) +#define F_MEAS_MASK_SINK_CCLK_RD(x) (((x) & (((1 << 1) - 1) << 8)) >> 8) +#define F_MEAS_MASK_SINK_TRNG_CLK(x) (((x) & ((1 << 1) - 1)) << 9) +#define F_MEAS_MASK_SINK_TRNG_CLK_RD(x) (((x) & (((1 << 1) - 1) << 9)) >> 9) + +/* register CLK_METER_INT_ST */ +#define CLK_METER_INT_ST 21 +#define F_MEAS_STATUS_SINK_REF_CLK(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_MEAS_STATUS_SINK_REF_CLK_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_MEAS_STATUS_SINK_PHY_CHAR_CLK(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_MEAS_STATUS_SINK_PHY_CHAR_CLK_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_MEAS_STATUS_SINK_PHY_DATA_CLK(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_MEAS_STATUS_SINK_PHY_DATA_CLK_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_MEAS_STATUS_SINK_PHY_PIXEL_CLK(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_MEAS_STATUS_SINK_PHY_PIXEL_CLK_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) +#define F_MEAS_STATUS_SINK_SPDIF_MCLK(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_MEAS_STATUS_SINK_SPDIF_MCLK_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_MEAS_STATUS_SINK_I2S_CLK(x) (((x) & ((1 << 1) - 1)) << 5) +#define F_MEAS_STATUS_SINK_I2S_CLK_RD(x) (((x) & (((1 << 1) - 1) << 5)) >> 5) +#define F_MEAS_STATUS_SINK_PCLK(x) (((x) & ((1 << 1) - 1)) << 6) +#define F_MEAS_STATUS_SINK_PCLK_RD(x) (((x) & (((1 << 1) - 1) << 6)) >> 6) +#define F_MEAS_STATUS_SINK_SCLK(x) (((x) & ((1 << 1) - 1)) << 7) +#define F_MEAS_STATUS_SINK_SCLK_RD(x) (((x) & (((1 << 1) - 1) << 7)) >> 7) +#define F_MEAS_STATUS_SINK_CCLK(x) (((x) & ((1 << 1) - 1)) << 8) +#define F_MEAS_STATUS_SINK_CCLK_RD(x) (((x) & (((1 << 1) - 1) << 8)) >> 8) +#define F_MEAS_STATUS_SINK_TRNG_CLK(x) (((x) & ((1 << 1) - 1)) << 9) +#define F_MEAS_STATUS_SINK_TRNG_CLK_RD(x) (((x) & (((1 << 1) - 1) << 9)) >> 9) + +#endif /* SINK_CLK_METERS */ + diff --git a/drivers/mxc/hdp/sink_core.h b/drivers/mxc/hdp/sink_core.h new file mode 100644 index 000000000000..ba63ca2af41a --- /dev/null +++ b/drivers/mxc/hdp/sink_core.h @@ -0,0 +1,117 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * This file was auto-generated. Do not edit it manually. + * + ****************************************************************************** + * + * sink_core.h + * + ****************************************************************************** + */ + +#ifndef SINK_CORE_H_ +#define SINK_CORE_H_ + +/* register SCDC_INT_MSK */ +#define SCDC_INT_MSK 0 +#define F_SCDC_INT_MASK(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_SCDC_INT_MASK_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) + +/* register SCDC_INT_STS */ +#define SCDC_INT_STS 1 +#define F_SCDC_INT_STATUS(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_SCDC_INT_STATUS_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) + +/* register PHY_IF_LANE0_CFG */ +#define PHY_IF_LANE0_CFG 2 +#define F_SINK_PHY_DATA0_DATA_REVERSE(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_PHY_DATA0_DATA_REVERSE_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_PHY_DATA0_CHAR_REVERSE(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_PHY_DATA0_CHAR_REVERSE_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_SINK_PHY_CHAR0_SWAP(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_SINK_PHY_CHAR0_SWAP_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_SINK_PHY_LANE0(x) (((x) & ((1 << 2) - 1)) << 3) +#define F_SINK_PHY_LANE0_RD(x) (((x) & (((1 << 2) - 1) << 3)) >> 3) + +/* register PHY_IF_LANE1_CFG */ +#define PHY_IF_LANE1_CFG 3 +#define F_SINK_PHY_DATA1_DATA_REVERSE(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_PHY_DATA1_DATA_REVERSE_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_PHY_DATA1_CHAR_REVERSE(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_PHY_DATA1_CHAR_REVERSE_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_SINK_PHY_CHAR1_SWAP(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_SINK_PHY_CHAR1_SWAP_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_SINK_PHY_LANE1(x) (((x) & ((1 << 2) - 1)) << 3) +#define F_SINK_PHY_LANE1_RD(x) (((x) & (((1 << 2) - 1) << 3)) >> 3) + +/* register PHY_IF_LANE2_CFG */ +#define PHY_IF_LANE2_CFG 4 +#define F_SINK_PHY_DATA2_DATA_REVERSE(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_PHY_DATA2_DATA_REVERSE_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_PHY_DATA2_CHAR_REVERSE(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_PHY_DATA2_CHAR_REVERSE_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_SINK_PHY_CHAR2_SWAP(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_SINK_PHY_CHAR2_SWAP_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_SINK_PHY_LANE2(x) (((x) & ((1 << 2) - 1)) << 3) +#define F_SINK_PHY_LANE2_RD(x) (((x) & (((1 << 2) - 1) << 3)) >> 3) + +/* register TOP_ST */ +#define TOP_ST 5 +#define F_SINK_5V(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_5V_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) + +/* register TOP_CFG */ +#define TOP_CFG 6 +#define F_SINK_HPD(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_HPD_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) + +/* register SCDC_FILTER_CFG */ +#define SCDC_FILTER_CFG 7 +#define F_SCDC_FILTER_BYPASS(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SCDC_FILTER_BYPASS_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SCDC_FILTER_VALID_WIDTH(x) (((x) & ((1 << 12) - 1)) << 1) +#define F_SCDC_FILTER_VALID_WIDTH_RD(x) (((x) & (((1 << 12) - 1) << 1)) >> 1) +#define F_SCDC_FILTER_GLITCH_WIDTH(x) (((x) & ((1 << 8) - 1)) << 13) +#define F_SCDC_FILTER_GLITCH_WIDTH_RD(x) (((x) & (((1 << 8) - 1) << 13)) >> 13) + +#endif /* SINK_CORE */ + diff --git a/drivers/mxc/hdp/sink_mhl_hd.h b/drivers/mxc/hdp/sink_mhl_hd.h new file mode 100644 index 000000000000..be03200e9d96 --- /dev/null +++ b/drivers/mxc/hdp/sink_mhl_hd.h @@ -0,0 +1,418 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * This file was auto-generated. Do not edit it manually. + * + ****************************************************************************** + * + * sink_mhl_hd.h + * + ****************************************************************************** + */ + +#ifndef SINK_MHL_HD_H_ +#define SINK_MHL_HD_H_ + +/* register TMDS_ALIGN_CTRL */ +#define TMDS_ALIGN_CTRL 0 +#define F_CHAR_MATCH_CNT_THR(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_CHAR_MATCH_CNT_THR_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_CHAR_HAM_DIS_TOL(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_CHAR_HAM_DIS_TOL_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_LOCK_ALIGN(x) (((x) & ((1 << 1) - 1)) << 8) +#define F_LOCK_ALIGN_RD(x) (((x) & (((1 << 1) - 1) << 8)) >> 8) +#define F_ALIGN_WD_THR(x) (((x) & ((1 << 3) - 1)) << 9) +#define F_ALIGN_WD_THR_RD(x) (((x) & (((1 << 3) - 1) << 9)) >> 9) +#define F_ALIGN_ANY_CHAR(x) (((x) & ((1 << 1) - 1)) << 12) +#define F_ALIGN_ANY_CHAR_RD(x) (((x) & (((1 << 1) - 1) << 12)) >> 12) + +/* register TMDS_DEC_CTRL */ +#define TMDS_DEC_CTRL 1 +#define F_DECODER_ERR_CORR_EN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_DECODER_ERR_CORR_EN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_TMDS_DECODER_SW_RST(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_TMDS_DECODER_SW_RST_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_TMDS_FORCE_HDMI_MODE(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_TMDS_FORCE_HDMI_MODE_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_TMDS_SW_HDMI_MODE(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_TMDS_SW_HDMI_MODE_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) + +/* register TMDS_DEC_ST */ +#define TMDS_DEC_ST 2 +#define F_DEFRAMER_HDMI_MODE(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_DEFRAMER_HDMI_MODE_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_CHAR_HAM_ERR(x) (((x) & ((1 << 3) - 1)) << 2) +#define F_CHAR_HAM_ERR_RD(x) (((x) & (((1 << 3) - 1) << 2)) >> 2) +#define F_CHAR_ALIGNED(x) (((x) & ((1 << 3) - 1)) << 5) +#define F_CHAR_ALIGNED_RD(x) (((x) & (((1 << 3) - 1) << 5)) >> 5) +#define F_CTRL_ALIGN_ERR(x) (((x) & ((1 << 1) - 1)) << 8) +#define F_CTRL_ALIGN_ERR_RD(x) (((x) & (((1 << 1) - 1) << 8)) >> 8) +#define F_CTRL_ALIGNED(x) (((x) & ((1 << 1) - 1)) << 9) +#define F_CTRL_ALIGNED_RD(x) (((x) & (((1 << 1) - 1) << 9)) >> 9) +#define F_TMDS_CHAR_CH0_WIN(x) (((x) & ((1 << 4) - 1)) << 10) +#define F_TMDS_CHAR_CH0_WIN_RD(x) (((x) & (((1 << 4) - 1) << 10)) >> 10) +#define F_TMDS_CHAR_CH1_WIN(x) (((x) & ((1 << 4) - 1)) << 14) +#define F_TMDS_CHAR_CH1_WIN_RD(x) (((x) & (((1 << 4) - 1) << 14)) >> 14) +#define F_TMDS_CHAR_CH2_WIN(x) (((x) & ((1 << 4) - 1)) << 18) +#define F_TMDS_CHAR_CH2_WIN_RD(x) (((x) & (((1 << 4) - 1) << 18)) >> 18) + +/* register TMDS_CH0_ERR_CNT */ +#define TMDS_CH0_ERR_CNT 3 +#define F_DEFRAMER_CH0_ERROR_CNT(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_DEFRAMER_CH0_ERROR_CNT_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) + +/* register TMDS_CH1_ERR_CNT */ +#define TMDS_CH1_ERR_CNT 4 +#define F_DEFRAMER_CH1_ERROR_CNT(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_DEFRAMER_CH1_ERROR_CNT_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) + +/* register TMDS_CH2_ERR_CNT */ +#define TMDS_CH2_ERR_CNT 5 +#define F_DEFRAMER_CH2_ERROR_CNT(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_DEFRAMER_CH2_ERROR_CNT_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) + +/* register HDCP_FIFO_STAT */ +#define HDCP_FIFO_STAT 6 +#define F_HDCP_DOUBLE_FIFO_REMPTY(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_HDCP_DOUBLE_FIFO_REMPTY_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_HDCP_DOUBLE_FIFO_WFULL(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_HDCP_DOUBLE_FIFO_WFULL_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_HDCP_DOUBLE_FIFO_UNDERRUN(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_HDCP_DOUBLE_FIFO_UNDERRUN_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_HDCP_DOUBLE_FIFO_OVERRUN(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_HDCP_DOUBLE_FIFO_OVERRUN_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) +#define F_HDCP22_DATA_FIFO_UNDERRUN(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_HDCP22_DATA_FIFO_UNDERRUN_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_HDCP22_DATA_FIFO_OVERRUN(x) (((x) & ((1 << 1) - 1)) << 5) +#define F_HDCP22_DATA_FIFO_OVERRUN_RD(x) (((x) & (((1 << 1) - 1) << 5)) >> 5) +#define F_HDCP22_DATA_FIFO_REMPTY(x) (((x) & ((1 << 1) - 1)) << 6) +#define F_HDCP22_DATA_FIFO_REMPTY_RD(x) (((x) & (((1 << 1) - 1) << 6)) >> 6) +#define F_HDCP22_DATA_FIFO_WFULL(x) (((x) & ((1 << 1) - 1)) << 7) +#define F_HDCP22_DATA_FIFO_WFULL_RD(x) (((x) & (((1 << 1) - 1) << 7)) >> 7) +#define F_HDCP_DELAY_FIFO_EMPTY(x) (((x) & ((1 << 1) - 1)) << 8) +#define F_HDCP_DELAY_FIFO_EMPTY_RD(x) (((x) & (((1 << 1) - 1) << 8)) >> 8) +#define F_HDCP_DELAY_FIFO_FULL(x) (((x) & ((1 << 1) - 1)) << 9) +#define F_HDCP_DELAY_FIFO_FULL_RD(x) (((x) & (((1 << 1) - 1) << 9)) >> 9) +#define F_HDCP14_DATA_FIFO_UNDERRUN(x) (((x) & ((1 << 2) - 1)) << 10) +#define F_HDCP14_DATA_FIFO_UNDERRUN_RD(x) (((x) & (((1 << 2) - 1) << 10)) >> 10) +#define F_HDCP14_DATA_FIFO_OVERRUN(x) (((x) & ((1 << 2) - 1)) << 12) +#define F_HDCP14_DATA_FIFO_OVERRUN_RD(x) (((x) & (((1 << 2) - 1) << 12)) >> 12) +#define F_HDCP14_DATA_FIFO_REMPTY(x) (((x) & ((1 << 2) - 1)) << 14) +#define F_HDCP14_DATA_FIFO_REMPTY_RD(x) (((x) & (((1 << 2) - 1) << 14)) >> 14) +#define F_HDCP14_DATA_FIFO_WFULL(x) (((x) & ((1 << 2) - 1)) << 16) +#define F_HDCP14_DATA_FIFO_WFULL_RD(x) (((x) & (((1 << 2) - 1) << 16)) >> 16) + +/* register HDCP_DELAY_FIFO_CTRL */ +#define HDCP_DELAY_FIFO_CTRL 7 +#define F_HDCP_DELAY_FIFO_AFULL_THR(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_HDCP_DELAY_FIFO_AFULL_THR_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_HDCP_DELAY_FIFO_SW_RST(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_HDCP_DELAY_FIFO_SW_RST_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_HDCP_DOUBLE_FIFO_SW_RST(x) (((x) & ((1 << 1) - 1)) << 5) +#define F_HDCP_DOUBLE_FIFO_SW_RST_RD(x) (((x) & (((1 << 1) - 1) << 5)) >> 5) +#define F_HDCP14_DATA_FIFO_SW_RST(x) (((x) & ((1 << 1) - 1)) << 6) +#define F_HDCP14_DATA_FIFO_SW_RST_RD(x) (((x) & (((1 << 1) - 1) << 6)) >> 6) +#define F_HDCP_CTRL_SW_RST(x) (((x) & ((1 << 1) - 1)) << 7) +#define F_HDCP_CTRL_SW_RST_RD(x) (((x) & (((1 << 1) - 1) << 7)) >> 7) + +/* register HDCP_CTRL */ +#define HDCP_CTRL 8 +#define F_HDCP_ENABLE_1P1_FEATURES(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_HDCP_ENABLE_1P1_FEATURES_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_HDCP_SELECT(x) (((x) & ((1 << 2) - 1)) << 1) +#define F_HDCP_SELECT_RD(x) (((x) & (((1 << 2) - 1) << 1)) >> 1) +#define F_FORCE_VSYNC_POLARITY(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_FORCE_VSYNC_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) +#define F_FORCE_HSYNC_POLARITY(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_FORCE_HSYNC_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_SW_VSYNC_POLARITY(x) (((x) & ((1 << 1) - 1)) << 5) +#define F_SW_VSYNC_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 5)) >> 5) +#define F_SW_HSYNC_POLARITY(x) (((x) & ((1 << 1) - 1)) << 6) +#define F_SW_HSYNC_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 6)) >> 6) + +/* register HDCP_STAT */ +#define HDCP_STAT 9 +#define F_HDCP_ESS_STATE(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_HDCP_ESS_STATE_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_SINK_HD_CIPHER_HSYNC_POLARITY(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_SINK_HD_CIPHER_HSYNC_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_SINK_HD_CIPHER_VSYNC_POLARITY(x) (((x) & ((1 << 1) - 1)) << 5) +#define F_SINK_HD_CIPHER_VSYNC_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 5)) >> 5) + +/* register PKT_CTRL */ +#define PKT_CTRL 10 +#define F_SINK_AVMUTE_SET(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_AVMUTE_SET_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_AVMUTE_CLR(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SINK_AVMUTE_CLR_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_ERR_CORR_EN(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_ERR_CORR_EN_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) + +/* register PKT_STAT_0 */ +#define PKT_STAT_0 11 +#define F_SINK_AVMUTE(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SINK_AVMUTE_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SINK_ACR_CTS(x) (((x) & ((1 << 20) - 1)) << 1) +#define F_SINK_ACR_CTS_RD(x) (((x) & (((1 << 20) - 1) << 1)) >> 1) +#define F_PKT_DEC_GCP_CD(x) (((x) & ((1 << 4) - 1)) << 21) +#define F_PKT_DEC_GCP_CD_RD(x) (((x) & (((1 << 4) - 1) << 21)) >> 21) +#define F_PKT_DEC_GCP_PP(x) (((x) & ((1 << 4) - 1)) << 25) +#define F_PKT_DEC_GCP_PP_RD(x) (((x) & (((1 << 4) - 1) << 25)) >> 25) + +/* register PKT_STAT_1 */ +#define PKT_STAT_1 12 +#define F_SINK_ACR_N(x) (((x) & ((1 << 20) - 1)) << 0) +#define F_SINK_ACR_N_RD(x) (((x) & (((1 << 20) - 1) << 0)) >> 0) + +/* register PKT_ERR_CNT_HEADER */ +#define PKT_ERR_CNT_HEADER 13 +#define F_PKT_HEADER_ERR_CNT(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_PKT_HEADER_ERR_CNT_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_PKT_HEADER_CORR_ERR_CNT(x) (((x) & ((1 << 8) - 1)) << 8) +#define F_PKT_HEADER_CORR_ERR_CNT_RD(x) (((x) & (((1 << 8) - 1) << 8)) >> 8) + +/* register PKT_ERR_CNT_01 */ +#define PKT_ERR_CNT_01 14 +#define F_PKT_SUBPKT0_ERR_CNT(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_PKT_SUBPKT0_ERR_CNT_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_PKT_SUBPKT0_CORR_ERR_CNT(x) (((x) & ((1 << 8) - 1)) << 8) +#define F_PKT_SUBPKT0_CORR_ERR_CNT_RD(x) (((x) & (((1 << 8) - 1) << 8)) >> 8) +#define F_PKT_SUBPKT1_ERR_CNT(x) (((x) & ((1 << 8) - 1)) << 16) +#define F_PKT_SUBPKT1_ERR_CNT_RD(x) (((x) & (((1 << 8) - 1) << 16)) >> 16) +#define F_PKT_SUBPKT1_CORR_ERR_CNT(x) (((x) & ((1 << 8) - 1)) << 24) +#define F_PKT_SUBPKT1_CORR_ERR_CNT_RD(x) (((x) & (((1 << 8) - 1) << 24)) >> 24) + +/* register PKT_ERR_CNT_23 */ +#define PKT_ERR_CNT_23 15 +#define F_PKT_SUBPKT2_ERR_CNT(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_PKT_SUBPKT2_ERR_CNT_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_PKT_SUBPKT2_CORR_ERR_CNT(x) (((x) & ((1 << 8) - 1)) << 8) +#define F_PKT_SUBPKT2_CORR_ERR_CNT_RD(x) (((x) & (((1 << 8) - 1) << 8)) >> 8) +#define F_PKT_SUBPKT3_ERR_CNT(x) (((x) & ((1 << 8) - 1)) << 16) +#define F_PKT_SUBPKT3_ERR_CNT_RD(x) (((x) & (((1 << 8) - 1) << 16)) >> 16) +#define F_PKT_SUBPKT3_CORR_ERR_CNT(x) (((x) & ((1 << 8) - 1)) << 24) +#define F_PKT_SUBPKT3_CORR_ERR_CNT_RD(x) (((x) & (((1 << 8) - 1) << 24)) >> 24) + +/* register TMDS_SCR_CTRL */ +#define TMDS_SCR_CTRL 16 +#define F_SCRAMBLER_MODE(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SCRAMBLER_MODE_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_SCRAMBLER_SW_EN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_SCRAMBLER_SW_EN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_SCRAMBLER_CTRL_SW_RST(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_SCRAMBLER_CTRL_SW_RST_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) + +/* register TMDS_SCR_CNT_INT_CTRL */ +#define TMDS_SCR_CNT_INT_CTRL 17 +#define F_SCRAMBLER_SSCP_LINE_DET_THR(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_SCRAMBLER_SSCP_LINE_DET_THR_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_SCRAMBLER_CTRL_LINE_DET_THR(x) (((x) & ((1 << 24) - 1)) << 8) +#define F_SCRAMBLER_CTRL_LINE_DET_THR_RD(x) (((x) & (((1 << 24) - 1) << 8)) >> 8) + +/* register TMDS_SCR_VALID_CTRL */ +#define TMDS_SCR_VALID_CTRL 18 +#define F_SCRAMBLER_SSCP_LINE_VALID_THR(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_SCRAMBLER_SSCP_LINE_VALID_THR_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_SCRAMBLER_CTRL_LINE_VALID_THR(x) (((x) & ((1 << 24) - 1)) << 8) +#define F_SCRAMBLER_CTRL_LINE_VALID_THR_RD(x) (((x) & (((1 << 24) - 1) << 8)) >> 8) + +/* register TMDS_SCR_CNT_INT_ST */ +#define TMDS_SCR_CNT_INT_ST 19 +#define F_SCRAMBLER_SSCP_LINE_CNT(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_SCRAMBLER_SSCP_LINE_CNT_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_SCRAMBLER_CTRL_LINE_CNT(x) (((x) & ((1 << 24) - 1)) << 8) +#define F_SCRAMBLER_CTRL_LINE_CNT_RD(x) (((x) & (((1 << 24) - 1) << 8)) >> 8) + +/* register TMDS_MHL_HD_INT_MASK */ +#define TMDS_MHL_HD_INT_MASK 20 +#define F_TMDS_MHL_HD_MASK(x) (((x) & ((1 << 9) - 1)) << 0) +#define F_TMDS_MHL_HD_MASK_RD(x) (((x) & (((1 << 9) - 1) << 0)) >> 0) + +/* register TMDS_MHL_HD_INT_STAT */ +#define TMDS_MHL_HD_INT_STAT 21 +#define F_TMDS_MHL_HD_STATUS(x) (((x) & ((1 << 9) - 1)) << 0) +#define F_TMDS_MHL_HD_STATUS_RD(x) (((x) & (((1 << 9) - 1) << 0)) >> 0) + +/* register TMDS_STAT_CNT0_CTRL */ +#define TMDS_STAT_CNT0_CTRL 22 +#define F_STATUS_CNT0_INC_SEL(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_STATUS_CNT0_INC_SEL_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_STATUS_CNT0_DEC_SEL(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_STATUS_CNT0_DEC_SEL_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_STATUS_CNT0_CLR_SEL(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_STATUS_CNT0_CLR_SEL_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_STATUS_CNT0_START_SEL(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_STATUS_CNT0_START_SEL_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_STATUS_CNT0_STOP_SEL(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_STATUS_CNT0_STOP_SEL_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) + +/* register TMDS_STAT_CNT0_THR */ +#define TMDS_STAT_CNT0_THR 23 +#define F_STATUS_CNT0_THR(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_STATUS_CNT0_THR_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register TMDS_STAT_CNT0_VAL */ +#define TMDS_STAT_CNT0_VAL 24 +#define F_STATUS_CNT0_VAL(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_STATUS_CNT0_VAL_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register TMDS_STAT_CNT1_CTRL */ +#define TMDS_STAT_CNT1_CTRL 25 +#define F_STATUS_CNT1_INC_SEL(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_STATUS_CNT1_INC_SEL_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_STATUS_CNT1_DEC_SEL(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_STATUS_CNT1_DEC_SEL_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_STATUS_CNT1_CLR_SEL(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_STATUS_CNT1_CLR_SEL_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_STATUS_CNT1_START_SEL(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_STATUS_CNT1_START_SEL_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_STATUS_CNT1_STOP_SEL(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_STATUS_CNT1_STOP_SEL_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) + +/* register TMDS_STAT_CNT1_THR */ +#define TMDS_STAT_CNT1_THR 26 +#define F_STATUS_CNT1_THR(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_STATUS_CNT1_THR_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register TMDS_STAT_CNT1_VAL */ +#define TMDS_STAT_CNT1_VAL 27 +#define F_STATUS_CNT1_VAL(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_STATUS_CNT1_VAL_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register TMDS_STAT_CNT2_CTRL */ +#define TMDS_STAT_CNT2_CTRL 28 +#define F_STATUS_CNT2_INC_SEL(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_STATUS_CNT2_INC_SEL_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_STATUS_CNT2_DEC_SEL(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_STATUS_CNT2_DEC_SEL_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_STATUS_CNT2_CLR_SEL(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_STATUS_CNT2_CLR_SEL_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_STATUS_CNT2_START_SEL(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_STATUS_CNT2_START_SEL_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_STATUS_CNT2_STOP_SEL(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_STATUS_CNT2_STOP_SEL_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) + +/* register TMDS_STAT_CNT2_THR */ +#define TMDS_STAT_CNT2_THR 29 +#define F_STATUS_CNT2_THR(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_STATUS_CNT2_THR_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register TMDS_STAT_CNT2_VAL */ +#define TMDS_STAT_CNT2_VAL 30 +#define F_STATUS_CNT2_VAL(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_STATUS_CNT2_VAL_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register TMDS_STAT_CNT3_CTRL */ +#define TMDS_STAT_CNT3_CTRL 31 +#define F_STATUS_CNT3_INC_SEL(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_STATUS_CNT3_INC_SEL_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_STATUS_CNT3_DEC_SEL(x) (((x) & ((1 << 4) - 1)) << 4) +#define F_STATUS_CNT3_DEC_SEL_RD(x) (((x) & (((1 << 4) - 1) << 4)) >> 4) +#define F_STATUS_CNT3_CLR_SEL(x) (((x) & ((1 << 4) - 1)) << 8) +#define F_STATUS_CNT3_CLR_SEL_RD(x) (((x) & (((1 << 4) - 1) << 8)) >> 8) +#define F_STATUS_CNT3_START_SEL(x) (((x) & ((1 << 4) - 1)) << 12) +#define F_STATUS_CNT3_START_SEL_RD(x) (((x) & (((1 << 4) - 1) << 12)) >> 12) +#define F_STATUS_CNT3_STOP_SEL(x) (((x) & ((1 << 4) - 1)) << 16) +#define F_STATUS_CNT3_STOP_SEL_RD(x) (((x) & (((1 << 4) - 1) << 16)) >> 16) + +/* register TMDS_STAT_CNT3_THR */ +#define TMDS_STAT_CNT3_THR 32 +#define F_STATUS_CNT3_THR(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_STATUS_CNT3_THR_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register TMDS_STAT_CNT3_VAL */ +#define TMDS_STAT_CNT3_VAL 33 +#define F_STATUS_CNT3_VAL(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_STATUS_CNT3_VAL_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register TMDS_POLARITY_STAT */ +#define TMDS_POLARITY_STAT 34 +#define F_TMDS_HSYNC_POLARITY(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_TMDS_HSYNC_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_TMDS_VSYNC_POLARITY(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_TMDS_VSYNC_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) + +/* register TMDS_MHL_HD_ERR_INT_MASK */ +#define TMDS_MHL_HD_ERR_INT_MASK 35 +#define F_TMDS_MHL_HD_ERR_MASK(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_TMDS_MHL_HD_ERR_MASK_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) + +/* register TMDS_MHL_HD_ERR_INT_STAT */ +#define TMDS_MHL_HD_ERR_INT_STAT 36 +#define F_TMDS_MHL_HD_ERR_STATUS(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_TMDS_MHL_HD_ERR_STATUS_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) + +/* register MHL_HD_INT_MASK */ +#define MHL_HD_INT_MASK 37 +#define F_MHL_HD_INT_MASK(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_MHL_HD_INT_MASK_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) + +/* register MHL_HD_INT_STAT */ +#define MHL_HD_INT_STAT 38 +#define F_MHL_HD_INT_STATUS(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_MHL_HD_INT_STATUS_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) + +/* register PKT_ACR_CTS_CTRL */ +#define PKT_ACR_CTS_CTRL 39 +#define F_SW_FORCE_ACR_CTS(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SW_FORCE_ACR_CTS_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_PKT_DEC_ACR_CTS(x) (((x) & ((1 << 20) - 1)) << 1) +#define F_PKT_DEC_ACR_CTS_RD(x) (((x) & (((1 << 20) - 1) << 1)) >> 1) + +/* register PKT_ACR_N_CTRL */ +#define PKT_ACR_N_CTRL 40 +#define F_SW_FORCE_ACR_N(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SW_FORCE_ACR_N_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_PKT_DEC_ACR_N(x) (((x) & ((1 << 20) - 1)) << 1) +#define F_PKT_DEC_ACR_N_RD(x) (((x) & (((1 << 20) - 1) << 1)) >> 1) + +/* register PKT_AVI_DATA_LOW */ +#define PKT_AVI_DATA_LOW 41 +#define F_PKT_DEC_AVI_DATA_LOW(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_PKT_DEC_AVI_DATA_LOW_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register PKT_AVI_DATA_HIGH */ +#define PKT_AVI_DATA_HIGH 42 +#define F_PKT_DEC_AVI_DATA_HIGH(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_PKT_DEC_AVI_DATA_HIGH_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) + +#endif /* SINK_MHL_HD */ + diff --git a/drivers/mxc/hdp/sink_pif.h b/drivers/mxc/hdp/sink_pif.h new file mode 100644 index 000000000000..bd0944fbb27f --- /dev/null +++ b/drivers/mxc/hdp/sink_pif.h @@ -0,0 +1,160 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * This file was auto-generated. Do not edit it manually. + * + ****************************************************************************** + * + * sink_pif.h + * + ****************************************************************************** + */ + +#ifndef SINK_PIF_H_ +#define SINK_PIF_H_ + +/* register PKT_INFO_TYPE_CFG1 */ +#define PKT_INFO_TYPE_CFG1 0 +#define F_INFO_TYPE1(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_INFO_TYPE1_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_INFO_TYPE2(x) (((x) & ((1 << 8) - 1)) << 8) +#define F_INFO_TYPE2_RD(x) (((x) & (((1 << 8) - 1) << 8)) >> 8) +#define F_INFO_TYPE3(x) (((x) & ((1 << 8) - 1)) << 16) +#define F_INFO_TYPE3_RD(x) (((x) & (((1 << 8) - 1) << 16)) >> 16) +#define F_INFO_TYPE4(x) (((x) & ((1 << 8) - 1)) << 24) +#define F_INFO_TYPE4_RD(x) (((x) & (((1 << 8) - 1) << 24)) >> 24) + +/* register PKT_INFO_TYPE_CFG2 */ +#define PKT_INFO_TYPE_CFG2 1 +#define F_INFO_TYPE5(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_INFO_TYPE5_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_INFO_TYPE6(x) (((x) & ((1 << 8) - 1)) << 8) +#define F_INFO_TYPE6_RD(x) (((x) & (((1 << 8) - 1) << 8)) >> 8) +#define F_INFO_TYPE7(x) (((x) & ((1 << 8) - 1)) << 16) +#define F_INFO_TYPE7_RD(x) (((x) & (((1 << 8) - 1) << 16)) >> 16) +#define F_INFO_TYPE8(x) (((x) & ((1 << 8) - 1)) << 24) +#define F_INFO_TYPE8_RD(x) (((x) & (((1 << 8) - 1) << 24)) >> 24) + +/* register PKT_INFO_TYPE_CFG3 */ +#define PKT_INFO_TYPE_CFG3 2 +#define F_INFO_TYPE9(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_INFO_TYPE9_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_INFO_TYPE10(x) (((x) & ((1 << 8) - 1)) << 8) +#define F_INFO_TYPE10_RD(x) (((x) & (((1 << 8) - 1) << 8)) >> 8) +#define F_INFO_TYPE11(x) (((x) & ((1 << 8) - 1)) << 16) +#define F_INFO_TYPE11_RD(x) (((x) & (((1 << 8) - 1) << 16)) >> 16) +#define F_INFO_TYPE12(x) (((x) & ((1 << 8) - 1)) << 24) +#define F_INFO_TYPE12_RD(x) (((x) & (((1 << 8) - 1) << 24)) >> 24) + +/* register PKT_INFO_TYPE_CFG4 */ +#define PKT_INFO_TYPE_CFG4 3 +#define F_INFO_TYPE13(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_INFO_TYPE13_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_INFO_TYPE14(x) (((x) & ((1 << 8) - 1)) << 8) +#define F_INFO_TYPE14_RD(x) (((x) & (((1 << 8) - 1) << 8)) >> 8) +#define F_INFO_TYPE15(x) (((x) & ((1 << 8) - 1)) << 16) +#define F_INFO_TYPE15_RD(x) (((x) & (((1 << 8) - 1) << 16)) >> 16) +#define F_INFO_TYPE16(x) (((x) & ((1 << 8) - 1)) << 24) +#define F_INFO_TYPE16_RD(x) (((x) & (((1 << 8) - 1) << 24)) >> 24) + +/* register PKT_INFO_CTRL */ +#define PKT_INFO_CTRL 4 +#define F_PACKET_RDN_WR(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_PACKET_RDN_WR_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_PACKET_NUM(x) (((x) & ((1 << 4) - 1)) << 1) +#define F_PACKET_NUM_RD(x) (((x) & (((1 << 4) - 1) << 1)) >> 1) + +/* register PKT_INFO_HEADER */ +#define PKT_INFO_HEADER 7 +#define F_PKT_MEMORY_HEADER(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_PKT_MEMORY_HEADER_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register PKT_INFO_DATA1 */ +#define PKT_INFO_DATA1 8 +#define F_PKT_MEMORY_DATA1(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_PKT_MEMORY_DATA1_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register PKT_INFO_DATA2 */ +#define PKT_INFO_DATA2 9 +#define F_PKT_MEMORY_DATA2(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_PKT_MEMORY_DATA2_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register PKT_INFO_DATA3 */ +#define PKT_INFO_DATA3 10 +#define F_PKT_MEMORY_DATA3(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_PKT_MEMORY_DATA3_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register PKT_INFO_DATA4 */ +#define PKT_INFO_DATA4 11 +#define F_PKT_MEMORY_DATA4(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_PKT_MEMORY_DATA4_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register PKT_INFO_DATA5 */ +#define PKT_INFO_DATA5 12 +#define F_PKT_MEMORY_DATA5(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_PKT_MEMORY_DATA5_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register PKT_INFO_DATA6 */ +#define PKT_INFO_DATA6 13 +#define F_PKT_MEMORY_DATA6(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_PKT_MEMORY_DATA6_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register PKT_INFO_DATA7 */ +#define PKT_INFO_DATA7 14 +#define F_PKT_MEMORY_DATA7(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_PKT_MEMORY_DATA7_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register PKT_INT_STATUS */ +#define PKT_INT_STATUS 15 +#define F_PKT_RDY_STATUS(x) (((x) & ((1 << 17) - 1)) << 0) +#define F_PKT_RDY_STATUS_RD(x) (((x) & (((1 << 17) - 1) << 0)) >> 0) + +/* register PKT_INT_MASK */ +#define PKT_INT_MASK 16 +#define F_PKT_RDY_MASK(x) (((x) & ((1 << 17) - 1)) << 0) +#define F_PKT_RDY_MASK_RD(x) (((x) & (((1 << 17) - 1) << 0)) >> 0) + +/* register PKT_TRANS_CTRL */ +#define PKT_TRANS_CTRL 17 +#define F_PKT_TRANS_MASK_ERR(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_PKT_TRANS_MASK_ERR_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) + +#endif /* SINK_PIF */ diff --git a/drivers/mxc/hdp/sink_vif.h b/drivers/mxc/hdp/sink_vif.h new file mode 100644 index 000000000000..cce0080a81e3 --- /dev/null +++ b/drivers/mxc/hdp/sink_vif.h @@ -0,0 +1,285 @@ +/****************************************************************************** + * + * Copyright (C) 2016-2017 Cadence Design Systems, Inc. + * All rights reserved worldwide. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copyright 2018 NXP + * + ****************************************************************************** + * + * This file was auto-generated. Do not edit it manually. + * + ****************************************************************************** + * + * sink_vif.h + * + ****************************************************************************** + */ +#ifndef SINK_VIF_H_ +#define SINK_VIF_H_ + +/* register VIDEO_UNPACK_CFG */ +#define VIDEO_UNPACK_CFG 0 +#define F_SW_CD_PHASE(x) (((x) & ((1 << 4) - 1)) << 0) +#define F_SW_CD_PHASE_RD(x) (((x) & (((1 << 4) - 1) << 0)) >> 0) +#define F_FORCE_SW_CD(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_FORCE_SW_CD_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_SW_CD_COLOR_DEPTH(x) (((x) & ((1 << 4) - 1)) << 5) +#define F_SW_CD_COLOR_DEPTH_RD(x) (((x) & (((1 << 4) - 1) << 5)) >> 5) +#define F_FORCE_SW_PHASE(x) (((x) & ((1 << 1) - 1)) << 9) +#define F_FORCE_SW_PHASE_RD(x) (((x) & (((1 << 1) - 1) << 9)) >> 9) +#define F_VIDEO_PIXEL_ENCODING(x) (((x) & ((1 << 2) - 1)) << 10) +#define F_VIDEO_PIXEL_ENCODING_RD(x) (((x) & (((1 << 2) - 1) << 10)) >> 10) + +/* register VIDEO_UNPACK_CTRL */ +#define VIDEO_UNPACK_CTRL 1 +#define F_SW_CD_FSM_CLR(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_SW_CD_FSM_CLR_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_CD_ENABLE(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_CD_ENABLE_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_CD_FIFO_AEMPTY_TH(x) (((x) & ((1 << 5) - 1)) << 2) +#define F_CD_FIFO_AEMPTY_TH_RD(x) (((x) & (((1 << 5) - 1) << 2)) >> 2) +#define F_FSM_ERROR_ENABLE(x) (((x) & ((1 << 1) - 1)) << 7) +#define F_FSM_ERROR_ENABLE_RD(x) (((x) & (((1 << 1) - 1) << 7)) >> 7) + +/* register VIDEO_UNPACK_STAT */ +#define VIDEO_UNPACK_STAT 2 +#define F_CD_FIFO_OVERRUN(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_CD_FIFO_OVERRUN_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_CD_FIFO_UNDERRUN(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_CD_FIFO_UNDERRUN_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_CD_PHASE(x) (((x) & ((1 << 4) - 1)) << 2) +#define F_CD_PHASE_RD(x) (((x) & (((1 << 4) - 1) << 2)) >> 2) +#define F_CD_COLOR_DEPTH(x) (((x) & ((1 << 4) - 1)) << 6) +#define F_CD_COLOR_DEPTH_RD(x) (((x) & (((1 << 4) - 1) << 6)) >> 6) +#define F_CD_LAST_PHASE(x) (((x) & ((1 << 4) - 1)) << 10) +#define F_CD_LAST_PHASE_RD(x) (((x) & (((1 << 4) - 1) << 10)) >> 10) +#define F_CD_FIFO_EMPTY(x) (((x) & ((1 << 1) - 1)) << 14) +#define F_CD_FIFO_EMPTY_RD(x) (((x) & (((1 << 1) - 1) << 14)) >> 14) +#define F_CD_FIFO_FULL(x) (((x) & ((1 << 1) - 1)) << 15) +#define F_CD_FIFO_FULL_RD(x) (((x) & (((1 << 1) - 1) << 15)) >> 15) +#define F_CD_STATE(x) (((x) & ((1 << 5) - 1)) << 16) +#define F_CD_STATE_RD(x) (((x) & (((1 << 5) - 1) << 16)) >> 16) + +/* register VANLYZ_CTRL */ +#define VANLYZ_CTRL 4 +#define F_VANLYZ_START(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_VANLYZ_START_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_VANLYZ_RESET(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_VANLYZ_RESET_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_VANLYZ_FRAMES_CHECK_EN(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_VANLYZ_FRAMES_CHECK_EN_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_VANLYZ_FORMAT_FINDER_EN(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_VANLYZ_FORMAT_FINDER_EN_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) + +/* register VANLYZ_FRAMES_TO_CHECK */ +#define VANLYZ_FRAMES_TO_CHECK 5 +#define F_VANLYZ_FRAMES_TO_CHECK(x) (((x) & ((1 << 32) - 1)) << 0) +#define F_VANLYZ_FRAMES_TO_CHECK_RD(x) (((x) & (((1 << 32) - 1) << 0)) >> 0) + +/* register VANLYZ_CFG_0 */ +#define VANLYZ_CFG_0 6 +#define F_VANLYZ_HSYNC_POLARITY(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_VANLYZ_HSYNC_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_VANLYZ_VSYNC_POLARITY(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_VANLYZ_VSYNC_POLARITY_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) +#define F_VANLYZ_BITWIDTH(x) (((x) & ((1 << 2) - 1)) << 2) +#define F_VANLYZ_BITWIDTH_RD(x) (((x) & (((1 << 2) - 1) << 2)) >> 2) + +/* register VANLYZ_CFG_1 */ +#define VANLYZ_CFG_1 7 +#define F_VANLYZ_FRONT_PORCH(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_VANLYZ_FRONT_PORCH_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) +#define F_VANLYZ_BACK_PORCH(x) (((x) & ((1 << 16) - 1)) << 16) +#define F_VANLYZ_BACK_PORCH_RD(x) (((x) & (((1 << 16) - 1) << 16)) >> 16) + +/* register VANLYZ_CFG_2 */ +#define VANLYZ_CFG_2 8 +#define F_VANLYZ_ACTIVE_SLOT(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_VANLYZ_ACTIVE_SLOT_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) +#define F_VANLYZ_FRAME_LINES(x) (((x) & ((1 << 16) - 1)) << 16) +#define F_VANLYZ_FRAME_LINES_RD(x) (((x) & (((1 << 16) - 1) << 16)) >> 16) + +/* register VANLYZ_CFG_3 */ +#define VANLYZ_CFG_3 9 +#define F_VANLYZ_LINE_WIDTH(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_VANLYZ_LINE_WIDTH_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) + +/* register VANLYZ_CFG_4 */ +#define VANLYZ_CFG_4 10 +#define F_VANLYZ_NUM_CLK_CYC(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_VANLYZ_NUM_CLK_CYC_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) +#define F_VANLYZ_VSYNC_LINES(x) (((x) & ((1 << 8) - 1)) << 24) +#define F_VANLYZ_VSYNC_LINES_RD(x) (((x) & (((1 << 8) - 1) << 24)) >> 24) + +/* register VANLYZ_CFG_5 */ +#define VANLYZ_CFG_5 11 +#define F_VANLYZ_3D_MODE(x) (((x) & ((1 << 3) - 1)) << 0) +#define F_VANLYZ_3D_MODE_RD(x) (((x) & (((1 << 3) - 1) << 0)) >> 0) +#define F_VANLYZ_EOF_LINES(x) (((x) & ((1 << 8) - 1)) << 3) +#define F_VANLYZ_EOF_LINES_RD(x) (((x) & (((1 << 8) - 1) << 3)) >> 3) +#define F_VANLYZ_SOF_LINES(x) (((x) & ((1 << 8) - 1)) << 11) +#define F_VANLYZ_SOF_LINES_RD(x) (((x) & (((1 << 8) - 1) << 11)) >> 11) + +/* register VANLYZ_CLK_METER_REF_CYC */ +#define VANLYZ_CLK_METER_REF_CYC 12 +#define F_VANLYZ_CLK_METER_REF_CYC(x) (((x) & ((1 << 24) - 1)) << 0) +#define F_VANLYZ_CLK_METER_REF_CYC_RD(x) (((x) & (((1 << 24) - 1) << 0)) >> 0) + +/* register VANLYZ_CLK_METER_MEAS_TOLRNCE */ +#define VANLYZ_CLK_METER_MEAS_TOLRNCE 13 +#define F_VANLYZ_CLK_METER_MEAS_TOLRNCE(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_VANLYZ_CLK_METER_MEAS_TOLRNCE_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) + +/* register VANLYZ_FORMAT_NUM */ +#define VANLYZ_FORMAT_NUM 14 +#define F_VANLYZ_FORMAT1_NUM(x) (((x) & ((1 << 6) - 1)) << 0) +#define F_VANLYZ_FORMAT1_NUM_RD(x) (((x) & (((1 << 6) - 1) << 0)) >> 0) +#define F_VANLYZ_FORMAT2_NUM(x) (((x) & ((1 << 6) - 1)) << 8) +#define F_VANLYZ_FORMAT2_NUM_RD(x) (((x) & (((1 << 6) - 1) << 8)) >> 8) + +/* register VANLYZ_FAILURES */ +#define VANLYZ_FAILURES 15 +#define F_VANLYZ_FAILURES(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_VANLYZ_FAILURES_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) + +/* register VANLYZ_ST_0 */ +#define VANLYZ_ST_0 16 +#define F_VANLYZ_STATUS_HP(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_VANLYZ_STATUS_HP_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_VANLYZ_STATUS_VP(x) (((x) & ((1 << 1) - 1)) << 1) +#define F_VANLYZ_STATUS_VP_RD(x) (((x) & (((1 << 1) - 1) << 1)) >> 1) + +/* register VANLYZ_ST_1 */ +#define VANLYZ_ST_1 17 +#define F_VANLYZ_STATUS_FRAME_LINES(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_VANLYZ_STATUS_FRAME_LINES_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) +#define F_VANLYZ_STATUS_FP(x) (((x) & ((1 << 16) - 1)) << 16) +#define F_VANLYZ_STATUS_FP_RD(x) (((x) & (((1 << 16) - 1) << 16)) >> 16) + +/* register VANLYZ_ST_2 */ +#define VANLYZ_ST_2 18 +#define F_VANLYZ_STATUS_BP(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_VANLYZ_STATUS_BP_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) +#define F_VANLYZ_STATUS_AS(x) (((x) & ((1 << 16) - 1)) << 16) +#define F_VANLYZ_STATUS_AS_RD(x) (((x) & (((1 << 16) - 1) << 16)) >> 16) + +/* register VANLYZ_STATUS_3 */ +#define VANLYZ_STATUS_3 19 +#define F_VANLYZ_STATUS_LINE_WIDTH(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_VANLYZ_STATUS_LINE_WIDTH_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) + +/* register VANLYZ_STATUS_4 */ +#define VANLYZ_STATUS_4 20 +#define F_VANLYZ_STATUS_VSYNC_LINES(x) (((x) & ((1 << 8) - 1)) << 0) +#define F_VANLYZ_STATUS_VSYNC_LINES_RD(x) (((x) & (((1 << 8) - 1) << 0)) >> 0) +#define F_VANLYZ_STATUS_EOF_LINES(x) (((x) & ((1 << 8) - 1)) << 8) +#define F_VANLYZ_STATUS_EOF_LINES_RD(x) (((x) & (((1 << 8) - 1) << 8)) >> 8) +#define F_VANLYZ_STATUS_SOF_LINES(x) (((x) & ((1 << 8) - 1)) << 16) +#define F_VANLYZ_STATUS_SOF_LINES_RD(x) (((x) & (((1 << 8) - 1) << 16)) >> 16) + +/* register VANLYZ_STATUS_5 */ +#define VANLYZ_STATUS_5 21 +#define F_VANLYZ_FORMAT_FINDER_ADD(x) (((x) & ((1 << 6) - 1)) << 0) +#define F_VANLYZ_FORMAT_FINDER_ADD_RD(x) (((x) & (((1 << 6) - 1) << 0)) >> 0) +#define F_VANLYZ_FORMAT_FINDER_ACTIVE(x) (((x) & ((1 << 1) - 1)) << 6) +#define F_VANLYZ_FORMAT_FINDER_ACTIVE_RD(x) (((x) & (((1 << 1) - 1) << 6)) >> 6) +#define F_VANLYZ_CNT_LINES(x) (((x) & ((1 << 18) - 1)) << 7) +#define F_VANLYZ_CNT_LINES_RD(x) (((x) & (((1 << 18) - 1) << 7)) >> 7) + +/* register VANLYZ_STATUS_6 */ +#define VANLYZ_STATUS_6 22 +#define F_VANLYZ_CNT_VIDEO(x) (((x) & ((1 << 18) - 1)) << 0) +#define F_VANLYZ_CNT_VIDEO_RD(x) (((x) & (((1 << 18) - 1) << 0)) >> 0) + +/* register VANLYZ_STATUS_7 */ +#define VANLYZ_STATUS_7 23 +#define F_VANLYZ_VIDEO_SIZE(x) (((x) & ((1 << 18) - 1)) << 0) +#define F_VANLYZ_VIDEO_SIZE_RD(x) (((x) & (((1 << 18) - 1) << 0)) >> 0) + +/* register VANLYZ_PIC_CFG_0 */ +#define VANLYZ_PIC_CFG_0 24 +#define F_VANLYZ_PIC_R(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_VANLYZ_PIC_R_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) +#define F_VANLYZ_PIC_G(x) (((x) & ((1 << 16) - 1)) << 16) +#define F_VANLYZ_PIC_G_RD(x) (((x) & (((1 << 16) - 1) << 16)) >> 16) + +/* register VANLYZ_PIC_CFG_1 */ +#define VANLYZ_PIC_CFG_1 25 +#define F_VANLYZ_PIC_B(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_VANLYZ_PIC_B_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) + +/* register VIF_MHL_HD_ERR_INT_MASK */ +#define VIF_MHL_HD_ERR_INT_MASK 26 +#define F_VIF_MHL_HD_ERR_MASK(x) (((x) & ((1 << 20) - 1)) << 0) +#define F_VIF_MHL_HD_ERR_MASK_RD(x) (((x) & (((1 << 20) - 1) << 0)) >> 0) + +/* register VIF_MHL_HD_ERR_INT_STAT */ +#define VIF_MHL_HD_ERR_INT_STAT 27 +#define F_VIF_MHL_HD_ERR_STATUS(x) (((x) & ((1 << 20) - 1)) << 0) +#define F_VIF_MHL_HD_ERR_STATUS_RD(x) (((x) & (((1 << 20) - 1) << 0)) >> 0) + +/* register VIF_IP_DETECT_CTRL */ +#define VIF_IP_DETECT_CTRL 28 +#define F_READ_DTCT_ERR(x) (((x) & ((1 << 1) - 1)) << 0) +#define F_READ_DTCT_ERR_RD(x) (((x) & (((1 << 1) - 1) << 0)) >> 0) +#define F_IP_DTCT_WIN(x) (((x) & ((1 << 12) - 1)) << 1) +#define F_IP_DTCT_WIN_RD(x) (((x) & (((1 << 12) - 1) << 1)) >> 1) +#define F_IP_DTCT_EN(x) (((x) & ((1 << 1) - 1)) << 13) +#define F_IP_DTCT_EN_RD(x) (((x) & (((1 << 1) - 1) << 13)) >> 13) + +/* register VIF_IP_DETECT_ST1 */ +#define VIF_IP_DETECT_ST1 29 +#define F_IP_DTCT_HSYNC2VSYNC_F1(x) (((x) & ((1 << 16) - 1)) << 0) +#define F_IP_DTCT_HSYNC2VSYNC_F1_RD(x) (((x) & (((1 << 16) - 1) << 0)) >> 0) +#define F_IP_DTCT_HSYNC2VSYNC_F2(x) (((x) & ((1 << 16) - 1)) << 16) +#define F_IP_DTCT_HSYNC2VSYNC_F2_RD(x) (((x) & (((1 << 16) - 1) << 16)) >> 16) + +/* register VIF_IP_DETECT_ST2 */ +#define VIF_IP_DETECT_ST2 30 +#define F_IP_STATE(x) (((x) & ((1 << 2) - 1)) << 0) +#define F_IP_STATE_RD(x) (((x) & (((1 << 2) - 1) << 0)) >> 0) +#define F_IP_DTCT_ERR(x) (((x) & ((1 << 1) - 1)) << 2) +#define F_IP_DTCT_ERR_RD(x) (((x) & (((1 << 1) - 1) << 2)) >> 2) +#define F_IP_DTCT_HJITTER(x) (((x) & ((1 << 1) - 1)) << 3) +#define F_IP_DTCT_HJITTER_RD(x) (((x) & (((1 << 1) - 1) << 3)) >> 3) +#define F_IP_DTCT_VJITTER(x) (((x) & ((1 << 1) - 1)) << 4) +#define F_IP_DTCT_VJITTER_RD(x) (((x) & (((1 << 1) - 1) << 4)) >> 4) +#define F_IP_DTCT_IP(x) (((x) & ((1 << 1) - 1)) << 5) +#define F_IP_DTCT_IP_RD(x) (((x) & (((1 << 1) - 1) << 5)) >> 5) +#define F_IP_DTCT_FIELD(x) (((x) & ((1 << 1) - 1)) << 6) +#define F_IP_DTCT_FIELD_RD(x) (((x) & (((1 << 1) - 1) << 6)) >> 6) + +#endif /* SINK_VIF */ -- 2.17.1