From 0271b51f6f4f500dcad70db13b9e8607d155edad Mon Sep 17 00:00:00 2001 From: Ye Li Date: Tue, 3 Apr 2018 19:41:18 -0700 Subject: [PATCH] MLK-18154-1 dts: mx6sllevk: Update DTS to align with v2020.04 Update DTS, DTSi and clock binding file for mx6sllevk: 1. Fix USDHC pad settings 2. Add pin settings for i2c bus force idle 3. Fix non-removable bug for usdhc2 4. Update clock 5. Update model name 6. Update pmic node name Signed-off-by: Ye Li (cherry picked from commit 26bd5feefec059a0176768e89016cdc289839103) (cherry picked from commit f57952362eda7f56005e306ce6ef42e5a8e1b9e3) (cherry picked from commit dc75f7cf336985dc0b51635ee3c8612fd7a64ccd) --- arch/arm/dts/imx6sll-evk.dts | 132 ++++++++++++++-------- arch/arm/dts/imx6sll.dtsi | 30 +++-- include/dt-bindings/clock/imx6sll-clock.h | 3 +- 3 files changed, 108 insertions(+), 57 deletions(-) diff --git a/arch/arm/dts/imx6sll-evk.dts b/arch/arm/dts/imx6sll-evk.dts index b4af007c98..30da62e998 100644 --- a/arch/arm/dts/imx6sll-evk.dts +++ b/arch/arm/dts/imx6sll-evk.dts @@ -1,5 +1,6 @@ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -13,9 +14,13 @@ #include "imx6sll.dtsi" / { - model = "Freescale i.MX6SLL EVK Board"; + model = "i.MX6SLL EVK Board"; compatible = "fsl,imx6sll-evk", "fsl,imx6sll"; + chosen { + stdout-path = &uart1; + }; + memory { reg = <0x80000000 0x80000000>; }; @@ -103,6 +108,8 @@ regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; + off-on-delay-us = <10000>; + startup-delay-us = <2000>; enable-active-high; }; @@ -120,6 +127,8 @@ regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>; + off-on-delay-us = <10000>; + startup-delay-us = <2000>; enable-active-high; }; @@ -162,11 +171,14 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; status = "okay"; - pmic: pfuze100@08 { + pmic: pfuze100@8 { compatible = "fsl,pfuze100"; reg = <0x08>; @@ -211,6 +223,7 @@ sw4_reg: sw4 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <3300000>; + regulator-always-on; }; swbst_reg: swbst { @@ -314,10 +327,10 @@ VCOM_reg: VCOM { regulator-name = "VCOM"; - /* 2's-compliment, -4325000 */ - regulator-min-microvolt = <0xffbe0178>; - /* 2's-compliment, -500000 */ - regulator-max-microvolt = <0xfff85ee0>; + /* Real max value: -500000 */ + regulator-max-microvolt = <4325000>; + /* Real min value: -4325000 */ + regulator-min-microvolt = <500000>; }; VNEG_reg: VNEG { @@ -339,8 +352,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8962@1a { @@ -534,34 +550,34 @@ pinctrl_usdhc1: usdhc1grp { fsl,pins = < - MX6SLL_PAD_SD1_CMD__SD1_CMD 0x17059 - MX6SLL_PAD_SD1_CLK__SD1_CLK 0x13059 - MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x17059 - MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x17059 - MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x17059 - MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x17059 + MX6SLL_PAD_SD1_CMD__SD1_CMD 0x17061 + MX6SLL_PAD_SD1_CLK__SD1_CLK 0x13061 + MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x17061 + MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x17061 + MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x17061 + MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x17061 >; }; pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { fsl,pins = < - MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170b9 - MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130b9 - MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170b9 - MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170b9 - MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170b9 - MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170b9 + MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170a1 + MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130a1 + MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170a1 + MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170a1 + MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170a1 + MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170a1 >; }; pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { fsl,pins = < - MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170f9 + MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170e9 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130f9 - MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170f9 - MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170f9 - MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170f9 - MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170f9 + MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170e9 + MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170e9 + MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170e9 + MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170e9 >; }; @@ -615,34 +631,34 @@ pinctrl_usdhc3: usdhc3grp { fsl,pins = < - MX6SLL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6SLL_PAD_SD3_CLK__SD3_CLK 0x13059 - MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x17059 - MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x17059 - MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x17059 - MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x17059 + MX6SLL_PAD_SD3_CMD__SD3_CMD 0x17061 + MX6SLL_PAD_SD3_CLK__SD3_CLK 0x13061 + MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x17061 + MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x17061 + MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x17061 + MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x17061 >; }; pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { fsl,pins = < - MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170b9 - MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130b9 - MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170b9 - MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170b9 - MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170b9 - MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170b9 + MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170a1 + MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130a1 + MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170a1 + MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170a1 + MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170a1 + MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170a1 >; }; pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { fsl,pins = < - MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170f9 + MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170e9 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130f9 - MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170f9 - MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170f9 - MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170f9 - MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170f9 + MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170e9 + MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170e9 + MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170e9 + MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170e9 >; }; @@ -659,6 +675,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6SLL_PAD_I2C1_SCL__GPIO3_IO12 0x1b8b1 + MX6SLL_PAD_I2C1_SDA__GPIO3_IO13 0x1b8b1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6SLL_PAD_AUD_RXFS__I2C3_SCL 0x4041b8b1 @@ -666,11 +689,24 @@ >; }; + pinctrl_i2c3_gpio: i2c3grp_gpio { + fsl,pins = < + MX6SLL_PAD_AUD_RXFS__GPIO1_IO00 0x41b8b1 + MX6SLL_PAD_AUD_RXC__GPIO1_IO01 0x41b8b1 + >; + }; + pinctrl_pwm1: pmw1grp { fsl,pins = < MX6SLL_PAD_PWM1__PWM1_OUT 0x110b0 >; }; + + pinctrl_wdog1: wdog1grp { + fsl,pins = < + MX6SLL_PAD_WDOG_B__WDOG1_B 0x170b0 + >; + }; }; }; @@ -679,10 +715,10 @@ pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>; lcd-supply = <®_lcd>; - display = <&display>; + display = <&display0>; status = "okay"; - display: display { + display0: display@0 { bits-per-pixel = <16>; bus-width = <24>; @@ -753,7 +789,7 @@ pinctrl-2 = <&pinctrl_usdhc2_200mhz>; vqmmc-supply = <®_sd2_vmmc>; bus-width = <8>; - no-removable; + non-removable; status = "okay"; }; @@ -799,3 +835,9 @@ &ssi2 { status = "okay"; }; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog1>; + fsl,ext-reset-output; +}; diff --git a/arch/arm/dts/imx6sll.dtsi b/arch/arm/dts/imx6sll.dtsi index 349c47a03a..3b8ce21780 100644 --- a/arch/arm/dts/imx6sll.dtsi +++ b/arch/arm/dts/imx6sll.dtsi @@ -1,5 +1,6 @@ /* * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2018 NXP * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -37,6 +38,8 @@ spi4 = &ecspi4; usbphy0 = &usbphy1; usbphy1 = &usbphy2; + usb0 = &usbotg1; + usb1 = &usbotg2; }; cpus { @@ -50,14 +53,14 @@ next-level-cache = <&L2>; operating-points = < /* kHz uV */ - 996000 1225000 + 996000 1275000 792000 1175000 396000 1075000 198000 975000 >; fsl,soc-operating-points = < /* ARM kHz SOC-PU uV */ - 996000 1225000 + 996000 1175000 792000 1175000 396000 1175000 198000 1175000 @@ -166,6 +169,12 @@ reg = <0x00905000 0x1B000>; }; + ocram_optee: sram@00918000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x00918000 0x8000>; + overw_reg = <&ocram 0x00905000 0x13000>; + }; + L2: l2-cache@00a02000 { compatible = "arm,pl310-cache"; reg = <0x00a02000 0x1000>; @@ -210,7 +219,7 @@ "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", - "rxtx7", "dma"; + "rxtx7", "spba"; status = "disabled"; }; @@ -395,8 +404,8 @@ reg = <0x02098000 0x4000>; interrupts = ; clocks = <&clks IMX6SLL_CLK_GPT_BUS>, - <&clks IMX6SLL_CLK_GPT_SERIAL>; - clock-names = "ipg", "per"; + <&clks IMX6SLL_CLK_GPT_3M>; + clock-names = "ipg", "osc_per"; }; gpio1: gpio@0209c000 { @@ -528,7 +537,6 @@ fsl,tempmon = <&anatop>; fsl,tempmon-data = <&ocotp>; clocks = <&clks IMX6SLL_CLK_PLL3_USB_OTG>; - status = "disabled"; }; usbphy1: usbphy@020c9000 { @@ -574,7 +582,7 @@ regmap = <&snvs>; interrupts = ; linux,keycode = ; - wakeup; + wakeup-source; }; }; @@ -629,7 +637,7 @@ }; sdma: sdma@020ec000 { - compatible = "fsl,imx6sll-sdma", "fsl,imx35-sdma"; + compatible = "fsl,imx6ul-sdma", "fsl,imx35-sdma"; reg = <0x020ec000 0x4000>; interrupts = ; clocks = <&clks IMX6SLL_CLK_SDMA>, @@ -726,7 +734,7 @@ }; usdhc1: usdhc@02190000 { - compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc"; + compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc"; reg = <0x02190000 0x4000>; interrupts = ; clocks = <&clks IMX6SLL_CLK_USDHC1>, @@ -740,7 +748,7 @@ }; usdhc2: usdhc@02194000 { - compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc"; + compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc"; reg = <0x02194000 0x4000>; interrupts = ; clocks = <&clks IMX6SLL_CLK_USDHC2>, @@ -754,7 +762,7 @@ }; usdhc3: usdhc@02198000 { - compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc"; + compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc"; reg = <0x02198000 0x4000>; interrupts = ; clocks = <&clks IMX6SLL_CLK_USDHC3>, diff --git a/include/dt-bindings/clock/imx6sll-clock.h b/include/dt-bindings/clock/imx6sll-clock.h index 39c25671d6..22493cf47a 100644 --- a/include/dt-bindings/clock/imx6sll-clock.h +++ b/include/dt-bindings/clock/imx6sll-clock.h @@ -198,7 +198,8 @@ #define IMX6SLL_CLK_EXTERN_AUDIO_PRED 170 #define IMX6SLL_CLK_EXTERN_AUDIO_PODF 171 #define IMX6SLL_CLK_EXTERN_AUDIO 172 +#define IMX6SLL_CLK_GPT_3M 173 -#define IMX6SLL_CLK_END 173 +#define IMX6SLL_CLK_END 174 #endif /* __DT_BINDINGS_CLOCK_IMX6SLL_H */ -- 2.17.1