From 01317d523f0b66ebff0f4c36e3769b7da6cb9aae Mon Sep 17 00:00:00 2001 From: Peter Chen Date: Mon, 24 Jul 2017 15:21:25 +0800 Subject: [PATCH] MLK-16065-3 ARM64: dts: fsl-imx8qxp-lpddr4-arm2.dts: enable USB3 Type-C port At imx8qxp arm2 board, the USB3 controller is at one Type-C port, and the CC logic at this Type-C port is controlled by PTN5150. Enable USB3 Type-C port at this commit. Signed-off-by: Peter Chen --- .../dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts index 33df177df4b8..b9d9d98b1add 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts @@ -277,6 +277,12 @@ >; }; + pinctrl_ptn5150: ptn5150 { + fsl,pins = < + SC_P_SPI0_CS1_LSIO_GPIO1_IO07 0x00000021 + >; + }; + pinctrl_lpi2c1: lpi1cgrp { fsl,pins = < SC_P_USB_SS3_TC1_ADMA_I2C1_SCL 0x06000020 @@ -585,6 +591,14 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lpi2c1>; status = "okay"; + + typec_ptn5150: typec@3d { + compatible = "nxp,ptn5150"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ptn5150>; + reg = <0x3d>; + connect-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + }; }; &i2c3 { @@ -686,3 +700,9 @@ reset-gpio = <&gpio4 0 GPIO_ACTIVE_LOW>; status = "okay"; }; + +&usbotg3 { + dr_mode = "otg"; + extcon = <&typec_ptn5150>; + status = "okay"; +}; -- 2.17.1