Peter Chen [Mon, 24 Jul 2017 07:14:21 +0000 (15:14 +0800)]
MLK-16065-2 ARM64: dts: fsl-imx8qxp.dtsi: add Cadence USB3 support
Add Cadence USB3 controller and phy, the phy uses generic USB PHY
driver.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Peter Chen [Mon, 24 Jul 2017 07:11:49 +0000 (15:11 +0800)]
MLK-16065-1 ARM64: dts: fsl-imx8qm.dtsi: add Cadence USB3 support
Add Cadence USB3 controller and phy, the phy uses generic USB PHY
driver.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Bai Ping [Fri, 11 Aug 2017 05:50:56 +0000 (13:50 +0800)]
MLK-16202-03 ARM64: dts: add separate node for each domain on imx8mq
Use separate node for each domain, so we can easily handle the clock
and supply specific to each domain.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Bai Ping [Fri, 11 Aug 2017 05:50:08 +0000 (13:50 +0800)]
MLK-16202-02 driver: soc: refact the gpc power domain driver for imx8mq
Enhance the power domain driver for i.mx8mq. We may need to make sure
clock is enabled for some power domain. And also when a power domain
is down, the external supply for this power domain need to be turn off
to save power.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Robin Gong [Thu, 10 Aug 2017 09:03:45 +0000 (17:03 +0800)]
MLK-16202-01 driver: regulator: add enable/disable for switch for pfuze100
Add enable/disable support for switch regulator on pfuze100.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Bai Ping [Thu, 17 Aug 2017 07:54:06 +0000 (15:54 +0800)]
MLK-16209 ARM: dts: imx: add 'regulator-always-on' property for pmic sw4
Add 'regulator-always-on' for PMIC SW4 switch regulator.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Peng Fan [Thu, 17 Aug 2017 08:09:25 +0000 (16:09 +0800)]
MLK-16204-5: arm64: defconfig: build nvmem and ocotp
Build NVMEM and OCOTP driver
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 18 Aug 2017 03:19:08 +0000 (11:19 +0800)]
MLK-16204-4: nvmem: imx-ocotp: add i.mx8mq support and fix read
Add i.MX8MQ support and Fix read.
When offset is not 4 bytes aligned, directly shift righty by 2 bits
will cause reading out wrong data. Since imx ocotp only supports
4 bytes reading once, we need handle offset is not 4 bytes aligned
and enlarge the bytes to 4 bytes aligned. After finished reading,
copy the needed data from buffer to caller and free buffer.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 17 Aug 2017 07:59:00 +0000 (15:59 +0800)]
MLK-16204-3: clk: imx8mq: add ocotp clock
Add OCOTP clock support.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 17 Aug 2017 00:47:49 +0000 (08:47 +0800)]
MLK-16204-2 arm64: dts: add ocotp node
Add ocotp node.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 17 Aug 2017 09:06:21 +0000 (17:06 +0800)]
MLK-16204-1 nvmem: add imx-scu-ocotp driver
Add imx-scu-ocotp driver to support i.MX8QM/QXP.
The usage, add an entry in ocotp node, such as the test_1 entry:
ocotp: ocotp {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,imx8qm-ocotp", "syscon";
test_1: test_1@40 {
reg = <0x41 0x8>;
bits = <4 40>;
};
};
Then in your device node, add this:
node: node {
.....
nvmem-cells = <&test_1>;
nvmem-cell-names = "test_1";
};
Then in your driver, using the following piece code:
+#include <linux/nvmem-consumer.h>
struct nvmem_cell *cell;
u8 *val;
size_t len;
int i;
cell = devm_nvmem_cell_get(&pdev->dev, "test_1");
if (IS_ERR(cell)) {
if (PTR_ERR(cell) == -EPROBE_DEFER)
return -EPROBE_DEFER;
}
val = nvmem_cell_read(cell, &len);
The val points the contents that you need.
After shutdown or driver remove, use this:
devm_nvmem_cell_put(&pdev->dev, cell);
Note: we not reuse the imx-ocotp driver, because mix scu api with
legacy code will cost many maintenance efforts. When we have common
api support, we could merge the two.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fancy Fang [Fri, 18 Aug 2017 01:49:36 +0000 (09:49 +0800)]
MLK-16123 video: fbdev: dcss: change a print level to be debug
Change a 'dev_info' call to 'dev_dbg' call to avoid
possible too many kernel messages printed out.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Thu, 17 Aug 2017 08:08:04 +0000 (16:08 +0800)]
MLK-16205 video: fbdev: dcss: handle cfifo wrapping case
As time goes on, the cfifo buffer is close to be
exausted. And since the cfifo is a ring buffer,
so at this moment, the cfifo needs to be wrapped
to the buffer beginning. In this driver, the fifo
wrapping condition is that the free size to buffer
end is less than the commit size. And before the
buffer wrapping, the 'ctxld_wq' workqueue needs to
be flushed to make sure all the previous commited
jobs to be finished. Besides, this commit uses the
spinlock in the 'cqueue' workqueue to replace the
'wlock'.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Liu Ying [Thu, 17 Aug 2017 06:09:08 +0000 (14:09 +0800)]
MLK-16207-4 arm64: dts: fsl-imx8qxp-mek: Add LVDS2HDMI it6263 bridge(s) support
This patch adds LVDS to HDMI it6263 bridge(s) support on the i.MX8qxp MEK
platform. Since the platform supports up to two it6263 bridge(s) via
daughter cards plugged into mini-SAS connectors, this patch introduces
several DT sources so that users may choose relevant DT blob to use
single or dual it6263 display.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Thu, 17 Aug 2017 06:13:45 +0000 (14:13 +0800)]
MLK-16207-3 arm64: dts: fsl-imx8qxp-mek: Enable dpu1
This patch enables dpu1 DT node.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Thu, 17 Aug 2017 05:55:53 +0000 (13:55 +0800)]
MLK-16207-2 drm/bridge: it6263: 2nd time to workaround cable detection failure
There is cable detection failure issue on i.MX8qxp MEK platform at boot
time when we use single LVDS to HDMI display. The workaround is to read
the cable detection status for even more times. Based on experiments, it
looks reading for 90 times works.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Tue, 15 Aug 2017 07:59:44 +0000 (15:59 +0800)]
MLK-16207-1 drm/bridge: it6263: Add gpio reset support
A low pulse whose width is at least 40ms on pin SYSRSTN
may reset the bridge, according to the chip maker.
This patch adds gpio reset support for the bridge.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Yuchou Gan [Thu, 17 Aug 2017 16:35:50 +0000 (00:35 +0800)]
MGS-3093 [#imx-701] Fix power-off random failure when GPU become idle
Workaround to fix this issue, gpu failed to power off because chip is not idle when tried to cut the power, tried and wait until gpu is idle and then tried to power off will help.
Date: Aug 15, 2017
Signed-off-by: Yuchou Gan <yuchou.gan@nxp.com>
Fancy Fang [Wed, 16 Aug 2017 11:36:28 +0000 (19:36 +0800)]
MLK-16197-13 video: fbdev: dcss: workaround to make fifo commit to be synchronous
Add a workaround to make the fifo commit operation to be
synchronous, since for now, there is no interface which
can be called by user space to do synchronization.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 16 Aug 2017 10:58:08 +0000 (18:58 +0800)]
MLK-16197-12 video: fbdev: dcss: refine 'dtg_channel_timing_config'
Add 'blank' parameter to 'dtg_channel_timing_config' interface
to set or clear the channel display window according to the
blank state.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 16 Aug 2017 10:28:15 +0000 (18:28 +0800)]
MLK-16197-11 video: fbdev: dcss: remove (un)blank calls in 'dcss_set_par'
Remove the possible 'dcss_blank' calls in 'dcss_set_par',
since the context loader can change the DCSS sub-modules
configuration on the fly.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 16 Aug 2017 10:10:01 +0000 (18:10 +0800)]
MLK-16197-10 video: fbdev: dcss: improve 'dcss_blank' logic
Do the following improvements about 'dcss_blank':
1. move DPR trigger on config from 'dcss_blank' to
'dcss_dpr_config'.
2. move SCALER trigger on config from 'dcss_blank'
to 'dcss_scaler_config'.
3. remove duplicate code in 'dcss_blank'.
4. save the blank state for each channel in 'dcss_blank'.
All the above improvements focus on making fb blank/unblank
logic more simple and more clear.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 16 Aug 2017 09:36:21 +0000 (17:36 +0800)]
MLK-16197-9 video: fbdev: dcss: improve dtg config logic
Do the following improvements about DTG config:
1. move db and sb loading position config from
'dcss_dtg_config' to 'dcss_dtg_start'.
2. Only one DTG trigger config is required which
is put in 'dcss_dtg_start'.
3. move 'dcss_dtg_config' call from 'dcss_blank'
to 'dcss_set_par'.
4. add default background color configs for both
graph and video layers in 'dcss_dtg_start'.
5. remove channel enable and disable function in
'dcss_channel_blank'.
All the above improvements focus on making dtg config
logic more simple and more clear.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 16 Aug 2017 08:38:20 +0000 (16:38 +0800)]
MLK-16197-8 video: fbdev: dcss: move subsam config to probe
Move the SUBSAM config to probe stage to generate
display timings as soon as the graphic layer unblank.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 16 Aug 2017 08:26:35 +0000 (16:26 +0800)]
MLK-16197-7 video: fbdev: dcss: use display mode for subsam config
The SUBSAM module is used to generate the output timings
to display monitor. So use display mode to config SUBSAM
is more suitable and can reduce coupling degree between
SUBSAM config and graphic layer initialization.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 16 Aug 2017 07:59:03 +0000 (15:59 +0800)]
MLK-16197-6 video: fbdev: dcss: move 'dcss_dtg_start' call to probe
Move the 'dcss_dtg_start' calling to probe stage which
can service the fifo commits generated in probe stage
in time.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 16 Aug 2017 07:44:55 +0000 (15:44 +0800)]
MLK-16197-5 video: fbdev: dcss: use display mode for 1st frame dtg config
For the first frame timings generated by DTG, the display mode
is better to be used to configure this timings which can reduce
the coupling degree between first frame dtg config and the graphic
layer initialization process.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 11 Aug 2017 10:54:59 +0000 (18:54 +0800)]
MLK-16197-4 video: fbdev: dcss: improve hp/lp data count settings
For now, all the DCSS register configuration should be put
in the high priority single buffer by default in context
loader. So improve the high and low priority data counts
calculation and setting.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 9 Aug 2017 11:11:01 +0000 (19:11 +0800)]
MLK-16197-3 video: fbdev: dcss: add fifo commit in dcss_set_par().
In dcss_set_par(), it will config the parameters related
with
DEC400D/DTRC, DPR, SCALER, HDR10 and etc. So commit
all the registers configuration at the end of this function
to avoid mixing with later configurations which may cause
duplicating settings in one commit.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 11 Aug 2017 10:44:03 +0000 (18:44 +0800)]
MLK-16197-2 video: fbdev: dcss: init dcss irqs earlier
Initialize the DCSS interrupt system earlier to make
it enabled before any cfifo commit.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 9 Aug 2017 10:51:53 +0000 (18:51 +0800)]
MLK-16197-1 video: fbdev: dcss: use non-cacheable mapping for cfifo buffer.
The kernel direct mapping for cfifo buffer is cacheable which
requires cache flush and is easier to bring in strange issue.
So use coherent dma mapping for cfifo buffer access. But the
kfifo dma sgl interface using the direct mapping to get the
phyiscal page via dma mapping virtual addr. So record fifo 'in'
for each commit which is used for context loader sb and db addr
configurations.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Robby Cai [Thu, 20 Apr 2017 09:17:42 +0000 (17:17 +0800)]
MLK-14720 epdc: correct WFE setting when bypass legacy process
set WFE (WFE_A on imx7d, and WFE_B on imx6ull/imx6sll) input address to
framebuffer start address, and set left/top coordinate since the framebuffer is
the original source of WFE (i.e., not from PXP output) when bypass legacy mode.
The patch also limits the condition to bypass legacy mode when not use
EPDC_FLAG_USE_ALT_BUFFER.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit
7f19940705902623166777c675f5e10c9e7fc477)
Richard Zhu [Tue, 15 Aug 2017 09:18:17 +0000 (17:18 +0800)]
MLK-16176-2 PCI: imx: get the bus clock regulator correctly
In order to make sure that get the regulator correctly.
Check the return value of devm_regulator_get().
Return value directly if it is '-EPROBE_DEFER'
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Richard Zhu [Tue, 15 Aug 2017 09:15:50 +0000 (17:15 +0800)]
MLK-16176-1 ARM: dts: imx6qp: remove the duplicated node
The pcie dts node is dulicated, remove none-used one.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Fugang Duan [Mon, 14 Aug 2017 12:58:13 +0000 (20:58 +0800)]
MLK-16200 arm64: dts: imx8qxp-mek: enable UART port for Bluetooth 1FD and 1CQ
Enable lpuart port1 for Bluetooth HCI interface, tested pass on
Murata module 1FD and 1CQ on imx8qxp MEK board.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Pandy Gao <pandy.gao@nxp.com>
Fugang Duan [Mon, 14 Aug 2017 09:46:11 +0000 (17:46 +0800)]
MLK-16199 tty: serial: lpuart: don't clear idle flag in eeop mode
In DMA EEOP mode idle flag can trigger DMA major loop stop. The idle
flag should be cleared by HW. So others cannot clear idle flag in the
mode enabled.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Pandy Gao <pandy.gao@nxp.com>
Zhou Peng-B04994 [Wed, 16 Aug 2017 03:45:00 +0000 (11:45 +0800)]
MLK-16196: [i.MX8MQ/Hantro]: enhance power management for suspend/resume
Add operations to reset control block registers in resume functions,
otherwise system will crash
Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Adriana Reus [Tue, 1 Aug 2017 09:31:34 +0000 (12:31 +0300)]
MLK-16172: dts: imx8qm: Add pwm entries
Add entries for imx8qm pwms.
DT settings were tested on zebu.
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Anson Huang [Wed, 16 Aug 2017 07:52:06 +0000 (15:52 +0800)]
MLK-16201 arm64: dts: freescale: imx8mq: add dcss and hdmi power domain
On i.MX8MQ, DCSS and HDMI are in display mix power domain,
assgin them to display mix power domain.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Peter Chen [Thu, 8 Jun 2017 06:37:25 +0000 (14:37 +0800)]
usb: core: hub: controller driver name may be NULL
The controller driver may be NULL if the controller device
is the middle device between platform device and roothub.
This middle device may not need a device driver due to all
hardware control can be at platform device driver, this
platform device is usually a dual-role USB controller device.
The benefit of using this middle device is we can keep both
controller device's private data (known as struct usb_hcd)
for USB core use, and platform device's private data for
platform driver use.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Peter Chen <peter.chen@kernel.org>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Peter Chen [Fri, 23 Jun 2017 06:39:27 +0000 (14:39 +0800)]
usb: chipidea: core: do not register extcon notifier if extcon device is not existed
This issue is detected when the system has another device driver
which registers USB connector extcon device, fix it by adding
extcon device check.
Signed-off-by: Peter Chen <peter.chen@kernel.org>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Bai Ping [Tue, 15 Aug 2017 08:07:05 +0000 (16:07 +0800)]
MLK-16194 ARM64: defconfig: enable pm test config by default for imx8
Enable PM debug config in default config for imx8 SOC.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Gao Pan [Wed, 9 Aug 2017 08:47:05 +0000 (16:47 +0800)]
MLK-16189 arm64: dts: enable i2c bus expander for imx8qxp-mek
enable i2c bus expander for imx8qxp-mek
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Gao Pan [Thu, 10 Aug 2017 09:11:53 +0000 (17:11 +0800)]
MLK-16191 arm: dts: add i2c bus recovery for imx6qp-sdb board
Add i2c bus recovery support to recover i2c2 bus from dead lock status.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Bjorn Andersson [Sat, 8 Oct 2016 04:23:12 +0000 (21:23 -0700)]
rpmsg: Introduce a driver override mechanism
Similar to other subsystems it's useful to provide a mechanism to force
a specific driver match on a device, so introduce this.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Henri Roosen [Fri, 2 Jun 2017 11:36:04 +0000 (13:36 +0200)]
rpmsg: cleanup incorrect function in dev_err message
Trivial cleanup for incorrect function in dev_err message
Signed-off-by: Henri Roosen <henri.roosen@ginzinger.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Dan Carpenter [Sat, 21 Jan 2017 04:53:40 +0000 (07:53 +0300)]
rpmsg: unlock on error in rpmsg_eptdev_read()
We should unlock before returning if skb_dequeue() returns a NULL.
Fixes:
c0cdc19f84a4 ("rpmsg: Driver for user space endpoint interface")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Bjorn Andersson [Wed, 11 Jan 2017 14:35:12 +0000 (06:35 -0800)]
rpmsg: Driver for user space endpoint interface
This driver allows rpmsg instances to expose access to rpmsg endpoints
to user space processes. It provides a control interface, allowing
userspace to export endpoints and an endpoint interface for each exposed
endpoint.
The implementation is based on prior art by Texas Instrument, Google,
PetaLogix and was derived from a FreeRTOS performance statistics driver
written by Michal Simek.
The control interface provides a "create endpoint" ioctl, which is fed a
name, source and destination address. The three values are used to
create the endpoint, in a backend-specific way, and a rpmsg endpoint
device is created - with the three parameters are available in sysfs for
udev usage.
E.g. to create an endpoint device for one of the Qualcomm SMD channel
related to DIAG one would issue:
struct rpmsg_endpoint_info info = { "DIAG_CNTL", 0, 0 };
int fd = open("/dev/rpmsg_ctrl0", O_RDWR);
ioctl(fd, RPMSG_CREATE_EPT_IOCTL, &info);
Each created endpoint device shows up as an individual character device
in /dev, allowing permission to be controlled on a per-endpoint basis.
The rpmsg endpoint will be created and destroyed following the opening
and closing of the endpoint device, allowing rpmsg backends to open and
close the physical channel, if supported by the wire protocol.
Cc: Marek Novak <marek.novak@nxp.com>
Cc: Matteo Sartori <matteo.sartori@t3lab.it>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Sandor Yu [Thu, 10 Aug 2017 10:51:10 +0000 (18:51 +0800)]
MLK-16184: hdmi: Add timeout check to hdmi initialize
Add timeout check for hdmi FW alive function to avoid
kernel booting hang for that board without HDMI FW.
CDN_API_General_Test_Echo_Ext_blocking is the first
function that calling mailbox.
Add timeout to the function to avoid kernel booting hang
for that board without HDMI ROM patch.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Viorel Suman [Fri, 11 Aug 2017 08:30:08 +0000 (11:30 +0300)]
MLK-13975: ASoC: fsl: amix: remove primary SAI power on/off
The intention of currently implemented primary SAI power-on/off
on BE startup/shutdown was to make sure the primary SAI is
powered-on when the playback is started on the secondary SAI.
However in a such scenario the primary SAI is powered-on when
the primary SAI output is recorded.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Viorel Suman [Fri, 11 Aug 2017 07:45:48 +0000 (10:45 +0300)]
MLK-13975: ASoC: fsl: Assign audio clocks within it's own power domain
In order to leverage the power domain clocks rate store/restore
functionality all clocks used by device must be specified
within the device specific power domain.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Zhou Peng-B04994 [Fri, 11 Aug 2017 03:45:25 +0000 (11:45 +0800)]
MLK-16171: [i.MX8MQ/Hantro]: Refine coding style of hantro driver
Remove error reported by Linux coding style script
Remove unnecessary macro: MULTI_CORE,CLK_CFG,VSI
Remove unnecessary variables: base_port,elements,irq_x,mmp_timer_xxx
Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Mihai Serban [Wed, 9 Aug 2017 13:54:45 +0000 (16:54 +0300)]
MLK-16177: soc: imx: Fix resources release in pm-domains detach_dev function
Because of a typo the resources allocated in imx8_attach_dev were not
correctly released by imx8_detach_dev.
Fixes:
a0fb334819bb ("MLK16147-2 soc:imx Add support to save/restore clock rates")
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Han Xu [Wed, 9 Aug 2017 22:00:19 +0000 (17:00 -0500)]
MLK-16150: arm64: config: enable JFFS2 in defconfig
enable JFFS2 support in default configuration
Signed-off-by: Han Xu <han.xu@nxp.com>
Liu Ying [Thu, 10 Aug 2017 07:26:09 +0000 (15:26 +0800)]
MLK-16183 drm/bridge: it6263: Workaround cable detection failure at boot time
There is cable detection failure issue on i.MX8qxp arm2 platform
at boot time when we avoid imx-drm deferral probe entirely(i2c
bus driver probe needs to be before the it6263 driver probe).
The workaround is to read the cable detection status multiple
times. Based on experiments, it looks reading for 40 times works.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Wed, 9 Aug 2017 05:15:39 +0000 (13:15 +0800)]
MLK-16169 drm: Move imx-drm down after bridge in Makefile
We've got imx platforms which use bridges in imx-drm, e.g.,
the i.MX8qm and i.MX8qxp arm2 platforms use it6263 LVDS
to HDMI bridges in imx-drm. So, it would be straight
forward to put imx-drm down after bridge in Makefile to
avoid unnecessary deferral probe.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Wed, 9 Aug 2017 05:01:35 +0000 (13:01 +0800)]
MLK-16168 gpu: Move imx up before drm in Makefile
We register dpu and ipu-v3 crtc platform devices in dpu and ipu-v3
base drivers for imx-drm to use, so it would be straight forward to
put imx before drm in Makefile.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Anson Huang [Thu, 10 Aug 2017 06:27:09 +0000 (14:27 +0800)]
MLK-16182 defconfig: enable ondemand as default cpu-freq governor
Enable ondemand as default cpu-freq governor to save power.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Shengjiu Wang [Wed, 9 Aug 2017 07:25:47 +0000 (15:25 +0800)]
MLK-16174: ASoC: fsl_hifi4: load firmware in device open phase.
Move the load firmware operation from probe function to open,
Then firmware can be loaded from rootfs.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shenwei Wang [Wed, 9 Aug 2017 19:03:14 +0000 (14:03 -0500)]
MLK-16179 arm64: dts: imx8qxp-mek: enable the bcmdhd pcie driver
Enable the driver to support the Murata 1FD (BCM89359).
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Mihai Serban [Tue, 8 Aug 2017 17:41:07 +0000 (20:41 +0300)]
MLK-16163: WiFi: Fix compiler warning in bcmdhd driver
The mode the BUSTYPE macro is defined in
drivers/net/wireless/bcmdhd_1363/include/bcmdefs.h
will always trigger the below compiler warning when BCMBUSTYPE
is not defined.
Keep the comparison semantic but fix the warning by using a different
variable.
drivers/net/wireless/bcmdhd_1363/siutils.c: In function ‘si_doattach’:
drivers/net/wireless/bcmdhd_1363/siutils.c:520:14: warning:
self-comparison always evaluates to false [-Wtautological-compare]
if (bustype != BUSTYPE(bustype)) {
^~
Fixes:
b2290481a4f1 ("MLK-16042-1: Add bcmdhd v1.363 PCIE driver")
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Reviewed-by: Octavian Purdila <octavian.purdila@nxp.com>
Adriana Reus [Tue, 1 Aug 2017 08:30:39 +0000 (11:30 +0300)]
MLK-16124 clk: imx: clk-gate-scu: Replace enable/disable with prepare/unprepare
enable/disable are not allowed to sleep.
For clk_gate3_scu these functions use calls into scfw that may sleep.
Move this functionality into prepare/unprepare to avoid that.
Patch also adds is_prepared callback.
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Fancy Fang [Wed, 9 Aug 2017 05:20:06 +0000 (13:20 +0800)]
MLK-16170 ARM64: dts: imx8mq-evk: disable MIPI DSI by default
The default display for IMX8MQ platform is 'DCSS-->HDMI',
so disable MIPI DSI by default on IMX8MQ.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 8 Aug 2017 13:48:00 +0000 (21:48 +0800)]
MLK-16162 video: fbdev: dcss: enable DPR and SCALER only in fb unblank
Place the DPR and SCALER enablement when unblanking one fb,
and they are only required to be enabled at the first time,
since the 'repeat_en' function will set the 'run_en' automatically
for subsequent frames.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Viorel Suman [Tue, 8 Aug 2017 11:11:06 +0000 (14:11 +0300)]
MLK-13975: ASoC: fsl: amix: Add channels and format constraints
Add channels and format constraints.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Viorel Suman [Mon, 7 Aug 2017 13:56:06 +0000 (16:56 +0300)]
MLK-13975: ASoC: fsl: amix: eliminate unsupported rates
Eliminate unsupported rates for SAI MCLK frequency =
24576000.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Viorel Suman [Mon, 7 Aug 2017 11:41:22 +0000 (14:41 +0300)]
MLK-13975: ASoC: fsl: amix: fix maximum values
AMIX maximum values for attenuation initial value,
step up/down factors and step target is 0x3FFFFh.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Fancy Fang [Tue, 8 Aug 2017 06:35:42 +0000 (14:35 +0800)]
MLK-16158-6 ARM64: dts: imx8mq-evk: set default display mode for adv7535 to 1080p60Hz
Set the default display mode for ADV7535 to 1920x1080p@60Hz which
is the maximum resolution can be supported by ADV7535.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 8 Aug 2017 06:34:36 +0000 (14:34 +0800)]
MLK-16158-5 video: fbdev: adv7535: refine low refresh settings
Use the 'refresh' in video mode to determine to set
low refresh config for adv7535 wheter or not.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 8 Aug 2017 06:20:36 +0000 (14:20 +0800)]
MLK-16158-4 ARM64: dts: imx8mq: change dsi phy pll 'max-data-rate' to 1.5GHz
Accoring to the PHY spec, the DSI PHY PLL on imx8mq platform
can support up to 1.5GHz data rate. So change the 'max-data-rate'
to 1.5GHz on imx8mq.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 8 Aug 2017 06:00:26 +0000 (14:00 +0800)]
MLK-16158-3 video: fbdev: mipi_dsi_northwest: add 'vmode_index' to help phy pll config
Add a field 'vmode_index' to 'mipi_dsi_info' structure to
save the display video mode derived from dts to help config
the PHY PLL as desired.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 8 Aug 2017 05:06:06 +0000 (13:06 +0800)]
MLK-16158-2 ARM64: dts: imx8mq-evk: add a new dts to support 'LCDIF-->DSI'
There are two independent display path on imx8mq platform:
a. DCSS --> HDMI
b. LCDIF --> DSI
The default enabled display path is 'DCSS-->HDMI', so add
a new dts to enable 'LCDIF-->DSI', and at the same time,
disable 'DCSS-->HDMI' path.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 8 Aug 2017 03:04:14 +0000 (11:04 +0800)]
MLK-16158-1 video: fbdev: dcss: refine ctxld enable code.
Refine the ctxld enable configuration by using the
'CTXLD_CTRL_STATUS_SET' to make the code more clean
and strong.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Shengjiu Wang [Tue, 8 Aug 2017 06:34:23 +0000 (14:34 +0800)]
MLK-16159: ASoC: imx_cdnhdmi: refine the N value selection
According the HDMI spec, the N value depends on the TMDS
rate, and sample rate. As we set the vic mode in dts file,
use the vic_table to get the TMDS rate, then choose the
proper N value.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
Xianzhong [Sun, 6 Aug 2017 06:57:58 +0000 (14:57 +0800)]
MGS-3159 [#imx-700] fix kernel panic for x11 stress test
when gpu memory is from virtual system pool, the physical address
will become invalid, driver should enable mmu mapping accordingly.
but current kernel driver return the zero address with default value,
this mistake will cause gpu write into the wrong memory from zero.
this fix mark the invalid address for the virtual memory.
Date: Aug 06, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Reviewed-by: Yuchou Gan <yuchou.gan@nxp.com>
Reviewed-by: Yong Gan <yong.gan@nxp.com>
Tested-by: Jason Liu <jason.hui.liu@nxp.com>
Sandor Yu [Mon, 7 Aug 2017 08:38:16 +0000 (16:38 +0800)]
MLK-16153-02: dts: Add 4K60 dts for iMX8MQ EVK
Add 4K60 dts for iMX8MQ EVK.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Mon, 7 Aug 2017 08:37:00 +0000 (16:37 +0800)]
MLK-16153-01: dts: Fix typo
Fix hdmi video mode typo.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Shengjiu Wang [Tue, 8 Aug 2017 01:46:53 +0000 (09:46 +0800)]
MLK-16157: ARM64: dts: change the video mode for hdmi audio
change the video mode for hdmi audio according hdmi video device
node
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Mon, 7 Aug 2017 09:21:09 +0000 (17:21 +0800)]
MLK-16154: ASoC: fsl_asrc_m2m: fix crash issue with multi-instance
When open 2 instances of m2m, there is kernel dump. The reason is we
use the dev_set_drvdata to set drvdata for each instance, but each
instance share a same device, the result is drvdata will be changed
by other instances, then cause issue. so the dev_set_drvdata can't be
used, need to combine the pair data with file handler.
Fixes:
58ab1eb5b8c5 ("MLK-13945-3: ASoC: fsl_asrc: support two asrc
devices")
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Ranjani Vaidyanathan [Fri, 4 Aug 2017 18:10:31 +0000 (13:10 -0500)]
MLK16147-2 soc:imx Add support to save/restore clock rates
In iMX8QM/iMX8QXP the clock rates set in HW is lost when devices are
powered up/down as part of runtime-pm or suspend/resume.
Add support to the power domain driver to save/restore clock rates
associated with devices as part of power up/down.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Ranjani Vaidyanathan [Fri, 4 Aug 2017 18:08:22 +0000 (13:08 -0500)]
MLK16147-1 clk:imx - Add support to get the clock rate
Add support to get the clock rate of a gate clock. This is required
to save/restore devices clocks when they are powered up/down.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Fancy Fang [Mon, 7 Aug 2017 11:40:14 +0000 (19:40 +0800)]
MLK-16136-17 video: fbdev: dcss: clear global alpha in blanking one channel
The global alpha for one channel should be cleared when
blanding this channel.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Mon, 7 Aug 2017 11:31:49 +0000 (19:31 +0800)]
MLK-16136-16 video: fbdev: dcss: add scaler ratios setting
Add scaler ratios setting logic in scaler configuration.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Mon, 7 Aug 2017 04:18:49 +0000 (12:18 +0800)]
MLK-16136-15 video: fbdev: dcss: enable pan display function
Enable pan display function for dcss framebuffer driver.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Mon, 7 Aug 2017 05:53:50 +0000 (13:53 +0800)]
MLK-16136-14 video: fbdev: dcss: refine ctxld interrupts unmask logic
The ctxld interrupts are better to be unmasked during
interrupts initialization in probe stage with only once.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Sat, 5 Aug 2017 11:34:27 +0000 (19:34 +0800)]
MLK-16136-13 video: fbdev: dcss: add 'NV12' support for Video layer
Add 'NV12' format support for Video layer.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Sat, 5 Aug 2017 10:36:19 +0000 (18:36 +0800)]
MLK-16136-12 video: fbdev: dcss: refine scaler coefficients configuration
Use a better scaler coefficients array which can support
both RGB and YUV pixels correctly. And also refine the
coefficients setting code to make it more clear and more
compact.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 4 Aug 2017 07:20:17 +0000 (15:20 +0800)]
MLK-16136-11 ARM64: dts: imx8mq-evk: set default HDMI display mode to 1080p@60
Set the default HDMI display mode to '1080p@60Hz' instead of 4K,
since '1080p' is a more popular mode which can be supported by
almost every monitor or TV.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 4 Aug 2017 07:05:16 +0000 (15:05 +0800)]
MLK-16136-10 ARM64: dts: imx8mq-evk: enable HDMI display by default
The default display path on imx8mq-evk board is
'DCSS --> HDMI'. So enable the HDMI controller
by default.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 4 Aug 2017 10:33:44 +0000 (18:33 +0800)]
MLK-16136-9 irqchip: imx-irqsteer: adjust irq config via 'endian'.
Change the irq configurations with adding endianness
determination for different platforms which may choose
different kinds of endianess.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 4 Aug 2017 10:31:36 +0000 (18:31 +0800)]
MLK-16136-8 ARM64: dts: imx8mq: add 'endian' property for irqsteer
The relationship between an interrupt and its
register and bit offset has two possible cases:
.Littel Endian (LSB)
.Big Endian (MSB)
So add 'endian' property to help irqsteer kernel
driver to configure interrupts correctly.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 4 Aug 2017 06:32:46 +0000 (14:32 +0800)]
MLK-16136-7 irqchip: imx-irqsteer: correct registers macro defitions
Correct several macro definitions related with irqsteer
to avoid incorrect expression calculation due to operators
priority.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 4 Aug 2017 05:51:26 +0000 (13:51 +0800)]
MLK-16136-6 video: fbdev: DCSS: enable DCSS driver.
This is the initial DCSS driver code which supports:
1. Two DCSS channels: HDR10 Graphic and HDR10 Video.
2. Context Loader to surppot on-the-fly module config.
3. Support ARGB8888 format for input and output.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 4 Aug 2017 06:05:06 +0000 (14:05 +0800)]
MLK-16136-5 ARM64: dts: imx8mq-evk: enable DCSS by default.
The default display path on imx8mq-evk should be
DCSS --> HDMI. So enable DCSS by default on imx8mq-evk
board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 4 Aug 2017 05:59:26 +0000 (13:59 +0800)]
MLK-16136-4 ARM64: dts: imx8mq-evk: disable LCDIF by default.
Disable LCDIF by default and DCSS will be the default
display controller on imx8mq-evk board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 4 Jul 2017 08:01:15 +0000 (16:01 +0800)]
MLK-16136-3 ARM64: dts: imx8mq: add DCSS device node.
Add DCSS device node on imx8mq platform.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 4 Jul 2017 07:53:36 +0000 (15:53 +0800)]
MLK-16136-2 ARM64: dts: imx8mq: add irqsteer node.
The DCSS interrupts go to GIC via irqsteer module.
So add this device node on imx8mq board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Thu, 13 Jul 2017 02:20:15 +0000 (10:20 +0800)]
MLK-16136-1 clk: imx: imx8mq: define DCSS root clocks.
Define three root clocks for DCSS module:
.IMX8MQ_CLK_DISP_AXI_ROOT
.IMX8MQ_CLK_DISP_APB_ROOT
.IMX8MQ_CLK_DISP_RTRM_ROOT
These root clocks share one clock gate along with
'IMX8MQ_CLK_DISP_ROOT' clock. So change its type
to be shared gate clock too.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fugang Duan [Thu, 3 Aug 2017 09:06:12 +0000 (17:06 +0800)]
MLK-16134 ARM: dts: imx6ull: update imx6ull header file with the latest imx6ull RDP
Update imx6ull header file with the latest imx6ull RDP.
- add new pin function definitions.
- update pin function changes.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Sandor Yu [Mon, 7 Aug 2017 10:40:26 +0000 (18:40 +0800)]
MLK-16143: camera: Fix video flashing issue
Update ov10635 configurated data to fix video flashing issue.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>