Anson Huang [Mon, 25 Jan 2016 14:16:48 +0000 (22:16 +0800)]
MLK-12262-1 ARM: imx: enable ddr auto self-refresh for i.MX7D
Enable DDR auto self-refresh for i.MX7D, when doing DDR
frequency scale or suspend/resume, DDR self-refresh will
be disabled, this is incorrect for saving power, enable it
for all these scenarios.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Bai Ping [Wed, 27 Jan 2016 07:43:39 +0000 (15:43 +0800)]
MLK-12328 cpufreq: imx: put the cpufreq policy after used
The cpufreq_cpu_get() and cpufreq_cpu_put() should be called in
pairs. Otherwise, system will dump when enabling lock debug config.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Robin Gong [Thu, 14 Jan 2016 03:40:40 +0000 (11:40 +0800)]
MLK-12256: firmware: imx: sdma: fix bugs in uart script code
Fix two below bugs in script:
-- check error flag in FIFO data, thus dma will stop once the error happen
when real HW error triggered by switch boundrate, overun,etc. Actrually,
no need to check in script since UART driver will handle this.
-- clear other status bit in USR1.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Anson Huang [Fri, 6 Nov 2015 14:31:25 +0000 (22:31 +0800)]
MLK-11830 ARM: dts: add tcm address info for imx7d 12x12 lpddr3 board
When M4 is enabled, Linux has to do save/restore for M4 TCM during
suspend/resume, dtb should pass the TCM address for kernel, without
this TCM info, kernel will boot up fail:
------------[ cut here ]------------
WARNING: CPU: 0 PID: 1 at arch/arm/mach-imx/pm-imx7.c:1030 imx7d_pm_init+0x58/0)
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted
3.14.52-02791-g1babdb1-dirty #2093
[<
80014b40>] (unwind_backtrace) from [<
80011798>] (show_stack+0x10/0x14)
[<
80011798>] (show_stack) from [<
807199ec>] (dump_stack+0x7c/0xbc)
[<
807199ec>] (dump_stack) from [<
80032d78>] (warn_slowpath_common+0x6c/0x88)
[<
80032d78>] (warn_slowpath_common) from [<
80032e30>] (warn_slowpath_null+0x1c/)
[<
80032e30>] (warn_slowpath_null) from [<
80a09760>] (imx7d_pm_init+0x58/0x67c)
[<
80a09760>] (imx7d_pm_init) from [<
80a08d3c>] (imx7d_init_machine+0x3c/0xe4)
[<
80a08d3c>] (imx7d_init_machine) from [<
809e52e4>] (customize_machine+0x20/0x4)
[<
809e52e4>] (customize_machine) from [<
800089bc>] (do_one_initcall+0xf8/0x144)
[<
800089bc>] (do_one_initcall) from [<
809e2c4c>] (kernel_init_freeable+0x138/0x)
[<
809e2c4c>] (kernel_init_freeable) from [<
807159b8>] (kernel_init+0x8/0xf0)
[<
807159b8>] (kernel_init) from [<
8000e580>] (ret_from_fork+0x14/0x34)
---[ end trace
fdb0885876d7ac0b ]---
Unable to handle kernel NULL pointer dereference at virtual address
00000000
pgd =
80004000
[
00000000] *pgd=
00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W
3.14.52-02791-g1babdb1-dir3
task:
a8084000 ti:
a8090000 task.ti:
a8090000
PC is at memcpy+0x48/0x330
LR is at imx7d_pm_init+0xd0/0x67c
pc : [<
8028e768>] lr : [<
80a097d8>] psr:
20000013
sp :
a8091e8c ip :
00000000 fp :
00000000
r10:
a8090030 r9 :
0000010b r8 :
809e52c4
r7 :
80ab9380 r6 :
80ab9380 r5 :
80abb5a4 r4 :
80a411cc
r3 :
00080000 r2 :
00007f80 r1 :
00000000 r0 :
a8140000
Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
Control:
10c53c7d Table:
8000406a DAC:
00000015
Process swapper/0 (pid: 1, stack limit = 0xa8090238)
Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
(cherry picked from commit
c3dc7c16660200f3de8cbbdd1f215ae6a779a039)
Russell King [Sun, 18 Oct 2015 16:51:25 +0000 (17:51 +0100)]
MLK-12312: CAAM hash algorithms fail registration during initialization
Fix cherry-picked from
5ec908319ab53072d3a2188e62ed2e5d7b846951
crypto: caam - only export the state we really need to export
Avoid exporting lots of state by only exporting what we really require,
which is the buffer containing the set of pending bytes to be hashed,
number of pending bytes, the context buffer, and the function pointer
state. This reduces down the exported state size to 216 bytes from
576 bytes.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Han Xu [Thu, 21 Jan 2016 15:01:15 +0000 (09:01 -0600)]
MLK-12309: mtd: gpmi: workaround for kernel 4.1 NAND boot
new implementation of GPMI NAND raw access functions was added in kernel
4.1 which changes the way from writing data in mirror mode to writing
data with BCH layout mode.
New implementation can help third party tools to analysis the data since
all data were written in same layout, with or without ECC, but this
implementation doesn't work for NAND boot. Kobs-ng, the tool for NAND
boot will create the boot configuration data for each specific platform
and need to write the data to NAND in mirror mode. In this workaround,
we will keep using the previous raw NAND access function to fix the
issue.
Signed-off-by: Han Xu <han.xu@nxp.com>
Li Jun [Wed, 20 Jan 2016 02:56:59 +0000 (10:56 +0800)]
MLK-11896-8 usb: phy: mxs: declar variable with initialized value
Fix coverity CID 17601 uninitialized scalar variable: vbus_value.
Signed-off-by: Li Jun <jun.li@nxp.com>
Sébastien Szymanski [Wed, 20 May 2015 14:30:37 +0000 (16:30 +0200)]
ARM: clk-imx6q: refine sata's parent
According to IMX6D/Q RM, table 18-3, sata clock's parent is ahb, not ipg.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
(cherry picked from commit
da946aeaeadcd24ff0cda9984c6fb8ed2bfd462a)
Dan Douglass [Wed, 20 Jan 2016 20:34:17 +0000 (14:34 -0600)]
MLK-12305 Enable CAAM in kernel version 4.1 imx_v7_defconfig
Enabled CAAM in imx_v7_defconfig.
Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
Dan Douglass [Wed, 20 Jan 2016 20:10:29 +0000 (14:10 -0600)]
MLK-12303 Add CAAM support to the imx6QDL device tree for kernel v4.1
The CAAM nodes have been added in imx6qdl.dtsi.
Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
Dan Douglass [Wed, 20 Jan 2016 19:31:56 +0000 (13:31 -0600)]
MLK-12302 caam: Secure Memory platform device creation crashes
There is new flag that is checked in of_platform_device_create().
The flag is cleared prior to the call now so the device creates
successfully.
Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
Fugang Duan [Fri, 14 Aug 2015 06:46:23 +0000 (14:46 +0800)]
MLK-11360-01 crypto: caam_snvs: add snvs clock management
caam_snvs driver involves snvs HP registers access that needs to
enable snvs clock source. The patch add the clock management.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Ulises Cardenas [Fri, 12 Jun 2015 10:54:36 +0000 (05:54 -0500)]
MLK-11103 Missing register in Secure memory configuration v1
Added missing reserved register for caam_secure_mem_v1 struct
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Adrian Alonso [Tue, 2 Jun 2015 20:08:52 +0000 (15:08 -0500)]
MLK-11020: arm: imx: caam: imx7d caam_aclk clock dependency
* Add caam_aclk clock root dependency, imx7d caam
ip module needs caam_aclk and caam_ipg clock signals
to operate add additional clock signal.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
[Octavian: since the clk API skips NULL args use a single disable label]
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Dan Douglass [Tue, 26 May 2015 20:53:10 +0000 (15:53 -0500)]
MLK-10978-1 ARM: imx6ul: Add CAAM support for i.mx6ul
There are only 3 CAAM clocks that are required for i.mx6ul. Adding
logic to enable only the required clocks based on the device tree
compatibility node.
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Dan Douglass [Thu, 14 May 2015 21:28:52 +0000 (16:28 -0500)]
MLK-10897-1 ARM: imx7d: Add CAAM support for i.mx7d
CAAM only has a single clock in i.mx7d. Logic was added to initialize only the
single clock.
The Secure Memory registers moved in CAAM era included in i.mx7d. This required
changes to support access to two different versions of the register map. The
registers are access through a data structure that overlay the register region.
Two new Secure Memory register structures were created to support the different
versions. Logic was also added to determine which version is implemented based on
the CAAM era, and access functions were added to support register access to the
Secure Memory Command and Status registers.
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Victoria Milhoan [Wed, 14 Jan 2015 18:43:12 +0000 (11:43 -0700)]
MLK-9769-23 Replace SECVIO of_irq_to_resource() with irq_of_parse_and_map()
Replace of_irq_to_resource() in the SECVIO module with the simpler
equivalent irq_of_parse_and_map(). Also, add error checking to
to the SECVIO and Job Ring modules. Based on upstream commit
f7578496a671a96e501f16a5104893275e32c33a.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Victoria Milhoan [Thu, 18 Dec 2014 21:06:50 +0000 (14:06 -0700)]
MLK-10036 Freescale CAAM: Add support for DSM with Mega/Fast mix on
This patch allows CAAM to be enabled as a wakeup source for the
Mega/Fast mix domain. If CAAM is enabled as a wakeup source, it
will continue to be powered on across Deep Sleep Mode (DSM). This
allows CAAM to be functional after the system resumes from DSM.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit
290744e3b40a563319324e234fa5a65b49fd4d82)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Winston Hudson (b45308) [Thu, 27 Jun 2013 20:22:39 +0000 (13:22 -0700)]
MLK-9971 Add XCBC-AES support for CAAM in i.MX6 family
Add XCBC-AES support to the CAAM crypto accelerator core in
the i.MX6 family of SoC devices.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
Signed-off-by: Winston Hudson (b45308) <winston.h.hudson@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Victoria Milhoan [Thu, 20 Nov 2014 18:28:28 +0000 (11:28 -0700)]
MLK-9951 Update CAAM driver era interface
Add more CAAM era values to the CAAM driver's caam_get_era()
function. Read only 32 bits of data since the data required
to identify the IP_ID and MAJ_REV is located in the first 32
bits of the register. And, update the function for use with
ARM/Little Endian devices.
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14]
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit
6050d7faf2d0c063195aa9454c130548a9f8058f)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Victoria Milhoan [Mon, 3 Nov 2014 22:28:10 +0000 (15:28 -0700)]
MLK-9710-5 Unregister Secure Memory platform device upon shutdown
Unregister Secure Memory platform device when the Secure Memory
module is shut down. This allows the Secure Memory module to
be inserted again successfully.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit
785456f38234e64618ee9c74ab4258f39f00e73c)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Victoria Milhoan (b42089) [Tue, 26 Mar 2013 21:11:32 +0000 (14:11 -0700)]
MLK-9769-20 Limit AXI pipeline to a depth of one in CAAM for i.MX6 devices
i.MX6 devices have an issue wherein AXI bus transactions may not occur
in the correct order. This isn't a problem running single descriptors,
but can be if running multiple concurrent descriptors. Reworking the CAAM
driver to throttle to single requests is impractical, so this patch limits
the AXI pipeline to a depth of one (from a default of four) to preclude
this situation from occurring.
Signed-off-by: Victoria Milhoan (b42089) <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Winston Hudson [Mon, 17 Nov 2014 17:17:35 +0000 (10:17 -0700)]
MLK-9769-19 Add ARC4-ECB support for CAAM in i.MX6 family
Adds ARC4-ECB Mode support to the CAAM crypto accelerator core in
the i.MX6 family of SoC devices.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
Signed-off-by: Winston Hudson (b45308) <winston.h.hudson@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Winston Hudson (b45308) [Thu, 27 Jun 2013 04:08:30 +0000 (21:08 -0700)]
MLK-9769-18 Add 3DES-ECB-EDE support for CAAM in i.MX6 family
Adds 3DES-ECB-EDE Mode support to the CAAM crypto accelerator core in
the i.MX6 family of SoC devices.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
Signed-off-by: Winston Hudson (b45308) <winston.h.hudson@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Winston Hudson (b45308) [Thu, 27 Jun 2013 03:49:36 +0000 (20:49 -0700)]
MLK-9769-17 Add AES-ECB support for CAAM in i.MX6 family
Adds AES-ECB (Electronic Codebook) support to the CAAM crypto accelerator core in
the i.MX6 family of SoC devices.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
Signed-off-by: Winston Hudson (b45308) <winston.h.hudson@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Winston Hudson [Mon, 17 Nov 2014 16:27:30 +0000 (09:27 -0700)]
MLK-9769-16 Add DES-ECB support for CAAM in i.MX6 family
Adds DES-ECB Mode support to the CAAM crypto accelerator core in
the i.MX6 family of SoC devices.
Note that CAAM also goes by sec-4.0 or sec-5.0 in other product families (such as QorIQ).
Thus the property names are often tied to the sec-4.0+ nomenclature.
Signed-off-by: Winston Hudson (b45308) <winston.h.hudson@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Victoria Milhoan (b42089) [Fri, 29 Mar 2013 07:13:14 +0000 (00:13 -0700)]
MLK-9769-14 Add CRYPTO_ALG_KERN_DRIVER_ONLY flag to Freescale CAAM driver
The CRYPTO_ALG_KERN_DRIVER_ONLY flag is used to indicate that
the crypto algorithm is only available via a kernel driver.
This patch adds the flag only when the flag is available in the
kernel. Utilizing the flag based on it's availability in the
kernel allows the driver to compile on older kernel versions.
The original community patch is located at
http://permalink.gmane.org/gmane.linux.kernel.cryptoapi/6547
for reference.
Signed-off-by: Victoria Milhoan (b42089) <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Victoria Milhoan [Fri, 7 Nov 2014 17:48:32 +0000 (10:48 -0700)]
MLK-9937 Use job ring 0 for secure memory access
By default, job ring 0 is the owner of the Secure Memory area
within CAAM. This patch modifies the Secure Memory module to
use job ring 0 for all accesses.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit
bb447bfb241d34492365bf881257b1a742a29c02)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Steve Cornelius [Fri, 2 Aug 2013 21:19:27 +0000 (14:19 -0700)]
MLK-9710-15 Correct size of padded key buffers
Correct size of padded key buffers for the Secure Memory test module.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
(cherry picked from commit
da77cf5583c064deefd09a5e91851ab4398701a0)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Steve Cornelius [Fri, 2 Aug 2013 03:08:19 +0000 (20:08 -0700)]
MLK-9710-14 Un-pad cache sizes for blob export/import
Blob exportation and importation functions were adding padding to
the buffer mapping and cache control functions, which resulted in
incorrect CPU-level views into a DMA-ed blob.
Also, corrected descriptor constructors to use symbolic form of
blob overhead calculation.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
(cherry picked from commit
c5f2cbb1fa51b0142742de77fe0a37c290bd04a0)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Steve Cornelius [Fri, 2 Aug 2013 03:06:05 +0000 (20:06 -0700)]
MLK-9710-13 Correct size in BLOB_OVERHEAD definition
Increase the size of BLOB_OVERHEAD.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
(cherry picked from commit
32aced88dedf1c1c11170d125d3cc546ffefb366)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Steve Cornelius [Wed, 24 Jul 2013 03:56:08 +0000 (20:56 -0700)]
MLK-9710-12 Adapt sm_test as a black-key handling example
Converted sm_test to an example that can show:
- key covering
- secret encapsulation as external memory blob
- secret decapsulation from external memory blob
- checks and displays of the handling of key content
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
(cherry picked from commit
45818b72fc4b3fe3fff755b1f9a27cd5519ca2cf)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Steve Cornelius [Wed, 24 Jul 2013 03:49:29 +0000 (20:49 -0700)]
MLK-9710-11 Add internal key cover and external blob export/import to prototype SM-API
Extended/amended the prototype SM-API with the following functions:
- Added key covering (blackening) function in-place to a keyslot
- Added export operation to encapsulate data to external memory as a
secure memory blob (including descriptor capable of secure memory or
general memory blob generation)
- Removed in-place blob encapsulation
- Added import operation to decapsulate a blob from external memory into
secure memory (including descriptor capable of general memory or secure
memory content decapsulation)
- Removed in-place blob decapsulation
[<vicki.milhoan@freescale.com>: Edited to apply to 3.10]
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit
c577769ed0347bb4e3428b5696fb7f209af0a7ad)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Steve Cornelius [Thu, 25 Sep 2014 23:34:11 +0000 (16:34 -0700)]
MLK-9710-18 snvs - make SECVIO module device tree correct
Converted the prototype 3.0.x SNVS Security Violation Handler
subsystem to be device tree correct/compliant under 3.10 for ARM
platforms. Also, separated out SNVS property detection so as to make
it independent of CAAM, and corrected function namespace accordingly.
Later releases of this subsystem are likely to be separate from the
kernel's CAAM driver space.
[<vicki.milhoan@freescale.com>: Edited to apply to latest 3.10 kernel]
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit
c8c128086eae012ced0c96d66f21f36bcbd14f66)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Dan Douglass [Wed, 27 Nov 2013 09:40:44 +0000 (03:40 -0600)]
ENGR00289885 [iMX6Q] Add Secure Memory and SECVIO support.
1. Pull in secure memory support from 3.0.35 kernel.
2. Pull in SECVIO support from 3.0.35 kernel.
3. Make changes to support device tree.
4. Add device tree setting for SECVIO sources.
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14]
Signed-off-by: Dan Douglass <b41520@freescale.com>
(cherry picked from commit
f3bfd42e2db3af8326734bebf750e94e74734f6e)
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Steve Cornelius [Fri, 19 Oct 2012 21:37:12 +0000 (14:37 -0700)]
MLK-9769-10 Add Blob command bitdefs.
Add bit definitions for Blob protocol protinfo field.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Steve Cornelius [Fri, 19 Oct 2012 21:43:41 +0000 (14:43 -0700)]
MLK-9769-11 Add SM register defs, and expanded driver-private storage.
These add changes to the driver private areas for the CAAM
controller and CAAM Secure Memory subsystems, and expand register
definitions to include the Secure Memory subsystems as reflected
in multiple areas (controller, rings, secure memory itself).
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14]
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Steve Cornelius [Wed, 24 Jul 2013 03:47:32 +0000 (20:47 -0700)]
MLK-9710-10 Add CCM defs for FIFO_STORE instruction
Added definitions to enable FIFO_STORE to encode options for storing
keys in AES-CCM mode
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14]
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
(cherry picked from commit
a3cd8e5fad274f33fc6f0030413f89a6339b1d5a)
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Victoria Milhoan [Wed, 12 Nov 2014 16:58:24 +0000 (09:58 -0700)]
MLK-9769-9 Adjust RNG timing to support more devices
Adjust RNG timing parameters to support more i.MX6 devices.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Victoria Milhoan (b42089) [Fri, 17 Oct 2014 23:30:56 +0000 (16:30 -0700)]
MLK-9769-8 Add a test for the Freescale CAAM Random Number Generator
Freescale's CAAM includes a Random Number Generator. This change adds
a kernel configuration option to test the RNG's capabilities via the
hw_random framework.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Victoria Milhoan [Wed, 29 Oct 2014 18:23:05 +0000 (11:23 -0700)]
MLK-9769-1 caam: remove incorrect comment from job ring module
The caam_jr_register() function is no longer part of the CAAM
driver. This patch removes a comment referencing the function.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Cristian Stoica [Mon, 7 Jul 2014 08:52:41 +0000 (11:52 +0300)]
crypto: caam - fix memleak in caam_jr module
commit
0378c9a855bfa395f595fbfb049707093e270f69 upstream.
This patch fixes a memory leak that appears when caam_jr module is unloaded.
Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Conflicts:
drivers/crypto/caam/jr.c
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Horia Geanta [Fri, 18 Apr 2014 10:01:42 +0000 (13:01 +0300)]
crypto: caam - add allocation failure handling in SPRINTFCAT macro
commit
27c5fb7a84242b66bf1e0b2fe6bf40d19bcc5c04 upstream.
GFP_ATOMIC memory allocation could fail.
In this case, avoid NULL pointer dereference and notify user.
Cc: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Horia Geanta <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Conflicts:
drivers/crypto/caam/error.c
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Anson Huang [Tue, 15 Dec 2015 09:59:11 +0000 (17:59 +0800)]
MLK-12014 ARM: imx: enable necessary clock for RDC recovery from DSM
1. Per design requirement, EXSC for PCIe will need clock to recover RDC
setting on resume when M/F mix is off, so we need to enable PCIe
LPCG before entering DSM.
2. As M4 clock is disabled in low power mode, after exit from DSM, A7
needs to restore TCM for M4, but without M4 clock, this operation
never success, so we enable A7 wakeup sources for M4 as well during
DSM, after exit DSM, M4's original wakeup sources will be restored.
Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
(cherry picked from commit
847db79957d25545c762670eb1bc003f34cb2592)
Signed-off-by: Teo Hall <teo.hall@nxp.com>
Anson Huang [Wed, 16 Dec 2015 13:54:50 +0000 (21:54 +0800)]
MLK-12025 ARM: imx: M4 should be in RUN mode when resume from DSM
On i.MX7D, only when M4 enters STOP mode, system is able to enter DSM
mode where M4 power will be gated off. This is done by checking
a variable which records M4's power mode. However, when system
resume from DSM, M4 is re-enabled to RUN mode by A7, but the variable
is NOT updated accordingly, so next time system suspend, even
M4 is NOT in STOP mode, system can enter DSM mode, which is
unexpected and would cause bus-freq use count mismatch.
Fix this issue by reset M4 power mode to RUN mode when resume
from DSM.
Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
(cherry picked from commit
d22127a8f395edaf719a5bf4874cf22c5bdc8661)
Signed-off-by: Teo Hall <teo.hall@nxp.com>
Anson Huang [Mon, 11 Jan 2016 16:14:53 +0000 (00:14 +0800)]
MLK-12182 ARM: imx: add M4 ddr image DSM support on i.MX7D
For DSM mode, M4 TCM context is lost and A7 will restore them
after resume and write TCM entry to M4 and re-kick it. It
assumes M4 is running on TCM, but M4 also has case of running
image on DDR, OCRAMS first 2 words stores the stack and pc
address for M4, to support M4 running on both TCM and DDR
case, we can just leave the OCRAMS first 3 words unchanged
during DSM, the third words is also reserved for M4, as OCRAMS
can keep its context during DSM.
This patch leaves OCRAMS first 3 words unchanged and remove
the re-program of TCM entry after exit from DSM, thus it can
support DSM mode for M4 running on TCM/DDR/OCRAM.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit
b8c47389d16dacf3a78c0f92e6737d09811c45a9)
Signed-off-by: Teo Hall <teo.hall@nxp.com>
Teo Hall [Fri, 30 Oct 2015 15:09:36 +0000 (10:09 -0500)]
MLK-11262-5: ARM: imx: add M4 rekick after DSM
Save M4 tcm in ddr. Copy memory after exit from DSM.
Also hold M4 in reset when entering DSM.
Signed-off-by: Teo Hall <teo.hall@freescale.com>
(cherry picked from commit
011ed0ab784eb566b68ebacea57ae3a6857b48ff)
Teo Hall [Thu, 7 Jan 2016 21:54:47 +0000 (15:54 -0600)]
MLK-11262-4: ARM: imx: add m4_tcm to dtsi
add tcm to dtsi for saving FreeRTOS image
Signed-off-by: Teo Hall <teo.hall@freescale.com>
Teo Hall [Fri, 30 Oct 2015 14:53:52 +0000 (09:53 -0500)]
MLK-11262-3: ARM: imx: Change GPC settings for Multicore LPM
change the slots to persistent to be congruent with
M4 image. Also change so that slots do read/modify/write
so that M4 settings are not overwritten.
Signed-off-by: Teo Hall <teo.hall@freescale.com>
(cherry picked from commit
eae33480b615c1586248a761ef3c6bcd9e0c59af)
Conflicts:
arch/arm/mach-imx/gpcv2.c
Teo Hall [Fri, 30 Oct 2015 14:00:36 +0000 (09:00 -0500)]
MLK-11262-2: ARM: imx: Add MU messages for LPM messages
add LPM messages for:
-M4 reporting state
-M4 Request/Release High Bus Freq
-A7 tell M4 it is ready
Signed-off-by: Teo Hall <teo.hall@freescale.com>
(cherry picked from commit
52234ae38e6e4f2b3452d807dd1c1e199be6350c)
Conflicts:
arch/arm/mach-imx/common.h
arch/arm/mach-imx/mu.c
Teo Hall [Fri, 30 Oct 2015 13:57:09 +0000 (08:57 -0500)]
MLK-11262-1: ARM: imx: add busfreq offset for M4
offset high_bus_count+1 when m4 is enabled
Signed-off-by: Teo Hall <teo.hall@freescale.com>
(cherry picked from commit
58983b6522c324affdbbeaa5b7b192a673c615a7)
Dong Aisheng [Wed, 20 Jan 2016 12:21:36 +0000 (20:21 +0800)]
MLK-12254 bcmdhd: fix warning when connect adhoc network
When connect adhoc network, we got below warning, it's caused
by network stack changes during kernel upgrade.
root@imx6qdlsolo:/mnt/nfs/vte_mx63# iw wlan0 ibss join TestAdhoc1 2412
------------[ cut here ]------------
WARNING: CPU: 1 PID: 1251 at /home/bamboo/build/4.1.X-1.0.0_ga/fsl-imx-fb/temp_build_dir/build_fsl-imx-fb/tmp/work-shared/imx6qdlsolo/kernel-source/net/wireless/ibss.c:67 wl_notify_connect_status+0x7b0/0x10f0 [bcmdhd]()
root@imx6qdlsolo:/mnt/nfs/vte_mx6Modules linked in:3# bcmdhd ov5642_camera ov5640_camera_mipi_int ov5640_camera_int mxc_dcic galcore(O) mxc_v4l2_capture ipu_bg_overlay_sdc ipu_still v4l2_int_device ipu_prp_enc ipu_csi_enc ipu_fg_overlay_sdc evbug
CPU: 1 PID: 1251 Comm: wl_event_handle Tainted: G O 4.1.8-1.0.0+g87e6c2f #1
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[<
80015d84>] (unwind_backtrace) from [<
80012728>] (show_stack+0x10/0x14)
[<
80012728>] (show_stack) from [<
80750a54>] (dump_stack+0x84/0xc4)
[<
80750a54>] (dump_stack) from [<
80032f3c>] (warn_slowpath_common+0x80/0xb0)
[<
80032f3c>] (warn_slowpath_common) from [<
80033008>] (warn_slowpath_null+0x1c/0x24)
[<
80033008>] (warn_slowpath_null) from [<
7f100060>] (wl_notify_connect_status+0x7b0/0x10f0 [bcmdhd])
[<
7f100060>] (wl_notify_connect_status [bcmdhd]) from [<
7f0f05bc>] (wl_event_handler+0x198/0x26c [bcmdhd])
[<
7f0f05bc>] (wl_event_handler [bcmdhd]) from [<
8004b588>] (kthread+0xdc/0xf4)
[<
8004b588>] (kthread) from [<
8000f528>] (ret_from_fork+0x14/0x2c)
---[ end trace
40b45ccda84900ce ]---
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Richard Zhu [Wed, 20 Jan 2016 07:10:09 +0000 (15:10 +0800)]
MLK-12280 firmware loader: iwl wifi card can't find its fw
Without FW_LOADER_USER_HELPER enable, iwl wifi cards can't
load their firmware in imx_4.1.y, enable it.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Zidan Wang [Wed, 20 Jan 2016 01:50:40 +0000 (09:50 +0800)]
MLK-12244 ASoC: fsl: Set the sound card owner field
When load sound card, the pulseaudio will using the sound card to
playback and record. It may be cause a kernel crash when the sound
card is unloaded while the playback/record is active
After setting the sound card owner field, when pulseaudio is running,
the sound card module ref-count will not be 0 and the sound card will
not be unloaded. So you should stop the pulseaudio when you want to
unload the sound card.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Xianzhong [Tue, 19 Jan 2016 08:18:21 +0000 (16:18 +0800)]
MGS-1560 [#2172] fix gpu kernel crash with invalid pointer
it is necessary to check the node object pointer before use,
otherwise the board will reboot with kernel crash.
Date: Jan 19, 2016
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Fugang Duan [Fri, 15 Jan 2016 09:35:23 +0000 (17:35 +0800)]
MLK-12271 Input: atkbd: add return value check after calling .dmi_check_system()
Add return value check after calling .dmi_check_system().
Reported by Coverity: CID18431
Signed-off-by: Fugang Duan <B38611@freescale.com>
Gao Pan [Tue, 19 Jan 2016 07:53:39 +0000 (15:53 +0800)]
MLK-12282 ARM: dts: imx6sx-sabreauto: add mlb support
Add mlb support for imx6sx-sabreauto platform.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Dong Aisheng [Tue, 19 Jan 2016 03:30:03 +0000 (11:30 +0800)]
MLK-12170-3 dts: imx7d: move uSDHC fsl,tuning-step property into SoC.dtsi
Moving fsl,tuning-step property into SoC.dtsi due to it's mainly SoC
dependant. User could also overwrite it in board.dts for special board
requirment.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong Aisheng [Mon, 18 Jan 2016 13:52:14 +0000 (21:52 +0800)]
MLK-12170-2 dts: imx7d: add tuning-start-tap for usdhc
MX7D uSDHC has a bit long delay line in SoC internally, pre-set a safe
tuning start point to skip first 20 meaningless cells tuning.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Dong Aisheng [Thu, 28 Aug 2014 09:01:34 +0000 (17:01 +0800)]
MLK-12284-2 doc: syscon: add clocks as optional property
User can specify clocks in devicetree which is used for accessing the registers
in this regmap.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit
4a89ef5b579e6fb5640df099ee13939ca6d3a325)
Dong Aisheng [Wed, 27 Aug 2014 07:55:59 +0000 (15:55 +0800)]
MLK-12284-1 regmap: regmap-mmio: make clk_id optionally when getting clock
According to clock framework, the clk_id could be NULL when getting clock.
But current code relies on a non null clk_id to get clock.
Changing the code to allow a null clk_id to get clock to make it more
reasonable to use.
And the regmap_mmio_gen_context will try to get clock by default but ignore
error if not finding the clock in case some regmap access not reply on
a specific clock.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit
a60a38a5285ab27814f261ed39653c55a0a6e24b)
Dong Aisheng [Tue, 18 Nov 2014 08:03:55 +0000 (16:03 +0800)]
MLK-9501 dts: imx6sx-sdb: optimize usdhc3 pad settings
Detailed reproduce steps:
1. boot-up to Linux command prompt .
2. Plug SD3.0 UHS-I SD Card into SD3 Connector (make sure SD Card running
at SD3.0 DDR50/1.8V).
2. write data to SD3 using "dd" command (SD3_CLK running at 1.8V/50MHz).
3. capture the SD3_CLK, SD3_DATA, SD3_CMD waveforms during data write using
FET probe (>=1GHz)
4. CLK waveforms like triangular wave are observed.
HW team found that the pad setting of the SD3_CLK, SD3_DATA, SD3_CMD signal pins are
not optimized. In existing BSP, when running at SD3.0/DDR50/1.8V, SPEED/DSE/SRE
= 01/011/1 is used. They propose change it to -
SD3_CLK: SPEED/DSE/SRE = 01/110/1.
SD3_DATA/SD3_CMD: SPEED/DSE/SRE = 01/101/1.
SDHC high speed cards also had such issue(refer to MLK-9500).
We only changed the default state (<50Mhz) pad setting, for ultra high speed
state like 100Mhz and 200Mhz, it does not have such issue since they already
set to the maximum Drive Strength value.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit
69d4195c741050e0bc78d3005f8ff4f51990d1ae)
Conflicts:
arch/arm/boot/dts/imx6sx-sdb.dts
Dong Aisheng [Tue, 11 Nov 2014 13:18:12 +0000 (21:18 +0800)]
MLK-9833-2 dts: imx6sx: do not touch CAN gpios pads if M4 is enabled
CAN devices are allocated to run on M4.
So do not touch CAN pads setting if M4 is enabled.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit
9d2605e51b9ba83382c5da3a838656c9910d75a1)
Dong Aisheng [Tue, 11 Nov 2014 13:04:07 +0000 (21:04 +0800)]
MLK-9833-1 ARM: imx6sx: only set can clock parent when M4 disabled
Since CAN device is allocated to run on M4 and handled by M4 if M4 is enabled,
so we do not set CAN parent clock when M4 is enabled.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit
171a16fa6d62162e9c8cab38b9459e772c980d22)
Li Jun [Fri, 15 Jan 2016 09:17:56 +0000 (17:17 +0800)]
MLK-12173 regulator: pfuze100: add .is_enable() for pfuze100_swb_regulator_ops
If is_enabled() is not defined in its ops, regulator core will assume
this regulator is already enabled, then we never can really enable it
after disabled.
Signed-off-by: Li Jun <jun.li@nxp.com>
Li Jun [Thu, 14 Jan 2016 06:20:57 +0000 (14:20 +0800)]
MLK-12268 usb: gadget: fsl_utp: change FSL_UTP Kconfig location
Move FSL_UTP to be under USB_MASS_STORAGE since it depends on it.
Signed-off-by: Li Jun <jun.li@nxp.com>
Shengjiu Wang [Mon, 18 Jan 2016 09:54:57 +0000 (17:54 +0800)]
MLK-12165: ASoC: fsl: imx-cs42888: remove 32k and 64k support
Revert "MLK-11623 ASoC: imx-cs42888: add 32k and 64k sample rate support"
This reverts commit
314a01f40599134086480ef3c5e89a54aeedbf1f.
In Async mode, record and playback use different samplerate, one is 32k,
another is 48kHz, there will be issue "unsupported sysclk ratio".
example case is
arecord -Dhw:0,1 -f S16_LE -r 32000 -c 2 | aplay -f S16_LE -r 32000 -c 2
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Mon, 18 Jan 2016 05:44:56 +0000 (13:44 +0800)]
MLK-12202: ASoC: fsl_asrc_m2m: fix dma timeout after suspend/resume
In suspend function, the complete will be set to done in callback.
After resuming, the convert will not spend time to wait the complete.
which is a wrong complete.
So in suspend function, the complete need to be reinited for next convert.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Richard Zhu [Fri, 15 Jan 2016 05:46:52 +0000 (13:46 +0800)]
MLK-12265 rpmsg: imx: set the imx rpmsg tests be module
Set the imx rpmsg tests to be module in defaut.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
(cherry picked from commit
20adce35ef6abfd6b0a52207febe069c7f09a1be)
Anson Huang [Wed, 2 Sep 2015 17:05:48 +0000 (01:05 +0800)]
MLK-11492 ARM: imx: keep weak 2p5 on for USB vbus wakeup
Since i.MX6SX, if USB vbus wake up is enabled, weak 2P5
needs to be on even if the DRAM is LPDDR2, previously, we need
to set stop_mode_config to keep 2P5 on, so enter DSM,
if USB vbus wakeup is enabled, we need to keep weak 2P5 on.
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit
1ca4dffee79055ea95c59e27bab50bc5080310f5)
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Bai Ping [Fri, 15 Jan 2016 12:56:38 +0000 (20:56 +0800)]
MLK-12270 ARM: imx: upate the gpc setting using read-modify-update flow
The GPC setting should be modified using the read-modify-update flow.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Peter Chen [Sat, 13 Sep 2014 07:10:04 +0000 (15:10 +0800)]
MLK-12247 usb: chipidea: udc: disconnect host if system enters suspend
It is better we disconnect (pulldown dp) host when the system enters
suspend if the host did not suspend bus beforehand, it can avoid
unnecessary udc suspend irq during usb enters suspend. This unexpected
suspend irq occurs due to the udc still pulls up dp, but the host
suspends bus due to it finds the device has disconnected. The device
turns off high speed terminal will be considered a disconnection event
from the host.
It also fixes the bug ENGR00325724 describes.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit
9d9ddd142cdbfb4bcbaae161a452596668441b1a)
Li Jun [Wed, 13 Jan 2016 03:57:10 +0000 (11:57 +0800)]
MLK-12248-3 ARM: imx6ul-14x14-evk: add tx-d-cal property for usbphy
Set tx-d-cal to be 0x5 to improve usb signal quality.
Signed-off-by: Li Jun <jun.li@nxp.com>
Li Jun [Wed, 13 Jan 2016 03:56:15 +0000 (11:56 +0800)]
MLK-12248-2 ARM: imx6sl-evk: add tx-d-cal property for usbphy
Set tx-d-cal to be 0x5 to improve usb signal quality.
Signed-off-by: Li Jun <jun.li@nxp.com>
Li Jun [Wed, 13 Jan 2016 03:53:31 +0000 (11:53 +0800)]
MLK-12248-1 ARM: imx6qdl-sabresd: add tx-d-cal property for usbphy
Set tx-d-cal to be 0x5 to improve usb signal quality for all imx6qdl
sabresd boards.
Signed-off-by: Li Jun <jun.li@nxp.com>
Peter Chen [Mon, 2 Feb 2015 08:29:00 +0000 (16:29 +0800)]
MLK-10196-1 ARM: imx6: change anatop 3p0 property
- Delete regulator-always-on for 3p0 since it needs to enable/disable
on the fly.
- Add "anatop-enable-bit" property as the offset of enable bit for
3p0, 1p1, and 2p5.
- USB PHY refers "reg_3p0" phandle at its node.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit
c2c2cbc46fda3e8ea798d270a3410f351af9d1ca)
Anson Huang [Fri, 15 Jan 2016 01:33:18 +0000 (09:33 +0800)]
MLK-12263 ARM: imx: disable arm_arch_timer for i.MX7D nosmp
When SMP is deselected, ARM_ARCH_TIMER is still enabled while
broadcast time is disabled, so when system enters WAIT mode,
ARM platform's clock will be disabled, then system tick timer
will stop and cause system stay at WAIT mode and timer event
will NOT come as expected.
To fix this issue, we do runtime check in kernel boot up,
if SMP is NOT enabled, ARM_ARCH_TIMER will be disabled and
using GPT timer always.
we have to put this check in early stage before common
arm_arch_timer driver probed.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang [Tue, 22 Sep 2015 17:10:25 +0000 (01:10 +0800)]
MLK-11630 ARM: imx: register imx_clk_gate3 as fixed_factor when M4 is enabled
As clock root does NOT have domain control on i.MX7D,
and the clock root gate does NOT consume much power,
so it is acceptable to leave clock root always enabled
when M4 is enabled, this is suggested by design team,
otherwise, need to use shared memory to control clk
root between A7 and M4, which is NOT friendly.
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit
bc4295b3aed83e426c49aa48f39224d2102048dd)
Anson Huang [Thu, 14 Jan 2016 11:13:34 +0000 (19:13 +0800)]
MLK-12136-3 ARM: imx: adjust ddr frequency scale flow on i.MX7D TO1.1
i.MX7D TO1.1 updates the DDR script, ddr frequency scale flow
should be updated accordingly.
Add runtime revision check to support both TO1.0 and TO1.1.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang [Wed, 13 Jan 2016 14:36:26 +0000 (22:36 +0800)]
MLK-12136-2 ARM: imx: add ddr phy registers restore for i.MX7D
i.MX7D TO1.1 adds some DDR PHY register settings to fix the CKE
timing issue, when fast MIX off in DSM, need to restore them
to make sure the DDR PHY setting is correct.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang [Wed, 13 Jan 2016 10:59:56 +0000 (18:59 +0800)]
MLK-12136-1 ARM: imx: adjust slot control to meet design requirement on i.MX7D
Design team recommend to put SCU/C0/C1 in same power up slot
to avoid reset timing issue of debug mode, adjust the power
up slot and timing per their requirement.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Fancy Fang [Thu, 14 Jan 2016 01:59:52 +0000 (09:59 +0800)]
MLK-12251 video: mipi_dsi: fix an unsigned compared against zero issue
Compared 'mux' against zero is meaningless. So correct this.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 12 Jan 2016 10:08:09 +0000 (18:08 +0800)]
MLK-12218 video: mxsfb: fix a potential unitialized pointer dereference
The 'rgb' pointer may be dereferenced before being initialized.
So correct this.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 12 Jan 2016 10:03:39 +0000 (18:03 +0800)]
MLK-12217 video: mxsfb: fix an uninitialized variable usage
The 'vmode' variable is used before it is initialized.
So initialize it before that.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 12 Jan 2016 09:34:57 +0000 (17:34 +0800)]
MLK-12216 video: mipi_dsi: fix the potential uninitalized variable usage
The 'val' variable may be used before uninitialized.
So initialize it at the begining.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 12 Jan 2016 09:29:19 +0000 (17:29 +0800)]
MLK-12215 video: mxsfb: free the 'timings' after using it to avoid resource leak
The 'timings' is allocated by 'of_get_display_timings()'
dynamically. So it should be freed when it is not used
anymore.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 13 Jan 2016 07:11:23 +0000 (15:11 +0800)]
MLK-12213 dma: pxp-v2: fix the potential resource leak issue reported by Coverity
There may be potential memory leak when the 'desc' allocation failed.
The previous allocated descriptors should be freed when the allocation
failed.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fugang Duan [Wed, 13 Jan 2016 10:11:41 +0000 (18:11 +0800)]
MLK-12257 ARM: dts: imx6qdl/imx6sx: add enet magic packet support
Add imx6q/dl/qp sabresd, imx6sx sabreauto magic packet support.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Dong Aisheng [Wed, 13 Jan 2016 08:04:06 +0000 (16:04 +0800)]
MLK-12252 dts: imx7d: move lpsr pin definition into a separated head file
Originally we put all the definition of both imx7d normal pins and
lpsr pins in imx7d-pinfunc.h which may lead to a easy failure of
user by wrongly put the normal pins of &iomuxc under &iomuxc_lpsr
node due to user has no idea about the difference, then pinctrl
driver will take the wrong value to set which may potentially break
other devices to work.
We have met this issue several times and it's hard to debug when it
happens.
This patch separates the lpsr pins into a dedicated head file
to give user a reminder to put lpsr pins group under the correct
pinctrl device node.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit
c524454c24fd9e5e329351dd154cbd24d47d0e0e)
Peng Fan [Wed, 13 Jan 2016 06:50:29 +0000 (14:50 +0800)]
MLK-12189 imx: mx7d correct iomux error for SAI3 and ENET2_EN
pinmux settings using GPIO1_IO0[0-7] should use iomuxc_lpsr,
but not iomuxc. If use iomuxc, you will set wrong register
and may impact other functions.
Without this patch, SAI3_MCLK use GPIO1_IO03 pinmux and impacts
QSPI function.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Gao Pan [Tue, 12 Jan 2016 10:21:20 +0000 (18:21 +0800)]
MLK-12205 ARM: dts: 6sx-ard: add sensor node
Add sensor node in 6sx-ard dts. The sensors are mma8451,
mag3110 and isl29023.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Anson Huang [Sat, 9 Jan 2016 16:38:37 +0000 (00:38 +0800)]
MLK-12203-2 ARM: imx: adjust loop number to delay ~20us for i.MX7D low power idle
ARM does NOT execute one instruction every cycle, the bus bandwidth,
cache status etc. would impacts the instruction execution time, so we
can NOT just calculate the delay time by ARM frequency, this patch
adjusts loop number to get a ~20us delay, measured via GPIO pin.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang [Sat, 9 Jan 2016 16:02:00 +0000 (00:02 +0800)]
MLK-12203-1 ARM: imx: adjust i.MX7D DDR retention mode for LPSR
Per design team's recommendation, for i.MX7D TO1.1
LPSR mode, as IOMUXC will lost power, so it needs to
use TO1.0's flow to avoid CKE toggle during retention,
but it has a limitation of POR reset fail during LPSR.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Robin Gong [Thu, 26 Nov 2015 09:05:07 +0000 (17:05 +0800)]
MLK-11909-2 regulator: anatop-regulator: Dereference null return value (NULL_RETURNS)
Dereference null return value (NULL_RETURNS).
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit
e5d41f4bbded2f2b948a13d4dc04596cd896b072)
Robby Cai [Tue, 12 Jan 2016 08:35:12 +0000 (16:35 +0800)]
MLK-12179 epdc: use outer_flush_range instead of outer_flush_all
l2c210_flush_all, the underlying implementation of outer_flush_all() has the
constraint on 4.1 kernel that, it can not be called under interrupt context.
However the EPDC driver can not guarantee this condition at calling point, thus
it could cause kernel dump. This has been observed on i.MX6SL, and theorically
on other platforms like i.MX6DL (using PL310 L2 cache). So use outer_flush_range
to fix it.
Although we don't have such issue on i.MX7D (not PL310 L2), we still prefer to
use outer_flush_range() for legacy software dithering support and for easy
maintenance. Then we do the change in both EPDC driver.
------------[ cut here ]------------
Kernel BUG at
800204d8 [verbose debug info unavailable]
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
Modules linked in: galcore(O) evbug
CPU: 0 PID: 842 Comm: kworker/u3:1 Tainted: G O 4.1.8-1.0.0+ge352a0b #1
Hardware name: Freescale i.MX6 SoloLite (Device Tree)
Workqueue: EPDC Submit epdc_submit_work_func
task:
a8a8f900 ti:
a92a4000 task.ti:
a92a4000
PC is at l2c210_flush_all+0x5c/0x60
LR is at epdc_submit_work_func+0x684/0xbf8
pc : [<
800204d8>] lr : [<
8030702c>] psr:
600b0013
sp :
a92a5e90 ip :
a9150c8c fp :
a8480518
r10:
a84a28c0 r9 :
00000008 r8 :
a9150644
r7 :
a91512e0 r6 :
0000012c r5 :
a91512e0 r4 :
a91512dc
r3 :
a00b0013 r2 :
80b184a0 r1 :
701fe019 r0 :
f4a02000
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
Control:
10c53c7d Table:
a943404a DAC:
00000015
Process kworker/u3:1 (pid: 842, stack limit = 0xa92a4210)
Stack: (0xa92a5e90 to 0xa92a6000)
5e80:
a92a5ed0 8005d058 0000bbc2 a851d4c0
5ea0:
00000000 a9150000 a8480000 a8480440 00000190 00000193 55555556 a84a28c0
5ec0:
a8480518 a8500000 80b18088 a94f3900 00000000 00000000 00000190 0000012c
5ee0:
a94f3900 a8480518 a87e8d80 a8479000 a845a200 00000020 00000000 a8479000
5f00:
a8479000 80046458 a92a4000 a8479000 a8479014 a8479000 a87e8d98 a8479014
...
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Sandor Yu [Tue, 12 Jan 2016 09:30:48 +0000 (17:30 +0800)]
MLK-12240: mxc cec: Fix potential memory leak issue
Fix mxc cec driver potential memory leak issue.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Bai Ping [Tue, 12 Jan 2016 08:27:46 +0000 (16:27 +0800)]
MLK-12219 thermal: imx: unregister busfreq_notifier in thermal_remove
unregister the busfreq_notifier when the thermal driver is removed.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Robin Gong [Tue, 12 Jan 2016 07:16:45 +0000 (15:16 +0800)]
MLK-12211-2: ARM: configs: imx_v7_defconfig: enable CONFIG_POWER_RESET_SYSCON_POWEROFF
On v4.1, use syscon-poweroff driver instead of poweroff interface in
rtc-snvs driver.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Robin Gong [Tue, 12 Jan 2016 07:12:03 +0000 (15:12 +0800)]
MLK-12211-1: ARM: dts: imx6/imx7: enable snvs-poweroff
enable snvs-poweroff driver on imx6sx(except sabreauto board),imx6ul and
imx7d all boards.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Robby Cai [Fri, 8 Jan 2016 10:51:07 +0000 (18:51 +0800)]
MLK-12190 ARM: dts: imx7d-sdb-revb: change pad setting to remove stripe
Change GPIO pad setting to control EPDC/ENET signals on REV B board from 0x59
to default one 0x14 in order to remove stripe when do EPDC unit test.
Signed-off-by: Robby Cai <robby.cai@nxp.com>