Josep Orga [Wed, 9 Nov 2022 09:40:59 +0000 (10:40 +0100)]
ARM: dts: Adapt SW2 regulator of PF1510 to A5 configuration.
· A5 configuration has 1.5V as SW2 voltage.
· A3 configuration has 1.35V as SW2 voltage.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Tue, 4 May 2021 11:36:32 +0000 (13:36 +0200)]
net: ethernet: fec_main: Add reset during fec_enet_open.
· Added reset to have PHY working correctly.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Alejandro Benete [Tue, 1 Dec 2020 14:04:31 +0000 (15:04 +0100)]
ARM: dts: Changing default led status to off for every led but the red one (POWER).
Signed-off-by: Alejandro Benete <abenete@somdevices.com>
Alejandro Benete [Tue, 6 Oct 2020 09:54:12 +0000 (11:54 +0200)]
ARM: dts: Add bluetooth and remove GPIO-keys imx6ull-somdevices-C8P1.dts functionallity.
Signed-off-by: Alejandro Benete <abenete@somdevices.com>
Josep Orga [Tue, 28 Apr 2020 14:51:06 +0000 (16:51 +0200)]
ARM: dts: Add imx6ull-somdevices.dts i2c2 gpio pinctrl functionallity.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Thu, 23 Apr 2020 17:02:00 +0000 (19:02 +0200)]
ARM: dts: Add imx6ull-somdevices-C0P1.dts add LEDs.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Wed, 22 Apr 2020 15:43:26 +0000 (17:43 +0200)]
ARM: dts: Add imx6ull-somdevices.dts NO_LCD filter to disable LCD functionallity.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Tue, 21 Apr 2020 19:07:45 +0000 (21:07 +0200)]
rtc: pcf8563: Enable or disable clock out due to clk_disable_unused hang.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Tue, 21 Apr 2020 19:07:18 +0000 (21:07 +0200)]
ARM: dts: Add imx6ull-somdevices-C8P1.dts functionallity.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Tue, 21 Apr 2020 19:05:42 +0000 (21:05 +0200)]
ARM: dts: imx6ull-somdevices.dtsi add "somdevices,sai-mclk-direction-output" property.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Tue, 21 Apr 2020 19:04:48 +0000 (21:04 +0200)]
ARM: dts: imx6ull-somdevices.dtsi disable some peripherals by default.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 12:18:43 +0000 (14:18 +0200)]
mmc: pwrseq_simple: Add wilc3000 pwrseq adding chip_en gpio and proper power on and off sequences.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 10:34:32 +0000 (12:34 +0200)]
net: wireless: Workaround to have NULL pointer problem with 15.3.1 wilc3000 firmware.
TODO: Try not to use it or verify all cases.
To solve the problem:
get_if_handler Invalid handle
wilc_wlan_handle_rx_buff: wilc_netdev in wilc is NULL
wilc_wlan_handle_rx_buff: Data corrupted 0, 0
wilc_handle_isr,>> UNKNOWN_INTERRUPT - 0x00000182
get_if_handler Invalid handle
wilc_wlan_handle_rx_buff: wilc_netdev in wilc is NULL
wilc_handle_isr,>> UNKNOWN_INTERRUPT - 0x00004fea
cfg_get Timed Out
wilc_sdio mmc0:0001:1 wlan0: ERR [wilc_send_config_pkt:1800] Get Timed out
wilc_sdio mmc0:0001:1 wlan0: ERR [wilc_get_statistics:1106] Failed to send scan parameters
Unable to handle kernel paging request at virtual address
ffff8cc4
pgd =
80004000
[
ffff8cc4] *pgd=
8bf5e861, *pte=
00000000, *ppte=
00000000
Internal error: Oops: 37 [#1] PREEMPT SMP ARM
Modules linked in: evbug wilc_sdio
CPU: 0 PID: 203 Comm: K_TXQ_TASK Not tainted
4.9.88-04802-g84dfb5dab852-dirty #115
Hardware name: Freescale i.MX6 UltraLite (Device Tree)
task:
887f0b00 task.stack:
88904000
PC is at wilc_wlan_txq_remove_from_head+0x4c/0x10c [wilc_sdio]
LR is at preempt_count_add+0xd4/0x14c
pc : [<
7f00ce08>] lr : [<
8014e52c>] psr:
a00e0093
sp :
88905d40 ip :
0acbd000 fp :
00000000
r10:
88905dd4 r9 :
88905dc2 r8 :
0000000b
r7 :
200e0013 r6 :
884ae4e4 r5 :
ffff8cc0 r4 :
884ae420
r3 :
884ae630 r2 :
ffff8cc0 r1 :
884aed74 r0 :
200e0013
Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment none
Control:
10c53c7d Table:
88a7c06a DAC:
00000051
Process K_TXQ_TASK (pid: 203, stack limit = 0x88904210)
Stack: (0x88905d40 to 0x88906000)
5d40:
88905dc0 887b6d00 88980000 0000000b 88905e04 00000060 884ae500 7f00f11c
5d60:
00000400 00000000 00000000 887404c0 7f013fa0 884aeb64 00000001 7f0185d4
5d80:
7f018600 884ae420 88905da8 884ae4cc 88905f3c 00000001 7f01a414 88980000
5da0:
f0f8aea7 0d010000 01010101 00000001 00000000 00000000 00000000 00000000
5dc0:
887f0b00 8bb38a78 000029aa 00000000 b243dcee 00000006 000029aa 00000000
5de0:
8bb38a40 80e7ba40 887f0b00 8bb38a40 00000000 80160774 00000000 8bb38a40
5e00:
00000418 00000000 8bb38a40 00000000 0000000a 00000000 80f02d00 00000001
5e20:
887f0b80 0000003d 8bb38a78 80e7ba40 8bb38a40 887f0b00 88905e8c 809f8e5c
5e40:
8bb38a40 8014e1e4 80f03244 887f0e40 ffffffff 00000000 80f00000 8014a6fc
5e60:
887f0b00 00000000 80f00000 8bb38a40 887f0b00 80f06600 882398c0 00000000
5e80:
8bb35440 400e0013 80e78440 80f03244 00000001 809f8a88 02400000 8bb35440
5ea0:
80e78440 80180c74 88905ef0 88905ef0 8bb35440 88905ef0 00000001 809f8e08
5ec0:
8bb35440 80180cdc 00000000 400e0013 88905ee4 88905ef0 8bb35440 80180e98
5ee0:
fffff2c8 809f801c 7fffffff 400e0013 00000200 00000000 fffff2c8 80180eb8
5f00:
887f0b00 884ae420 ffffe000 7f01a40c 884acf88 ffffff97 884ae450 884ae448
5f20:
00000001 7f005560 88740000 7f015e94 884ae538 884ae548 888f5840 00000001
5f40:
884ae420 00000000 888f5840 88904000 884ae420 7f0054c4 00000000 00000000
5f60:
00000000 80149344 00000000 00000000 887f0b00 884ae420 00000000 00000000
5f80:
88905f80 88905f80 00000000 00000000 88905f90 88905f90 888f5840 8014923c
5fa0:
00000000 00000000 00000000 80107950 00000000 00000000 00000000 00000000
5fc0:
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
5fe0:
00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000
[<
7f00ce08>] (wilc_wlan_txq_remove_from_head [wilc_sdio]) from [<
7f00f11c>] (wilc_wlan_handle_txq+0xb64/0xd80 [wilc_sdio])
[<
7f00f11c>] (wilc_wlan_handle_txq [wilc_sdio]) from [<
7f005560>] (wilc_txq_task+0x9c/0x248 [wilc_sdio])
[<
7f005560>] (wilc_txq_task [wilc_sdio]) from [<
80149344>] (kthread+0x108/0x110)
[<
80149344>] (kthread) from [<
80107950>] (ret_from_fork+0x14/0x24)
Code:
e0234893 e5935744 e3550000 0a000016 (
e5952004)
---[ end trace
875555a42b5ff364 ]---
note: K_TXQ_TASK[203] exited with preempt_count 1
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 10:30:50 +0000 (12:30 +0200)]
mmc: sdhci: Bug with iMX6ULL when large size data is managed with wilc1000/wilc3000:
Based on https://community.nxp.com/thread/447193
Error solved:
cfg_get Timed Out
wilc_sdio mmc0:0001:1 wlan0: ERR [wilc_send_config_pkt:1789] Get Timed out
wilc_sdio mmc0:0001:1 wlan0: ERR [wilc_get_statistics:1106] Failed to send scan parameters
mmc0: Timeout waiting for hardware interrupt.
mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
mmc0: sdhci: Sys addr: 0x88a00800 | Version: 0x00000002
mmc0: sdhci: Blk size: 0x00000200 | Blk cnt: 0x00000086
mmc0: sdhci: Argument: 0x1c000087 | Trn mode: 0x00000033
mmc0: sdhci: Present: 0x01308a8e | Host ctl: 0x00000013
mmc0: sdhci: Power: 0x00000002 | Blk gap: 0x00000080
mmc0: sdhci: Wake-up: 0x00000008 | Clock: 0x0000002f
mmc0: sdhci: Timeout: 0x0000008f | Int stat: 0x00000000
mmc0: sdhci: Int enab: 0x107f100b | Sig enab: 0x107f100b
mmc0: sdhci: AC12 err: 0x00000000 | Slot int: 0x00000302
mmc0: sdhci: Caps: 0x07eb0000 | Caps_1: 0x0000b407
mmc0: sdhci: Cmd: 0x0000353a | Max curr: 0x00ffffff
mmc0: sdhci: Resp[0]: 0x00001000 | Resp[1]: 0x00000000
mmc0: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000
mmc0: sdhci: Host ctl2: 0x00000000
mmc0: sdhci: ADMA Err: 0x00000003 | ADMA Ptr: 0x8c077204
mmc0: sdhci: ============================================
wilc_sdio mmc0:0001:1: wilc_sdio_cmd53..failed, err(-110)
wilc_sdio mmc0:0001:1: Failed cmd53 [0], block read...
wilc_wlan_handle_isr_ext: fail block rx
Unable to handle kernel NULL pointer dereference at virtual address
00000000
pgd =
80004000
[
00000000] *pgd=
00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in: option usb_wwan usbserial evbug wilc_sdio
CPU: 0 PID: 208 Comm: K_TXQ_TASK Not tainted
4.9.88-04794-g4659c284c25a-dirty #1
Hardware name: Freescale i.MX6 UltraLite (Device Tree)
task:
888ecb00 task.stack:
889e2000
PC is at wilc_wlan_txq_remove_from_head+0x4c/0x90 [wilc_sdio]
LR is at 0x100
pc : [<
7f00cdac>] lr : [<
00000100>] psr:
a00e0093
sp :
889e3d50 ip :
00000200 fp :
00000000
r10:
889e3de6 r9 :
889e3dc6 r8 :
884ce500
r7 :
00000220 r6 :
884ce4e4 r5 :
00000000 r4 :
884ce420
r3 :
00000000 r2 :
884d0570 r1 :
200e0013 r0 :
884d0544
Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment none
Control:
10c53c7d Table:
8884406a DAC:
00000051
Process K_TXQ_TASK (pid: 208, stack limit = 0x889e2210)
Stack: (0x889e3d50 to 0x889e4000)
3d40:
88960000 0000008a 889e3e14 7f00f0a0
3d60:
00000400 00000000 00000000 887704c0 7f013f24 884cebc4 00000005 7f0184cc
3d80:
7f0184f8 884ce420 889e3da8 884ce4cc 889e3f3c 00000001 7f01a314 88960000
3da0:
39383736 10030200 01010101 00040001 00000000 00000000 00000000 00000000
3dc0:
00020202 8bb38a02 00000001 8015c3c0 80f03244 00000000 0000000c 00000000
3de0:
80f02d00 00000001 888ecb80 00000017 8bb38a78 80e7ba40 8bb38a40 888ecb00
3e00:
0000001c 0000001c 0000001c 00000418 0000001c 00000000 ffffffff 00000000
3e20:
887aa000 8014a6fc 888ecb00 00000001 887aa000 8bb38a40 888ecb00 8864a100
3e40:
887c4a80 887c4a80 00000000 00000000 889e3e9c 809f4d9c 00000001 809f56b0
3e60:
80f033a8 80f1c000 f4a0200c 809f5110 600b0013 ffffffff 889e3ed4 ffffe000
3e80:
884ce53c 884ce538 889e2000 00000002 00000000 00000000 889e3eac 809f5118
3ea0:
7fffffff 884ce53c 00000001 809f7f94 7fffffff 884ce53c 884ce538 889e2000
3ec0:
00000002 00000000 00000000 00000001 884ce53c 884ce53c 884ce538 884ccf88
3ee0:
00000001 809f8dbc 7fffffff 809f5dac 7f01a30c 00000001 0000000c 00000001
3f00:
80c95370 884ce420 ffffe000 7f01a30c 884ccf88 7f015e18 884ce450 88770000
3f20:
00000001 7f005560 88770000 7f015e18 884ce538 884ce548 889a65c0 00000005
3f40:
884ce420 00000000 889a65c0 889e2000 884ce420 7f0054c4 00000000 00000000
3f60:
00000000 80149344 0013003f 00000000 888ecb00 884ce420 00000000 00000000
3f80:
889e3f80 889e3f80 00000000 00000000 889e3f90 889e3f90 889a65c0 8014923c
3fa0:
00000000 00000000 00000000 80107950 00000000 00000000 00000000 00000000
3fc0:
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
3fe0:
00000000 00000000 00000000 00000000 00000013 00000000 0013003f 00003d22
[<
7f00cdac>] (wilc_wlan_txq_remove_from_head [wilc_sdio]) from [<
7f00f0a0>] (wilc_wlan_handle_txq+0xb64/0xd80 [wilc_sdio])
[<
7f00f0a0>] (wilc_wlan_handle_txq [wilc_sdio]) from [<
7f005560>] (wilc_txq_task+0x9c/0x248 [wilc_sdio])
[<
7f005560>] (wilc_txq_task [wilc_sdio]) from [<
80149344>] (kthread+0x108/0x110)
[<
80149344>] (kthread) from [<
80107950>] (ret_from_fork+0x14/0x24)
Code:
e3a0ec01 e3a0cc02 e2852e77 e5955744 (
e8950009)
---[ end trace
61f15caa55e80a4b ]---
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 10:22:55 +0000 (12:22 +0200)]
net: wireless: Disable wilc driver debug mode.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 10:20:17 +0000 (12:20 +0200)]
net: wireless: Wilc add firmware reload retries.
·Based on the function wl12xx_init_fw in ./drivers/net/wireless/ti/wlcore/main.c.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 10:16:52 +0000 (12:16 +0200)]
net: wireless: Add wilc3000/wilc1000 functionallity version 15.3.1:
· Based on tag wilc_linux_15_3_1 in https://github.com/linux4wilc/driver/tree/wilc_linux_15_3_1
· Firmware wilc1000_wifi_firmware.bin is located in https://github.com/linux4wilc/firmware/tree/wilc_linux_15_3_1
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 09:53:04 +0000 (11:53 +0200)]
ARM: dts: imx6ull-somdevices.dtsi change clock-frequency text.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 09:39:04 +0000 (11:39 +0200)]
ARM: imx6ull_somdevices_defconfig: Add MMC_SPI, RTC, SOUND and PPP support.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 09:36:29 +0000 (11:36 +0200)]
ARM: imx6ull_somdevices_defconfig: Added SMSC PHY and WILC functionallity.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 09:32:36 +0000 (11:32 +0200)]
ARM: imx6ull_somdevices_defconfig: Create file based on imx_v7_defconfig.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 09:24:19 +0000 (11:24 +0200)]
ARM: dts: imx6ull-somdevices.dtsi add WILC3000 functionallity.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sun, 19 Apr 2020 07:41:55 +0000 (09:41 +0200)]
ARM: dts: imx6ull-somdevices.dtsi: Add clock-frequency for avoiding missing clock-frequency warning.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 17:30:54 +0000 (19:30 +0200)]
spi: spidev: Add spidev not to have kernel warnings.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 17:28:07 +0000 (19:28 +0200)]
ARM: dts: imx6ull-somdevices.dtsi: Add 4 and 7 inch LCD configurations.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 17:22:32 +0000 (19:22 +0200)]
ARM: dts: imx6ull-somdevices.dtsi:
· Change USB1 configuration.
· Add GPIO-LEDs to control USB enables.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 17:18:23 +0000 (19:18 +0200)]
ARM: dts: Add Heartbeat LED support imx6ull-somdevices.dtsi.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 17:14:24 +0000 (19:14 +0200)]
ARM: dts: Add SPI support.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 17:09:13 +0000 (19:09 +0200)]
ARM: dts: Add I2C devices:
· Add PMIC PF1510/PF1550 support.
· Add EEPROM support.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 16:59:34 +0000 (18:59 +0200)]
ARM: dts: Add C0P2-H0.1 pins mux.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 16:36:56 +0000 (18:36 +0200)]
ARM: dts: Removed not used interfaces.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 16:06:46 +0000 (18:06 +0200)]
ARM: dts: Disable second phy when one ethernet selected.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 15:50:09 +0000 (17:50 +0200)]
ARM: dts: Add support to single/dual ethernet.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 15:19:49 +0000 (17:19 +0200)]
ARM: dts: Changed machine model to "Freescale i.MX6 ULL µSMARC SOMDEVICES Board" in imx6ull-somdevices.dtsi file.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 15:17:27 +0000 (17:17 +0200)]
ARM: dts: Add somdevices dts copying imx6ull-14x14-evk.dtsi file.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 14:44:11 +0000 (16:44 +0200)]
ARM: imx: Enable ENET1_TX_CLK during board startup.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 11:33:39 +0000 (13:33 +0200)]
net: ethernet: fec_main: Add "phy-reset-in-suspend" device tree option. When this option is
present, the driver will assert the phy reset line during suspend.
There are two main reasons to set this configuration:
- Avoid that the phy reset line "powers" the phy when the phy power
is turned off.
- Ensure that the phy is reset when waking up from suspend, what
helps to ensure proper operation when the phy power is turned off.
Based on: https://github.com/digi-embedded/linux/commit/
f0ddbc0153b269bfd21b84dbd4ad16acdfd21f29
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 09:02:20 +0000 (11:02 +0200)]
net: ethernet: fec_main: Add reset PHY GPIOs when CONFIG_OF is not defined.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Josep Orga [Sat, 18 Apr 2020 08:17:33 +0000 (10:17 +0200)]
net: ethernet: fec_main: Enable reset PHY GPIOs at startup.
Signed-off-by: Josep Orga <jorga@somdevices.com>
Guoniu.zhou [Wed, 30 Oct 2019 06:18:41 +0000 (14:18 +0800)]
MLK-22861: media: imx8: fix camera hang issue after system resume
For imx8qxp/qm, gpio will go to low level when system suspend and
will to high when system resume. It will lead ov5640 sensor to reset.
So add reinitialization for sensor when system resume at first time.
For imx815, gpio will have no this issue because GPIO will keep high
when system suspend. So the patch is for fixing issue introduced by
MLK-22202-1. More info, please refer to the ticket.
OV5640 will work at DVP mode by default, but in our use case, it need
to work on MIPI mode, so we can know whether sensor is resetted by
system by checking 0x300E[2] bits.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Xianzhong [Wed, 30 Oct 2019 14:57:20 +0000 (22:57 +0800)]
MGS-5261 [#imx-1771] fix dummy draw hang for 8MM GPU
dummy draw is required for 8MM GPU errata - HBN1285,
this fix shall be applied for GPU power-up transition,
otherwise GPU shader hang with the unnecessary flush.
check GPU MMU state to enable dummy draw fix only.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit
f3f44f213eb1c5210aa4fe723256a2e1e699a4dc)
Clark Wang [Fri, 25 Oct 2019 05:05:22 +0000 (13:05 +0800)]
MLK-22850 i2c: rpmsg-imx: add msg_id for checking response id
M4 deals with the rpmsg msg by FIFO. When a timeout occurs on Acore
side, it might impact the next several rpmsg requests and cause the
these requests timeout, too.
For this case, add a msg_id in the unused buffer field, check the
request id of response each time.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
(cherry picked from commit
8a94d641b4648a52bcfc43a41e8e8c084e64d2e7)
Xianzhong [Mon, 28 Oct 2019 17:55:53 +0000 (01:55 +0800)]
MGS-5284 [#imx-1786] fix GPU panic with vm_mmap failure
When vm_mmap fail, code jump to OnError with error status and userLogical variable != 0.
Then _CMAFSLUnmapUser is called with a invalid virtual address (MdlMap->vmaAddr) and cause panic.
Check userLogical to avoid GPU kernel panic for error handling.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit
710bbfc815c1058d32ad2295d630efb238ef1beb)
Xianzhong [Mon, 28 Oct 2019 14:12:10 +0000 (22:12 +0800)]
MGS-5283 [#imx-1784] fix GPU AXI bus error
Fix GPU safe memory with gcvALLOC_FLAG_4GB_ADDR
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit
34b0f803e1ae45db7456fb732612fcdd87ef747a)
Xianzhong [Mon, 28 Oct 2019 16:19:05 +0000 (00:19 +0800)]
MGS-5283 [#imx-1238] fix GPU memory without CMA
Fix GPU memory problem when disable CMA allocator,
set LINUX_CMA_FSL=0 in gc_hal_kernel_platform_imx.config
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit
ecd385c98fdbf8b0b83519b1ae710f08a617fc82)
Xianzhong [Fri, 9 Nov 2018 18:37:56 +0000 (02:37 +0800)]
MGS-4376 [#imx-1238] fix low performance with CMA allocator
there are lots of PFNs busy message when run GPU tests:
[ 622.370671] alloc_contig_range: [4ea70, 4ea7c) PFNs busy
[ 626.518072] alloc_contig_range: [4ea90, 4ea9c) PFNs busy
this problem is related with CMA migration for fragments,
move CMA allocator after GFP to avoid memory migration,
also fix CMA preempt for contiguous memory request.
can improve CTS and gpubench benchmarks on M850D.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit
ad77ed61b72c8362b04361acd2deb685fee15436)
Ella Feng [Thu, 24 Oct 2019 15:10:15 +0000 (23:10 +0800)]
MGS-5176 [#imx-1744] Coveriy - need free the pages if malloc memory failed
When alloc NonContiguous1MPages, if malloc fail, need free the pages to avoid memory leak
Signed-off-by: Xianzhong Li <xianzhong.li@nxp.com>
(cherry picked from commit
30b05a615613a7e47db5e98dddb0fae9ca42b924)
Shijie Qin [Fri, 25 Oct 2019 01:46:24 +0000 (09:46 +0800)]
MLK-22843 VPU decoder: first input do not count for XVID format
The first input only sequence info, shall do not count to
input-data amount.
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: ming_qian <ming.qian@nxp.com>
(cherry picked from commit
fe111d74927f5f1ddfb8e096fc2f1fcacd377e76)
Shijie Qin [Wed, 23 Oct 2019 02:56:20 +0000 (10:56 +0800)]
MA-15552 VPU decoder: reset seek_flag and wait_res_change_done in time
Reset seek_flag and wait_res_change_done when receive
VID_API_EVENT_STOPPED event.
This also can fix an Andorid case indirectly:
Seek in the beginning, but has not do capture port streamoff/on
when receive res changed event, then will cause seek_flag status
incorrect.
If abort before receive seq_hdr_found evnt will call stop cmd to
fw, then will reset seek_flag and wait_res_change_done.
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: ming_qian <ming.qian@nxp.com>
(cherry picked from commit
93019dc136f9ad3c294e6b4be73049977895aed4)
ming_qian [Thu, 24 Oct 2019 05:34:27 +0000 (13:34 +0800)]
MLK-22840:VPU Decoder: improve g_fmt/s_fmt of capture port
refine code to make it more clear
Signed-off-by: ming_qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
(cherry picked from commit
8e694ece0711d53339feacd22cbe99560b96957f)
ming_qian [Tue, 22 Oct 2019 06:21:26 +0000 (14:21 +0800)]
MLK-22822:VPU Encoder: check the stream buffer free space before encode
frame
If the free space of stream buffer is not enough for one frame,
vpu may overwrite the data or hang.
so check before encode frame can avoid it.
Add new ctrl V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE,
user can use this ctrl to set the coded picture buffer size.
Signed-off-by: ming_qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
(cherry picked from commit
1af0b35c6bfffa57e27f0a39c8b040b93d973278)
ming_qian [Wed, 16 Oct 2019 06:00:30 +0000 (14:00 +0800)]
MLK-22760:VPU Decoder:improve the start command
1. the start command is mixed with transfer data,
separate them and make code more clear
2. some condition of start_code_bypass is missing.
3. config the pStreamBuffDesc only before send start command
Signed-off-by: ming_qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
(cherry picked from commit
775033eb3dcba27a2b7093caccbc81c1df55ba46)
ming_qian [Mon, 14 Oct 2019 08:26:25 +0000 (16:26 +0800)]
MLK-22753: VPU Decoder: fix stop timeout caused by waiting res change
If firmware report sequence header twice,
and the user don't support the format, such as 10-bit NV12,
user may close vpu decoder directly, it will send stop cmd.
but when driver receive the second sequence header event,
it may waiting for resolution change done,
it'll block the stop command, and cause it timeout.
Signed-off-by: ming_qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
(cherry picked from commit
9e1d28861a6f89b9f25641131f8db1ef17b81d3a)
Shijie Qin [Wed, 25 Sep 2019 09:10:18 +0000 (17:10 +0800)]
MLK-22668 VPU Decoder: correct frame_byte typedef to int
Correct frame_byte typedef to int in order to align with
update_stream_addr_vpu() typedef, it maybe negative.
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: ming_qian <ming.qian@nxp.com>
(cherry picked from commit
b04249f00b7cb28a17d3b7b992d565ca0edbee28)
ming_qian [Fri, 20 Sep 2019 02:22:42 +0000 (10:22 +0800)]
MLK-22647: VPU Decoder: make sure clear b_firstseq before send source
change event
If b_firstseq is cleared after sending source change event,
user may get invalid frame size.
Signed-off-by: ming_qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
(cherry picked from commit
6794c08937d4b9b1f8509935ebaeb1072af0b4aa)
Shijie Qin [Wed, 18 Sep 2019 08:12:23 +0000 (16:12 +0800)]
MLK-22640 VPU Decoder: enhance check free space before add padding data
Free space may not enough when (end - wptr < SCODE_SIZE),
add this check.
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
(cherry picked from commit
ce944686a765f514a70e4731379179df30dbba0a)
Shijie Qin [Wed, 18 Sep 2019 02:43:34 +0000 (10:43 +0800)]
MLK-22606 VPU Decoder: refine decode performance info
1. change to use list record performance info for better trace each
time-point and not limited to a fixed flow.
2. add total time from open device to each time-point.
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
Reviewed-by: ming_qian <ming.qian@nxp.com>
(cherry picked from commit
563d17921b33e3b1be96414ef80535146f00edb5)
Liu Ying [Wed, 23 Oct 2019 09:41:06 +0000 (17:41 +0800)]
MLK-22399 mxc IPUv3: cpmem: Get 0 u/v_offset in __ipu_ch_offset_calc() for some pfmts
There are no u/v planars in the pixel formats
IPU_PIX_FMT_BGRA4444/IPU_PIX_FMT_BGRA5551/IPU_PIX_FMT_AYUV,
so we should explicitly get zero u/v_offset from __ipu_ch_offset_calc()
for those pixel formats. Without this patch, '-EINVAL' will be
returned from __ipu_ch_offset_calc() as the function return value
and input parameter u/v_offset will not be touched, which is not a
good behavior, because the caller is likely to ignore the function
return value and take the u/v_offset as valid value. The MXC IPUv3 fb
driver is a such kind of caller, which may get the u/v_offset
for those pixel formats without checking the function return value,
and hence wrongly pass the u/v_offset to PRE driver(finally causes
malfunction).
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
c1ff0b03944e5196497be4f606979f5cb0c1b413)
Zhang Peng [Wed, 23 Oct 2019 02:02:00 +0000 (10:02 +0800)]
MLK-22815-1: ASoC: fsl: dsp: Expand parameter msg size
Modified parameter msg in dsp, make sure still can transfer right msg
between DSP and user, modified parameter msg in kernel.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
(cherry picked from commit
ea234701fd310d822a8dd777e96f430ae0b70bc9)
Robin Gong [Tue, 22 Oct 2019 16:33:42 +0000 (00:33 +0800)]
MLK-22798-1: dmaengine: fsl-edma-v3: do not enable interrupt in dev_2_dev
Do not enable interrupt in dev_2_dev with cyclic case, since in such
case no any interrupt needed. Otherwise many interrupt will come in
every 64 words transfered in ASRC case, which cause heavy system
loading.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit
f0a3172e1ceb04c46377160486ad7dc6ee022850)
Robin Gong [Wed, 4 Sep 2019 14:15:05 +0000 (22:15 +0800)]
MLK-22512: power: supply: sabresd_battery: correct wakeup irq for battery
Fix no wakeup from suspend while AC/USB charger plug in.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
(cherry picked from commit
1674f23cf12175833fa96e8030e9ceeff20f5998)
Robin Gong [Thu, 8 Aug 2019 17:34:00 +0000 (01:34 +0800)]
MLK-22392: watchdog: imx8_wdt: correct pretimeout
scfw think 'new_pretimeout' as the time stamp from now, not
the time before watchdog timeout which is different with kernel
define. Convert it to scfw's format.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
(cherry picked from commit
674332ac12ddf593d89e87517573b31be2bbead3)
Liu Ying [Fri, 18 Oct 2019 07:55:23 +0000 (15:55 +0800)]
MLK-22768 video: fbdev: mxc_ipuv3_fb: Handle enabled fg properly when set-par happens on bg
When we do set-par for background framebuffer without on-the-fly
flag being set, we should also unset the enabled overlay framebuffer's
on-the-fly flag, otherwise the overlay framebuffer cannot be enabled
again properly because a full mode set procedure is needed for overlay
framebuffer as it experiences a period of time when background
framebuffer stops fetching frames.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
fad9437d99ae234f1c66087d47ad8a547f5f1142)
Xianzhong [Wed, 16 Oct 2019 13:09:12 +0000 (21:09 +0800)]
MGS-4894 [#ccc] fix GPU hang for overheat protection
set minimal scaling factor with 20 for 8MM and 6SX GPU
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit
03f411ed00d173b683ff2d00edf6196724cccf9d)
Stéphane Dion [Tue, 25 Jun 2019 12:36:15 +0000 (14:36 +0200)]
HSM-24: arm64: dtx: imx8qxp: enable more seco MU users
Enable all SECO MUs and increase number of users on the first one.
Signed-off-by: Stéphane Dion <stephane.dion_1@nxp.com>
(cherry picked from commit
56099536022e7e66cfc932069aa4a4701d84aa0b)
Stéphane Dion [Tue, 25 Jun 2019 12:35:38 +0000 (14:35 +0200)]
HSM-24 arm64: dtx: imx8qm: enable more seco MU users
enable all SECO MUs and increase number of users on the first one.
Signed-off-by: Stéphane Dion <stephane.dion_1@nxp.com>
(cherry picked from commit
2197e1f3a75fe9d9832cff3aa979aa4235a1e7a7)
Stephane Dion [Thu, 13 Jun 2019 15:45:36 +0000 (17:45 +0200)]
SHE-17 arm64: dts: imx8qm: enable first SECO MU
Enabling use of the first SECO MU on i.MX8QM
Signed-off-by: Stephane Dion <stephane.dion_1@nxp.com>
(cherry picked from commit
2b65b323254965b1d563e0aee80e18678d631b9d)
Stephane Dion [Thu, 13 Jun 2019 15:41:51 +0000 (17:41 +0200)]
SHE-17 arm64: dts: imx8qxp: enable first SECO MU
Enabling use of the first SECO MU on i.MX8QXP
Signed-off-by: Stephane Dion <stephane.dion_1@nxp.com>
(cherry picked from commit
b7865b23439de010187a211d1c283d6159807569)
Stephane Dion [Thu, 13 Jun 2019 14:20:31 +0000 (16:20 +0200)]
SHE-17 soc: imx8: SECO MU driver
Driver to communicate with SECO over messaging unit.
Expose a char device to user-space so user can write messages that
will be sent to SECO and read messages received from it.
Data that should be exchanged with SECO through shared memory are
indicated to this driver through ioctl calls.
Signed-off-by: Stephane Dion <stephane.dion_1@nxp.com>
(cherry picked from commit
eb721810fdc309b6a32a7a64c7686eaa6052cdc7)
Stephane Dion [Thu, 13 Jun 2019 15:29:30 +0000 (17:29 +0200)]
SHE-17 dt-bindings: add i.MX8 SECO MU driver bindings
Documentation of device-tree entry describing messaging
unit (MU) used to communicate with SECO core on i.MX8.
Signed-off-by: Stephane Dion <stephane.dion_1@nxp.com>
(cherry picked from commit
238c7e4dab3b500c61b7def62dcd940b9c103658)
Xianzhong [Wed, 9 Oct 2019 17:22:27 +0000 (01:22 +0800)]
MGS-5211 Integrate vivante 6.4.0.p1 GPU driver
Fix Coverity high impact and Vulkan 1.1.3 issues
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit
b1c86d22ff27aefbd3d07b78d27cf5d7491cbc1c)
Sandor Yu [Tue, 8 Oct 2019 08:30:57 +0000 (16:30 +0800)]
MLK-21944: HDP: Fix DP 720x480@60 failed work
hsync in struct of drm_display_mode is modes's hsync rate in kHz.
But DP register should been set the value of Horizontal Sync Width
that is not define in DRM_MODE().
It could get by (mode->hsync_end - mode->hsync_start).
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Richard Zhu [Mon, 23 Sep 2019 07:56:25 +0000 (15:56 +0800)]
MLK-22541 ahci: imx: ahci: imx: set the rx water mark to fix the gen3 link issue
- Refine the tx/rx impedance ratio setting.
- Set the RxWaterMark to fix the GEN3 link unstable issue on iMX8QM.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
(cherry picked from commit
13234ea070f3b0048c98b59200bb3ed85659d013)
Liu Ying [Mon, 23 Sep 2019 03:22:42 +0000 (11:22 +0800)]
MLK-22653-4 drm/imx: dpu: crtc: Precisely send vbland event if CRTC is active
If CRTC is active, we should send vblank event in vblank
interrupt handler to make sure it's sent precisely. This
patch caches the event to be sent at dpu_crtc->event in
the ->atomic_enable() and the ->atomic_flush() callbacks
and finally sends it out in dpu_vbl_irq_handler(). Since
we rely on the interrupt handler to send the event, we
call drm_crtc_vblank_get() to get a vblank refcount to
guarantee the interrupt is enabled when caching the event
in dpu_crtc_queue_state_event() and call drm_crtc_vblank_put()
to drop a vblank refcount in the interrupt handler.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
c5f325790615eb16fe5a448e4b0afa122a33c23e)
Liu Ying [Mon, 23 Sep 2019 02:30:58 +0000 (10:30 +0800)]
MLK-22653-3 drm/imx: dpu: crtc: Remove WARN_ON(!crtc->state->event)
The DRM atomic core ensures crtc->state->event is not NULL when
calling the ->atomic_disable() or the ->atomic_flush() callbacks.
So, let's remove the unnecessary NULL check warning on it.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
834bff532fe22a79708459ec976da0a74a2e97e2)
Liu Ying [Fri, 20 Sep 2019 09:42:05 +0000 (17:42 +0800)]
MLK-22653-2 drm/imx: dpu: crtc: Do not send out bogus vblank event in ->atomic_disable()
When a full modeset is needed, the CRTC could be totally disabled or
enabled/re-enabled after the modeset. If it's re-enabled, a vblank
event would be sent during the CRTC enablement procedure. So, a bogus
event should be killed in the ->atomic_disable() callback.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
cee2d80af5e38fb022973c023f548ff02a515882)
Liu Ying [Fri, 20 Sep 2019 09:39:25 +0000 (17:39 +0800)]
MLK-22653-1 drm/imx: dpu: crtc: Send vblank event after drm_crtc_vblank_off() in ->atomic_disable()
The Kdoc for the event entry of struct drm_crtc_state mentions that the
simplest way to send vblank event when a CRTC is being disabled is that
calling drm_crtc_send_vblank_event() somewhen after drm_crtc_vblank_off()
has been called. This patch takes the way mentioned above to send vblank
event in the ->atomic_disable() callback.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
5b1a8127d98daf13d9f9891dfad2589f339b63d5)
Peter Chen [Fri, 17 Nov 2017 02:48:34 +0000 (10:48 +0800)]
MLK-16715-4 usb: chipidea: imx: add imx8qm compatible
It is suitable for imx8qm and imx8qxp currently
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit
c5068a42ef39fd97b46813fa51de00147826aaac)
Sandor Yu [Fri, 20 Sep 2019 07:27:34 +0000 (15:27 +0800)]
MLK-22084: fbdev: hdmi: Fix HDCP function failed work with Sony TV
HDCP function could work in other TVs
but it failed with Sony TV when run hdcp enable/disable stress test.
The TMDS clock is not detected by Sony TV.
The TV seems time sensitive for HDMI TMDS.
Add 20ms delay before TMDS enable make it work.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Julien Olivain [Thu, 19 Sep 2019 10:13:08 +0000 (12:13 +0200)]
MLK-22643: mxc: hantro_845: Kconfig: fix dependency on ARCH_FSL_IMX8MM
Signed-off-by: Julien Olivain <julien.olivain@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
(cherry picked from commit
d5ee37f96629716042bb0b8317ff8ea0000a769c)
Liu Ying [Fri, 20 Sep 2019 05:12:14 +0000 (13:12 +0800)]
MLK-22649 drm/imx: dpu: plane: Add color properties support
As DPU fetchunits support ITU601(limited range)/ITU601_FR(full range)
and ITU709(limited range) YUV to RGB color space conversions, we may
add color encoding and color range properties support for planes.
Considering software backward compatibility, the default color encoding
is set to ITU601 with full color range.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
f491e24e65cb360fb0b3ce56f74d04fd80da77ab)
Liu Ying [Tue, 17 Sep 2019 01:44:58 +0000 (09:44 +0800)]
MLK-22600-5 drm/imx: dpu: plane: Support multiple pixel blend modes
This patch adds mulitple pixel blend modes for DPU plane.
The modes are "None", "Pre-multiplied" and "Coverage".
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
1259fedbcf2a54f58b47e8531a09b35cc60a43f7)
Liu Ying [Thu, 12 Sep 2019 06:30:28 +0000 (14:30 +0800)]
MLK-22600-4 drm/imx: dpu: plane: Support alpha in pixel for overlay planes
Now that we've already got proper default blend mode support,
we may introduce alpha in pixel feature for overlay planes.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
4881b188f809d1e3de8662dff94b1b2dfc00a62a)
Liu Ying [Thu, 12 Sep 2019 06:29:27 +0000 (14:29 +0800)]
MLK-22600-3 drm/imx: dpu: plane: Support full zpos range for planes
DPU has no limitations on the plane's zpos, so we don't
have to limit the primary plane zpos to be zero and the
overlay plane zpos to be non-zero.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
4487aca4ab19623e1995322871e6f14d48bfef74)
Liu Ying [Thu, 12 Sep 2019 06:24:56 +0000 (14:24 +0800)]
MLK-22600-2 drm/imx: dpu: plane: Improve bailout path of dpu_plane_init()
This patch improves bailout path of dpu_plane_init().
As we'll add more drm properties to the planes later,
this would simply the code.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
1a6ab9246b5d6e71e8a4a0a0b5ea15d7af0c9879)
Liu Ying [Tue, 3 Sep 2019 19:16:54 +0000 (15:16 -0400)]
MLK-22600-1 drm/imx: dpu: kms: Support proper default blend mode
Without the new blend modes("None", "Pre-multiplied" and "Coverage")
introduced in the below commit, the old userspace assumes alpha in
pixel is per-premultiplied by default. So, let's support the default
blend mode properly.
commit
468dba6432ca ("drm: Add per-plane pixel blend mode property")
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
ebb7b4874493a8fb42de636e9421877a54399177)
Lowry Li [Thu, 23 Aug 2018 08:30:19 +0000 (16:30 +0800)]
drm: Add per-plane pixel blend mode property
Pixel blend modes represent the alpha blending equation
selection, describing how the pixels from the current
plane are composited with the background.
Adds a pixel_blend_mode to drm_plane_state and a
blend_mode_property to drm_plane, and related support
functions.
Defines three blend modes in drm_blend.h.
Changes since v1:
- Moves the blending equation into the DOC comment
- Refines the comments of drm_plane_create_blend_mode_property to not
enumerate the #defines, but instead the string values
- Uses fg.* instead of pixel.* and plane_alpha instead of plane.alpha
Changes since v2:
- Refines the comments of drm_plane_create_blend_mode_property:
1) Puts the descriptions (after the ":") on a new line
2) Adds explaining why @supported_modes need PREMUL as default
Changes since v3:
- Refines drm_plane_create_blend_mode_property(). drm_property_add_enum()
can calculate the index itself just fine, so no point in having the
caller pass it in.
- Since the current DRM assumption is that alpha is premultiplied
as default, define DRM_MODE_BLEND_PREMULTI as 0 will be better.
- Refines some comments.
Changes since v4:
- Adds comments in drm_blend.h.
- Removes setting default value in drm_plane_create_blend_mode_property()
as it is already in __drm_atomic_helper_plane_reset().
- Fixes to use state->pixel_blend_mode instead of using
plane->state->pixel_blend_mode in reset function.
- Rebases on drm-misc-next.
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Lowry Li <lowry.li@arm.com>
Signed-off-by: Ayan Kumar Halder <ayan.halder@arm.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/245734/
(cherry picked from commit
a5ec8332d4280500544e316f76c04a7adc02ce03)
(cherry picked from commit
468dba6432ca97eedc2b8d6e6cc8905cd1e1f34e)
Alexandru Gheorghe [Sat, 4 Aug 2018 16:15:21 +0000 (17:15 +0100)]
drm/atomic: Add __drm_atomic_helper_plane_reset
There are a lot of drivers that subclass drm_plane_state, all of them
duplicate the code that links together the plane with plane_state.
On top of that, drivers that enable core properties also have to
duplicate the code for initializing the properties to their default
values, which in all cases are the same as the defaults from core.
Change since v1:
- Make it consistent with the other helpers and require that both
plane and state not be NULL, suggested by Boris Brezillon and
Philipp Zabel.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20180804161530.12275-2-alexandru-cosmin.gheorghe@arm.com
(cherry picked from commit
7f4de521001f4ea705d505c9f91f58d0f56a0e6d)
(cherry picked from commit
f09b192bf1316f0e65fa2dbb5ba4c82a558867ae)
Xianzhong [Fri, 6 Sep 2019 14:27:49 +0000 (22:27 +0800)]
MGS-5160 [#imx-1676] enable dummy draw to fix gpu hang and failures on 8MM
Problems:
- GPU hang when run Google Earth apk on 8MM EVK board
- Android DEQP/SKQP CTS have random failures
- Khronos ES20 CTS have random failures
Analysis:
GPU got stuck in shader module when process specific data format,
this is caused by VSI GCNanoUltra Errata(HBN1286), which does not set
the specific intermediate register to 0 in hardware reset sequence after power up,
this wrong register will cause the unexpected result when process specific data type,
wrong behavior will happen and may cause out of bound access in shader programming.
Fix:
GPU driver will submit the predefined command(dummy draw) with fake stream and shader,
also set scissor with (0,0,0,0) to avoid draw out, no pixel output on hardware pipeline,
this workaround can set the specific register to 0 as the effective SW remedy.
Impact:
No obvious functionality and performance impact with dummy draw workaround,
it only takes several cycles in command fetch --> vertex shader --> primitive,
and then cull out of reset of GPU pipelines.
This patch can fix the same GPU problem for 7ULP.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit
b14813c419b1f733c0945e99fc403b7a25774d24)
Liu Ying [Tue, 3 Sep 2019 20:44:08 +0000 (16:44 -0400)]
MLK-22599 drm/imx: dpu: kms: Support full screen CRTC background
The CRTC background should be full screen instead of partial
screen, because the DRM core is likely to add configurable
background color support in the future. We may cover the full
screen with ConstFrame0/1, upon which builds planes. With this,
it is easier to compute each plane's layer offset vs CRTC start
point and all ConstFrame units can be controlled by CRTC.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
ba18a9874cf010032413ca70f9b358399a143037)
Liu Ying [Wed, 11 Sep 2019 21:06:23 +0000 (21:06 +0000)]
MLK-22597 drm/imx: dpu: kms: Allow primary plane on-the-fly disablement
By correcting plane's ExtDst source in ->atomic_begin() for
cases where pixel combiner is used, commit[1] acctually fixes
the primary plane on-the-fly disablement failure issue which
commit[2] tries to address. So, let's revert commit[2] and
allow primary plane on-the-fly disablement.
[1] commit
2f3eaadf72c3 ("MLK-22584 drm/imx: dpu: crtc: Correct plane's ExtDst source in ->atomic_begin()")
[2] commit
6477bb1492b7 ("MLK-21525 drm/imx: dpu: kms: Disallow primary plane on-the-fly disablement")
Revert "MLK-21525 drm/imx: dpu: kms: Disallow primary plane on-the-fly disablement"
This reverts commit
6477bb1492b7ac89678891447f3d794e4fdb6df6.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
148075a270dafa0a04f1c9b61d62e2764e469cf3)
Dong Aisheng [Thu, 12 Sep 2019 07:32:22 +0000 (15:32 +0800)]
dma: dma-buf.h: change DMA_BUF_IOCTL_PHYS NR to 10
Change DMA_BUF_IOCTL_PHYS NR to 10 avoid conflicts with upstream
in the future.
Reviewed-by: Song Bing <bing.song@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit
36abba8f55078424e037e7f7877e9f22062cccbc)
Dong Aisheng [Thu, 12 Sep 2019 07:30:52 +0000 (15:30 +0800)]
drm: drm_fourcc.h: change DRM_FORMAT_MOD_VENDOR_VSI to 0xf1
change DRM_FORMAT_MOD_VENDOR_VSI to 0xf1 to avoid conflicts
with upstream in the future.
Reviewed-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit
aa4bedcc4c316d8d9400c3709840d5622e64e9b8)
Dong Aisheng [Thu, 12 Sep 2019 07:29:10 +0000 (15:29 +0800)]
drm: drm_fourcc.h: change DRM_FORMAT_MOD_VENDOR_AMPHION to 0xf0
change DRM_FORMAT_MOD_VENDOR_AMPHION to 0xf0 to avoid conflicts
with upstream in the future.
Reviewed-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit
c91d6eb654f557f683e5cdd44181581adbe15378)
Liu Ying [Wed, 4 Sep 2019 18:01:13 +0000 (14:01 -0400)]
MLK-22584 drm/imx: dpu: crtc: Correct plane's ExtDst source in ->atomic_begin()
In dpu_helper_funcs->atomic_begin(), we temporarily set the plane's
ExtDst source to ConstFrame in shadow. In the plane driver,
dpu_plane_helper_funcs->atomic_update() can update the shadow if
necessary. This way, we may set the source as either ConstFrame
or LayerBlend. We only set the source for the old top plane in
->atomic_begin(). However, in cases where pixel combiner is used,
the top planes are tracked separately for the master stream and
the slave stream with ->is_left_top or ->is_right_top flags
instead of ->is_top flag when pixel combiner is not used. This
patch corrects the source for the cases where pixel combiner is
used.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
ff19118af177bab2dc765b242cf5b4392910a5e7)
Liu Ying [Mon, 9 Sep 2019 21:50:13 +0000 (17:50 -0400)]
MLK-22573-2 gpu: imx: dpu-blit: Do not initialize STORE9_STATIC register
The bit DIV0 of register STORE9_STATIC is used as a control bit
to fix the unsynchronization issue bewteen two display streams
in FrameGen side-by-side mode, which is introduced from an ECO
operation for the display controller. The bit has to be one
when the side-by-side mode is enabled. And, it has to be zero
when the mode is disabled, otherwise, a single display stream
cannot startup correctly. Since the DPU common driver initializes
the register for us at the driver probe stage and system resume
stage, we may remove the same initialization logic of our own.
Without this patch, as the DPU blit engine DRM driver is resumed
relatively late, the bit would be overwritten to be zero at the
driver's ->resume() callback, which causes the display controller
cannot be correctly resumed from FrameGen side-by-side mode and
content ExtDst shadow load done event from the slave stream won't
come.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
785a8705624e114f4f3d3d0836826130fb57b46f)
Liu Ying [Mon, 9 Sep 2019 21:49:07 +0000 (17:49 -0400)]
MLK-22573-1 gpu: imx: dpu: common: Initialize Store9 when necessary
The bit DIV0 of register STORE9_STATIC is used as a control bit
to fix the unsynchronization issue bewteen two display streams
in FrameGen side-by-side mode, which is introduced from an ECO
operation for the display controller. The bit has to be one
when the side-by-side mode is enabled. And, it has to be zero
when the mode is disabled, otherwise, a single display stream
cannot startup correctly. As Store9 is a part of blit engine,
the rest bits of the register should also be initialized before
any regular blit. Currently, we need to do the initialization
at driver probe stage and system resume stage at least. Since
we have the DPU KMS driver and DPU blit engine DRM driver, the
initialization needs to be done only in the DPU common driver
so that the register won't be overwritten accidentally by the
two drivers with each other. We see the overwriting issue at
the system resume stage because the blit engine driver resumes
relatively late and it initializes the register blindly by
writing the bit to zero, thus the display controller cannot be
resumed correctly in FrameGen side-by-side mode and content
ExtDst shadow load done event from the slave stream won't come.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit
e90a6a917e3f5d7087e0de5616b6e8a055906767)
ming_qian [Wed, 11 Sep 2019 08:59:58 +0000 (16:59 +0800)]
MMFMWK-8552-2: correct the error no when reqbufs fail
if stream status is on,
reqbufs will fail,
return -EBUSY instead of -EINVAL
Signed-off-by: ming_qian <ming.qian@nxp.com>
(cherry picked from commit
65cfc81f73639c633d9e9b7c23c9c58443fa661f)
ming_qian [Wed, 11 Sep 2019 02:04:17 +0000 (10:04 +0800)]
MMFMWK-8552: fix hang when do seek for resolution change stream
driver tell seek and res change by the status of output stream.
if res change is not handled properly,
the stream may hang.
Signed-off-by: ming_qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
(cherry picked from commit
86163d3eab3760f9659c7a58ff4cdf1a0a58a810)
Peter Chen [Mon, 1 Jul 2019 10:05:35 +0000 (18:05 +0800)]
MLK-22527-2 usb: cdns3: quit if the port is woken up during suspending
If the port receives the resume during the suspending, it needs to
quit instead of going on, it could keep controller status correct,
and eliminating below timeout warning message.
cdns-usb3
5b110000.usb3: wait lpm_clk_req timeout
cdns-usb3
5b110000.usb3: wait phy_refclk_req timeout
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>