linux.git
7 years agoMLK-12724 ARM: dts: imx6ull-ddr3-arm2: resolve pin conflicts for pwm3 and lcd touch
Fancy Fang [Thu, 28 Apr 2016 02:05:08 +0000 (10:05 +0800)]
MLK-12724 ARM: dts: imx6ull-ddr3-arm2: resolve pin conflicts for pwm3 and lcd touch

Since pwm3 and lcd touch are conflict for one pin, change
backlight to use pwm1 instead. But pwm1 also conflicts with
enet1, so enable backlight in a new dts file.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-12722: ASoC: fsl_spdif: clear the validity bit for TX
Shengjiu Wang [Tue, 26 Apr 2016 06:38:35 +0000 (14:38 +0800)]
MLK-12722: ASoC: fsl_spdif: clear the validity bit for TX

Validity bit is set in default, which means the data is not reliable,
The receive device may drop this data. So clear it in default, and
provide a mixer interface for user to control this bit.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
7 years agoMLK-12708 ARM: configs: imx: fix build error for mfg defconfig
Bai Ping [Tue, 26 Apr 2016 10:27:01 +0000 (18:27 +0800)]
MLK-12708 ARM: configs: imx: fix build error for mfg defconfig

Fix the build error for imx_v7_mfg_defconfig.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-10782-4 ARM:imx6qdl:dts:Add LDB_DI_CLK parent to device tree.
Ranjani Vaidyanathan [Wed, 29 Apr 2015 15:29:27 +0000 (10:29 -0500)]
MLK-10782-4 ARM:imx6qdl:dts:Add LDB_DI_CLK parent to device tree.

Add the LDB clock parents to the device tree.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
(cherry picked from commit 1a6cd019c1ab62ca0dc23bbc6b033df3f15850a5)

7 years agoMLK-12688-02: arm dts: Add csis-clk-settle property
Sandor Yu [Wed, 20 Apr 2016 10:16:30 +0000 (18:16 +0800)]
MLK-12688-02: arm dts: Add csis-clk-settle property

Add csis-clk-settle property to imx7D SDB mipi csi.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-12688-01: mipi csi: Add clk_settle setting
Sandor Yu [Wed, 20 Apr 2016 09:29:03 +0000 (17:29 +0800)]
MLK-12688-01: mipi csi: Add clk_settle setting

Add clk_settle variable to compliance more mipi sensor.
Mipi controller should setting by followed value
according mipi sensor support D-phy version.

Slave Clock Lane Control Register for TCLK-SETTLE.
2'b0x = 110 ns to 280ns (v0.87 to v1.00)
2'b10 = 150 ns to 430ns (v0.83 to v0.86)
2'b11 = 60 ns to 140ns (v0.82)

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-12868-03 ARM: imx: add busfreq support on imx6ull
Bai Ping [Thu, 7 Apr 2016 09:20:03 +0000 (17:20 +0800)]
MLK-12868-03 ARM: imx: add busfreq support on imx6ull

Add busfreq support on i.MX6ULL. per to the design
team, there is a 24MHz low power run mode on i.MX6ULL.
the define for this mode is as below:
----------------------------
|cpu    DRAM    AXI    AHB |
 24MHz  24MHz   24MHz  24MHz

The mode can be implemented as 'low_bus_mode' in busfreq,
compared to i.MX6UL, the additional code we need to add is
clk change for cpu core. so in low_bus_mode, the cpu will run
at 24MHz.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12868-02 ARM: imx: add low power idle for imx6ull
Bai Ping [Wed, 20 Apr 2016 07:32:36 +0000 (15:32 +0800)]
MLK-12868-02 ARM: imx: add low power idle for imx6ull

Add low power idle for i.MX6ULL.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12868-01 cpufreq: imx: get old_freq from policy->cur
Bai Ping [Thu, 7 Apr 2016 10:05:08 +0000 (18:05 +0800)]
MLK-12868-01 cpufreq: imx: get old_freq from policy->cur

Get the old_freq from the policy->cur.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12695 dma: pxp-v2: fixing the mismatch calls of pm_runtime suspend/resume
Fancy Fang [Fri, 22 Apr 2016 05:42:09 +0000 (13:42 +0800)]
MLK-12695 dma: pxp-v2: fixing the mismatch calls of pm_runtime suspend/resume

The 'pm_runtime_get_sync()' and 'pm_runtime_put_sync_suspend()'
may be called not pairs. And this will cause the 'usage_count'
to be negative.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 10135c736dfc1b3d5c449adb78118e3642b99276)

7 years agoMLK-12692 ARM: dts: imx6ull-ddr3-arm2-ecspi: enable ecspi1 on arm2 board
Robin Gong [Thu, 21 Apr 2016 03:33:17 +0000 (11:33 +0800)]
MLK-12692 ARM: dts: imx6ull-ddr3-arm2-ecspi: enable ecspi1 on arm2 board

Add new dtb file since ecspi share pins with csi and esai.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-12685 ARM: dts: imx6sx-sabreauto.dts: improve usdhc4 pad drive strength
Haibo Chen [Wed, 20 Apr 2016 06:00:21 +0000 (14:00 +0800)]
MLK-12685 ARM: dts: imx6sx-sabreauto.dts: improve usdhc4 pad drive strength

For imx6sx-sabreauto board, the usdhc4 is used for the sd slot locate on the
base board, so need to improve the pad drive strength, otherwise we will meet
many CRC error or timeout error when insert a sd card.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
7 years agoMLK-12676-2 arm: dts: enable usb otg2 for imx6ull arm2 board
Li Jun [Tue, 19 Apr 2016 08:28:33 +0000 (16:28 +0800)]
MLK-12676-2 arm: dts: enable usb otg2 for imx6ull arm2 board

Use a dedicatd dts file to enable both OTG1 and OTG2 ports in OTG mode,
- otg2 ID pin is muxed with SD1 vselect, so move it out of hog and don't
  use it in usdhc1 in usb dts.
- otg2 vbus control use GPIO1_IO09 since the original gpio is shared
  with i2c1(with pmic chip connected).

Signed-off-by: Li Jun <jun.li@nxp.com>
7 years agoMLK-12676-1 arm: dts: enable usb otg for imx6ull arm2 board
Li Jun [Tue, 19 Apr 2016 01:02:46 +0000 (09:02 +0800)]
MLK-12676-1 arm: dts: enable usb otg for imx6ull arm2 board

Enable otg mode for OTG1 port for imx6ull arm2 board.

Signed-off-by: Li Jun <jun.li@nxp.com>
7 years agoMLK-12683 ARM: dts: imx6ull: add uart2 support
Andy Duan [Tue, 19 Apr 2016 10:10:45 +0000 (18:10 +0800)]
MLK-12683 ARM: dts: imx6ull: add uart2 support

Enable uart2 port in ddr3 ARM2 board.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
7 years agoMLK-12682 ARM: dts: imx6ull: add adc support
Andy Duan [Tue, 19 Apr 2016 09:59:43 +0000 (17:59 +0800)]
MLK-12682 ARM: dts: imx6ull: add adc support

Add extra dts file to enable adc to avoid pin conflict with usbotg1.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
7 years agoMLK-12681 ARM: dts: imx6ull: enable fec1 port in ddr3 ARM2 board
Andy Duan [Thu, 7 Apr 2016 08:37:20 +0000 (16:37 +0800)]
MLK-12681 ARM: dts: imx6ull: enable fec1 port in ddr3 ARM2 board

Enable fec1 port in ddr3 ARM2 board.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
7 years agoMLK-12684-3: Documentation: gpmi-nand: document the gpmi-nand compatibility
Han Xu [Tue, 19 Apr 2016 20:28:44 +0000 (15:28 -0500)]
MLK-12684-3: Documentation: gpmi-nand: document the gpmi-nand compatibility

Document the gpmi-nand compatibility for i.MX6ULL

Signed-off-by: Han Xu <han.xu@nxp.com>
7 years agoMLK-12684-2: mtd: gpmi: add NAND support
Han Xu [Tue, 19 Apr 2016 19:44:27 +0000 (14:44 -0500)]
MLK-12684-2: mtd: gpmi: add NAND support

support NAND on imx6ull

Signed-off-by: Han Xu <han.xu@nxp.com>
7 years agoMLK-12684-1: ARM: dts: imx6ull: add NAND support
Han Xu [Tue, 19 Apr 2016 19:42:48 +0000 (14:42 -0500)]
MLK-12684-1: ARM: dts: imx6ull: add NAND support

Support NAND on imx6ull

Signed-off-by: Han Xu <han.xu@nxp.com>
7 years agoMLK-12679 ARM: dts: imx6ull: correct pxp clock settings
Fancy Fang [Tue, 19 Apr 2016 05:52:30 +0000 (13:52 +0800)]
MLK-12679 ARM: dts: imx6ull: correct pxp clock settings

Correct pxp clock settings according to the commit
'MLK-12669-2 dma: pxp-v3: add 'ipg' and 'axi' clocks'.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-12678 ARM: dts: imx6ull-ddr3-arm2: solve pin conflict for pwm3 and otg1
Fancy Fang [Tue, 19 Apr 2016 02:38:49 +0000 (10:38 +0800)]
MLK-12678 ARM: dts: imx6ull-ddr3-arm2: solve pin conflict for pwm3 and otg1

The pwm3 and otg1 share the same pin 'GPIO1_IO04'. And default,
the pin is used for otg1. So create a new dts file to solve
this conflict.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-12669-2 dma: pxp-v3: add 'ipg' and 'axi' clocks
Fancy Fang [Mon, 18 Apr 2016 03:01:28 +0000 (11:01 +0800)]
MLK-12669-2 dma: pxp-v3: add 'ipg' and 'axi' clocks

Add 'ipg' and 'axi' clocks for pxp which should
be used to control runtime power managments.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-12699-1 ARM: imx7d: clk: add two clocks definition for pxp
Fancy Fang [Fri, 15 Apr 2016 10:11:51 +0000 (18:11 +0800)]
MLK-12699-1 ARM: imx7d: clk: add two clocks definition for pxp

The pxp require two clocks to enable when it works, and
they are 'ipg' and 'axi' clocks. Besides, the two clocks
share the same CCGR to control clock gating.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-12675 ARM: dts: imx: keep RTC enabled for software poweroff
Anson Huang [Mon, 18 Apr 2016 10:00:11 +0000 (18:00 +0800)]
MLK-12675 ARM: dts: imx: keep RTC enabled for software poweroff

SRTC needs to be kept enabled during system poweroff,
SNVS_LP control register bit 0 SRTC_ENV must be set
to enable RTC, for software poweroff, kernel just
read the register offset and value from dtb and write
to SNVS_LP control register to poweroff system, need
to make sure bit 0 SRTC_ENV is set to enable RTC during
system poweroff.

Previous setting did NOT enable it which will cause
RTC stop running if using software poweroff.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
7 years agoMLK-12671 ARM: imx: support single soc config
Anson Huang [Mon, 18 Apr 2016 06:40:47 +0000 (14:40 +0800)]
MLK-12671 ARM: imx: support single soc config

Need to make sure build pass with single SOC
config, in current build for single SOC config,
if both SOC_IMX7D and SOC_IMX6SX are NOT selected,
below build error will occur, add MU module
config to fix this build issue.

LD      init/built-in.o
arch/arm/mach-imx/built-in.o: In function `busfreq_probe':
:(.text+0x5370): undefined reference to `imx_mu_lpm_ready'
arch/arm/mach-imx/built-in.o: In function `bus_freq_pm_notify':
:(.text+0x5d50): undefined reference to `imx_mu_lpm_ready'
:(.text+0x5d68): undefined reference to `imx_mu_lpm_ready'
make: *** [vmlinux] Error 1

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
7 years agoMLK-12670 mxc IPUv3: common: Fix overrun array ->sec_chan_en and ->thrd_chan_en
Liu Ying [Mon, 18 Apr 2016 02:12:39 +0000 (10:12 +0800)]
MLK-12670 mxc IPUv3: common: Fix overrun array ->sec_chan_en and ->thrd_chan_en

We've got more than 24 channels defined in ipu_channel_t, which causes
potential overrun on array ipu->sec_chan_en and ipu->thrd_chan_en.
This patch enlarges the array size to IPU_MAX_CH(32) to fix this issue.

This issue is reported by Coverity:
Out-of-bounds read (OVERRUN)
overrun-local: Overrunning array ipu->sec_chan_en of 24 bytes at byte offset
25 using index channel >> 24 (which evaluates to 25).
        if ((ipu->sec_chan_en[IPU_CHAN_ID(channel)]) &&
                ((channel == MEM_PP_MEM) || (channel == MEM_PRP_VF_MEM) ||
                 (channel == MEM_VDI_PRP_VF_MEM))) {

Out-of-bounds read (OVERRUN)
overrun-local: Overrunning array ipu->thrd_chan_en of 24 bytes at byte offset
25 using index channel >> 24 (which evaluates to 25).
        if ((ipu->thrd_chan_en[IPU_CHAN_ID(channel)]) &&
                ((channel == MEM_PP_MEM) || (channel == MEM_PRP_VF_MEM))) {
                thrd_dma = channel_2_dma(channel, IPU_ALPHA_IN_BUFFER);

Signed-off-by: Liu Ying <victor.liu@nxp.com>
7 years agoMLK-12627-07 ARM: config: enable imx6ull in defconfig
Bai Ping [Wed, 13 Apr 2016 08:44:37 +0000 (16:44 +0800)]
MLK-12627-07 ARM: config: enable imx6ull in defconfig

Enable i.MX6ULL in imx_v7_defconfig.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12627-06 ARM: imx: enable DSM for i.mx6ull
Anson Huang [Wed, 6 Apr 2016 06:48:32 +0000 (14:48 +0800)]
MLK-12627-06 ARM: imx: enable DSM for i.mx6ull

Enable DSM for i.MX6ULL, UART_UBRC is a read-only
register, writting it will cause external abort,
so skip save/restore for this register.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12627-05 ARM: imx: add suspend support for i.mx6ul
Anson Huang [Fri, 1 Apr 2016 12:16:48 +0000 (20:16 +0800)]
MLK-12627-05 ARM: imx: add suspend support for i.mx6ul

Add suspend/resume support for i.MX6ULL.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12627-04 ARM: dts: imx: Add dts support for imx6ull DDR3 ARM2 board
Bai Ping [Wed, 13 Apr 2016 02:19:56 +0000 (10:19 +0800)]
MLK-12627-04 ARM: dts: imx: Add dts support for imx6ull DDR3 ARM2 board

Add dts file for i.MX6ULL DDR3 ARM2 board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12627-03 ARM: dts: imx: Add dtsi file for imx6ull
Bai Ping [Wed, 13 Apr 2016 02:19:02 +0000 (10:19 +0800)]
MLK-12627-03 ARM: dts: imx: Add dtsi file for imx6ull

Add dtsi file for i.MX6ULL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12627-02 ARM: imx: clk: add clock support for imx6ull
Bai Ping [Tue, 12 Apr 2016 08:02:18 +0000 (16:02 +0800)]
MLK-12627-02 ARM: imx: clk: add clock support for imx6ull

The general architecture of i.MX6ULL is same as i.MX6UL. So
most of the clock driver code of i.MX6UL can be reused by
i.MX6ULL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12627-01 ARM: imx: add i.mx6ull msl support
Peng Fan [Tue, 16 Feb 2016 10:37:22 +0000 (18:37 +0800)]
MLK-12627-01 ARM: imx: add i.mx6ull msl support

Add MSL code support for i.MX6ULL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12617 mmc: Fix compile error when CONFIG_MMC=m
Haibo Chen [Tue, 5 Apr 2016 09:43:38 +0000 (17:43 +0800)]
MLK-12617 mmc: Fix compile error when CONFIG_MMC=m

When CONFIG_MMC=m, compile error shows up

ERROR: "of_alias_max_index" [drivers/mmc/core/mmc_core.ko] undefined!
ERROR: "mmc_get_reserved_index" [drivers/mmc/card/mmc_block.ko] undefined!
ERROR: "mmc_first_nonreserved_index" [drivers/mmc/card/mmc_block.ko] undefined!
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2
make: *** Waiting for unfinished jobs....

This patch export the upper three symbol for module runtime load.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 3b2520f17d427b8fa8db37a6d9a4311f20c29036)

7 years agoMA-7531 [#2161] optimize event synchronization
Meng Mingming [Wed, 13 Apr 2016 03:36:08 +0000 (11:36 +0800)]
MA-7531 [#2161] optimize event synchronization

GPU 3D clock will still enable/disable when video playback,
actually there is no 3D usage, to saving power we should
avoid 3D clock enable/disable. This patch optimize event
synchronization by not pass signal/sync_point to gpu when
current gcoHARDWARE is already sync'ed GPU and no command
buffer required.

Date: Apr 13, 2016
Signed-off-by: Richard Liu <r66033@freescale.com>
Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
7 years agoMLK-12623-03 ARM: imx: Add cpu speed grading check for imx6ul
Bai Ping [Mon, 11 Apr 2016 02:56:40 +0000 (10:56 +0800)]
MLK-12623-03 ARM: imx: Add cpu speed grading check for imx6ul

In the OCOTP fuse map, the speed grading[1:0] define the MAX
CPU speed the chip can run. The detailed definition is below:
2b'00: Reserved;
2b'01: 528000000Hz;
2b'10: 696000000Hz;
2b'11: Reserved;

We need to disable the illegal setpoints according to the fuse map.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12623-02 ARM: dts: imx: Add 700MHz setpoint define in dts
Bai Ping [Tue, 23 Feb 2016 05:37:14 +0000 (13:37 +0800)]
MLK-12623-02 ARM: dts: imx: Add 700MHz setpoint define in dts

According to the latest datasheet(Rev. 0, 12/2015),
When the chip is run at LDO enabled mode, the highest
setpoint can be set to 700MHz in overdrive mode.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12623-01 cpufreq: imx: Add support for 700MHz setpoint in cpufreq
Bai Ping [Tue, 23 Feb 2016 05:20:37 +0000 (13:20 +0800)]
MLK-12623-01 cpufreq: imx: Add support for 700MHz setpoint in cpufreq

On i.MX6UL EVK board, we use a external GPIO DC regulator to control
the VDD_ARM_SOC_IN voltage, if default voltage is 1.4V when the system
is bootup. Per design team, when the highest setpoint freq is not
bigger than 528MHz, we can decrease this regulator voltage to 1.3V.
On i.MX6UL TO1.1, we add a 700MHz setpoint. When the highest setpoint
freq is 700MHz, the DC regulator should be at 1.4V to to cover the IR
drop.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-12614 mxc IPUv3: common: Refactor pixel clock tree register implementation
Liu Ying [Fri, 1 Apr 2016 07:27:27 +0000 (15:27 +0800)]
MLK-12614 mxc IPUv3: common: Refactor pixel clock tree register implementation

This patch removes boilerplate code to register clocks for two DIs of one IPU.
Also, the char strings for storing the pixel clock parent names are wrongly
placed in the kernel rodata section, which will be overwritten when clocks
are registered.  This patch moves the problematic strings to stack.  Since
clk_register() will cache his own version from non-kernel-rodata space, this
may fix the issue.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
7 years agoMLK-12620 ARM: imx: correct i.MX7D fuse MAC1_ADDR offset address
Fugang Duan [Wed, 6 Apr 2016 06:11:01 +0000 (14:11 +0800)]
MLK-12620 ARM: imx: correct i.MX7D fuse MAC1_ADDR offset address

i.MX7d MAC1_ADDR fuse offset address is 0x640, i.MX6q/dl/sx/ul
MAC1_ADDR fuse offset address is 0x620. Correct it for i.MX7d,
otherwise read un-correct MAC address.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit:74ee5313534dd9453601f4428c4916d46405669f)

7 years agoMLK-12622: mtd: gpmi: fix the issue in legacy bch support
Han Xu [Thu, 7 Apr 2016 15:22:57 +0000 (10:22 -0500)]
MLK-12622: mtd: gpmi: fix the issue in legacy bch support

missed the brackets for bch legacy support, which leads the large oob
nand bch setting to wrong path.

Signed-off-by: Han Xu <han.xu@nxp.com>
7 years agoMLK-12602: Documentation: gpmi-nand: legacy bch geometry option for NAND
Han Xu [Mon, 28 Mar 2016 16:19:44 +0000 (11:19 -0500)]
MLK-12602: Documentation: gpmi-nand: legacy bch geometry option for NAND

document the new option for legacy bch geometry support.

Conflicts:
Documentation/devicetree/bindings/mtd/gpmi-nand.txt

Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit c1c24ecd24cb808e825eb13a3e3d016c283322cc)

7 years agoMLK-12601: mtd: gpmi: provide the option to use legacy bch geometry
Han Xu [Mon, 28 Mar 2016 15:35:59 +0000 (10:35 -0500)]
MLK-12601: mtd: gpmi: provide the option to use legacy bch geometry

Provide an option in DT to use legacy bch geometry, which compatible
with the 3.10 kernel bch setting. To enable the feature, adding
"fsl,legacy-bch-geometry" under gpmi-nand node.

NOTICE: The feature must be enabled/disabled in both u-boot and kernel.

Conflicts:
drivers/mtd/nand/gpmi-nand/gpmi-nand.h

Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit 4d28b1693905526558892d40525763e6bc4469e4)

7 years agoMLK-12607: ASoC: fsl-asrc: Add the support of 12kHz and 24kHz
Shengjiu Wang [Tue, 29 Mar 2016 08:11:51 +0000 (16:11 +0800)]
MLK-12607: ASoC: fsl-asrc: Add the support of 12kHz and 24kHz

Remove the pre-processing and post-processing table. use proc_autosel()
to select proper parameters.
Unify the supported input and output rate.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
7 years agoMLK-12432-03: arm: dts: Replace ov5647 mipi sensor with ov5640
Sandor Yu [Mon, 22 Feb 2016 10:19:44 +0000 (18:19 +0800)]
MLK-12432-03: arm: dts: Replace ov5647 mipi sensor with ov5640

ov5647 mipi camera sensor is replaced by ov5640
on imx7D SDB RevB board.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-12432-02: capture: Add support for mipi input
Sandor Yu [Mon, 28 Mar 2016 10:04:40 +0000 (18:04 +0800)]
MLK-12432-02: capture: Add support for mipi input

Combine csi image setting function for 32-bit,16-bit,8-bit format.
For parallel 8-bit sensor input, when bit per pixel is 16,
csi image width should been doubled.
But for mipi input, the csi image width and height should align
with mipi whatever data width.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-12432-01: ov5640 mipi: support more platform and reduce support mode
Sandor Yu [Mon, 22 Feb 2016 10:04:04 +0000 (18:04 +0800)]
MLK-12432-01: ov5640 mipi: support more platform and reduce support mode

-Support no power and reset pins platform.
-Remove specific power and reset pin setting for ov5640 daughter card.
-Put sensor in software power down state when streamoff.
-Remove unsupported video modes, keep 640x480, 720x480, 720p, 1080p 30fps
video modes in driver.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-10934 mtd: use memcpy to replace the memcpy_fromio
Huang Shijie [Mon, 8 Apr 2013 08:56:46 +0000 (16:56 +0800)]
MLK-10934 mtd: use memcpy to replace the memcpy_fromio

During the read of NOR, the kernel actually calls the inline_map_copy_from()
to read the data out. And inline_map_copy_from() will use the memcpy_fromio()
to do the real job.

The memcpy_fromio macro maps _memcpy_fromio() in the current code.
But the _memcpy_fromio() will use readb() to do the copy work one byte
by one byte. This makes the read performance of NOR very slow(about 2~3MB/s).

A similiar discussion could be found in:
http://lists.infradead.org/pipermail/linux-arm-kernel/2009-November/003860.html

This patch replace the memcpy_fromio with memcpy which is optimized by the
kernel.

The following is the result from mtd_speedtest with M29W256GL7AN6E:
=================================================
mtd_speedtest: MTD device: 2
mtd_speedtest: not NAND flash, assume page size is 512 bytes.
mtd_speedtest: MTD device size 4194304, eraseblock size 131072, page size 512,
count of eraseblocks 32, pages per eraseblock 256, OOB size 0
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 845 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 19504 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 845 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 19140 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 846 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 19320 KiB/s
mtd_speedtest: Testing erase speed
mtd_speedtest: erase speed is 233 KiB/s
mtd_speedtest: Testing 2x multi-block erase speed
mtd_speedtest: 2x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 4x multi-block erase speed
mtd_speedtest: 4x multi-block erase speed is 224 KiB/s
mtd_speedtest: Testing 8x multi-block erase speed
mtd_speedtest: 8x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 16x multi-block erase speed
mtd_speedtest: 16x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 32x multi-block erase speed
mtd_speedtest: 32x multi-block erase speed is 225 KiB/s
mtd_speedtest: Testing 64x multi-block erase speed
mtd_speedtest: 64x multi-block erase speed is 224 KiB/s
mtd_speedtest: finished
=================================================

(cherry-picked from: f1e5914ffd82d5326cbd30507d4f37d02a0da099)

Signed-off-by: Huang Shijie <b32955@freescale.com>
7 years agoMGS-1678 [#2269] memleak in GPU driver sysfs interface
gan [Fri, 25 Mar 2016 13:24:38 +0000 (21:24 +0800)]
MGS-1678 [#2269] memleak in GPU driver sysfs interface

Add missing .release callback in file_operations of vidmem_operations in order to release the allocated memory.

Date: Mar 18, 2016
Signed-off-by: Yuchou Gan <yuchou.gan@nxp.com>
7 years agoMA-7715 fix GPU kernel panic reported by android CTS
Richard Liu [Thu, 10 Mar 2016 09:53:59 +0000 (17:53 +0800)]
MA-7715 fix GPU kernel panic reported by android CTS

The patch removes the dependence between cache flush operation and node.
Node is not used anymore when flush cache. Cache flush can work with only
logical address passed into underlying functions does not need physical
address.

Signed-off-by: Richard Liu <r66033@freescale.com>
(cherry picked from commit ad65770512d2baeb45f5d0622d985f9856b7cc1e)

7 years agoMGS-1630 5.0.11.p8 driver can't pass build with kernel 4.1 on Android M6.0
Richard Liu [Fri, 18 Mar 2016 03:31:30 +0000 (11:31 +0800)]
MGS-1630 5.0.11.p8 driver can't pass build with kernel 4.1 on Android M6.0

It has converted sync to fence api in kernel_imx/drivers/staging/android/sync.h,
so make it done in gpu driver to match kernel.

Signed-off-by: Meng Mingming <b51843@freescale.com>
Signed-off-by: Richard Liu <xuegang.liu@freescale.com>
(cherry picked from commit d69c57557a2ef782d0daa617a30945f41a608fd5)

7 years agoMLK-12277 media: camera: add check for width and height against 0
Robby Cai [Mon, 21 Mar 2016 10:53:09 +0000 (18:53 +0800)]
MLK-12277 media: camera: add check for width and height against 0

when do vte test it meets follow dump in small probability.
Add against-0 check to resovle this.

$ v4l_emma.sh 1 1
$ v4l_emma.sh 1 9

------------[ cut here ]------------
:  /dev/video1 Set PARM sucessfulWARNING: CPU: 0 PID: 1123 at /home/bamboo/build/4.1.X-1.0.0_ga/fsl-
imx-fb/temp_build_dir/build_fsl-imx-fb/tmp/work-shared/imx6qdlsolo/kernel-source/mm/page_alloc.c:266
5 __alloc_pages_nodemask+0x3c8/0x894()
ly
v4l_capture_testapp    0  TINModules linked in:FO  :  /dev/video1 input formatti mx6s_captureng pass
v4l_capture_testapp    0 ov5640_camera  TINFO  :  PRP_ENC_ON_D gpRGBcon evbugv_buf malloc pass!

CPU: 0 PID: 1123 Comm: v4l2_capture_em Not tainted 4.1.8-1.0.0+g87e6c2f #1
Hardware name: Freescale i.MX6 Ultralite (Device Tree)
[<80015d84>] (unwind_backtrace) from [<80012728>] (show_stack+0x10/0x14)
[<80012728>] (show_stack) from [<80750a54>] (dump_stack+0x84/0xc4)
[<80750a54>] (dump_stack) from [<80032f3c>] (warn_slowpath_common+0x80/0xb0)
[<80032f3c>] (warn_slowpath_common) from [<80033008>] (warn_slowpath_null+0x1c/0x24)
[<80033008>] (warn_slowpath_null) from [<800b2cc4>] (__alloc_pages_nodemask+0x3c8/0x894)
[<800b2cc4>] (__alloc_pages_nodemask) from [<8001ba3c>] (__dma_alloc_buffer.isra.3+0x2c/0x84)
[<8001ba3c>] (__dma_alloc_buffer.isra.3) from [<8001bab0>] (__alloc_remap_buffer.isra.6+0x1c/0x8c)
[<8001bab0>] (__alloc_remap_buffer.isra.6) from [<8001bd1c>] (__dma_alloc+0x1fc/0x228)
[<8001bd1c>] (__dma_alloc) from [<8001be78>] (arm_dma_alloc+0x8c/0xa0)
[<8001be78>] (arm_dma_alloc) from [<804cd934>] (vb2_dc_alloc+0x68/0x100)
[<804cd934>] (vb2_dc_alloc) from [<804c7df8>] (__vb2_queue_alloc+0x134/0x4d0)
[<804c7df8>] (__vb2_queue_alloc) from [<804ca794>] (__reqbufs.isra.17+0x1a8/0x304)
[<804ca794>] (__reqbufs.isra.17) from [<804b7ac0>] (__video_do_ioctl+0x2b0/0x324)
[<804b7ac0>] (__video_do_ioctl) from [<804b753c>] (video_usercopy+0x1b8/0x480)
[<804b753c>] (video_usercopy) from [<804b3f34>] (v4l2_ioctl+0x118/0x150)
[<804b3f34>] (v4l2_ioctl) from [<800f8360>] (do_vfs_ioctl+0x3e8/0x608)
[<800f8360>] (do_vfs_ioctl) from [<800f85b4>] (SyS_ioctl+0x34/0x5c)
[<800f85b4>] (SyS_ioctl) from [<8000f480>] (ret_fast_syscall+0x0/0x3c)
---[ end trace 55ed68f89eca4805 ]---
mx6s-csi 21c4000.csi: dma_alloc_coherent of size 0 failed

Signed-off-by: Robby Cai <robby.cai@nxp.com>
7 years agoMLK-12573 ARM: dts: set LCD_nPWREN low to make VLCD_3V3 output 3V3.
Robby Cai [Thu, 17 Mar 2016 05:41:38 +0000 (13:41 +0800)]
MLK-12573 ARM: dts: set LCD_nPWREN low to make VLCD_3V3 output 3V3.

Q901 (IRLML6401) is p-channel MOSET, need set pin1 (LCD_nPWREN) to low
to let pin3 output be 3V3. Normally when pin1 is high, then pin3
output should be gated. It was working previously due to some leakage.
Correct the enable logic from the software viewpoint.

Signed-off-by: Robby Cai <robby.cai@nxp.com>
7 years agoMLK-12464-2: ASoC: wm8960: fix clock is not correct after suspend/resume
Shengjiu Wang [Mon, 21 Mar 2016 05:09:26 +0000 (13:09 +0800)]
MLK-12464-2: ASoC: wm8960: fix clock is not correct after suspend/resume

After the suspend/resume, hw_params may be called in bias_level is not
BIAS_ON, then the PLL is not disable/enabled, if the sample rate is
changed, the output clock is not correct.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
7 years agoMLK-12464-1: ASoC: fsl: imx-wm8960: Fix no clock after suspend/resume randomly
Shengjiu Wang [Mon, 21 Mar 2016 02:08:11 +0000 (10:08 +0800)]
MLK-12464-1: ASoC: fsl: imx-wm8960: Fix no clock after suspend/resume randomly

After suspend and resume, the wm8960 codec will change the state from
BIAS_OFF to BIAS_ON, in this time, the hw_free is called, the PLL will be
diabled, and next instance is started in rapid sequence, hw_params is called
But PLL is not enabled, because the bias state is not BIAS_ON.

As PLL is disabled in BIAS_ON->BIAS_STANDBY, so don't need to disable pll
in hw_free of machine driver.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
7 years agoMLK-12420 fix potential head list corruption.
Fancy Fang [Tue, 22 Mar 2016 02:52:27 +0000 (10:52 +0800)]
MLK-12420 fix potential head list corruption.

The head list may be corrupted when two requests from
the same 'pxp_chan' are issued sequentially. So change
the issue_pending function to strictly serialized the
requests to avoid this kind of issue.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-12421 usb: chipidea: fix build warning if disable CONFIG_USB_CHIPIDEA_HOST
Li Jun [Fri, 19 Feb 2016 06:42:19 +0000 (14:42 +0800)]
MLK-12421 usb: chipidea: fix build warning if disable CONFIG_USB_CHIPIDEA_HOST

Fix chipidea usb driver compile warning if CONFIG_USB_CHIPIDEA_HOST
is disabled:
In file included from drivers/usb/chipidea/otg.c:26:0:
drivers/usb/chipidea/host.h:23:13: warning: 'ci_hdrc_host_driver_init'
defined but not used [-Wunused-function]
 static void ci_hdrc_host_driver_init(void)
             ^
  CC      drivers/usb/chipidea/otg_fsm.o
In file included from drivers/usb/chipidea/otg_fsm.c:34:0:
drivers/usb/chipidea/host.h:23:13: warning: 'ci_hdrc_host_driver_init'
defined but not used [-Wunused-function]
 static void ci_hdrc_host_driver_init(void)
             ^

Signed-off-by: Li Jun <jun.li@nxp.com>
7 years agoMLK-11922 i.mx6: Linux 3.14.28 CAAM & SNVS enabled by default.
ulises [Wed, 18 Nov 2015 14:10:26 +0000 (08:10 -0600)]
MLK-11922 i.mx6: Linux 3.14.28 CAAM & SNVS enabled by default.
JTAG, DS-5 attachment causes exceptions

Added properties to device tree, in order to enable and disable
alarms. The following are the available alarms:
-JTAG active
-WatchDOG 2 reset
-Internal Boot
-External Tamper Detection pad

7 years agoMLK-12569 ARM: dts: imx6sx-sabreauto: add pfuze100
Robin Gong [Thu, 17 Mar 2016 08:32:40 +0000 (16:32 +0800)]
MLK-12569 ARM: dts: imx6sx-sabreauto: add pfuze100

Add pfuze100 on imx6sx-sabreauto board to align with v3.14, although
no driver use pfuze100 regulator now.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-12556 dts: i.mx6ul: configure the CMA region by default
Jason Liu [Mon, 14 Mar 2016 08:40:12 +0000 (16:40 +0800)]
MLK-12556 dts: i.mx6ul: configure the CMA region by default

CMA region is a must to avoid the multile memory mapping
for the DMAed memory and also benifit the large continious
phisical memory allocation.

The default value is depend on the target system design and
user cases definition. This is not suitable to put this into
the soc.dtsi, thus we put it into the board DTS.

customer can override the value by changing cma size in DTS file.

Again, customer need set the CMA size correctly according to the
target system. The incorrectly CMA size can cause Linux kernel fail
to boot up.CMA disabled or CMA size set to zero is also not allowed.

Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
7 years agocrypto: testmgr - Disable rfc4543 test
Herbert Xu [Tue, 16 Jun 2015 05:54:16 +0000 (13:54 +0800)]
crypto: testmgr - Disable rfc4543 test

Because the old rfc4543 implementation always injected an IV into
the AD, while the new one does not, we have to disable the test
while it is converted over to the new AEAD interface.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
7 years agoMLK-12509-3 video: mipi_dsi_samsung: add build support for TFT3P5079E panel.
Fancy Fang [Fri, 4 Mar 2016 09:36:13 +0000 (17:36 +0800)]
MLK-12509-3 video: mipi_dsi_samsung: add build support for TFT3P5079E panel.

The 'otm8018b' is the Source Driver IC which is used
by 'TFT3P5079E' panel. This patch is adding the build
support for the 'otm8018b' kernel driver.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-12509-2 video: mipi_dsi_samsung: add 'TFT3P5079E' panel driver.
Fancy Fang [Fri, 4 Mar 2016 09:27:37 +0000 (17:27 +0800)]
MLK-12509-2 video: mipi_dsi_samsung: add 'TFT3P5079E' panel driver.

The 'otm8018b' is the Source Driver IC for 'TFT3P5079E'
mipi panel. This patch is the kernel driver for 'otm8018b'.
No backlight brightness adjustment function, since this is
not supported by imx7d sdb revb board.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Frank Li <frank.li@nxp.com>
7 years agoMLK-12509-1 video: mipi_dsi_samsung: create a new dts for mipi dsi.
Fancy Fang [Thu, 3 Mar 2016 08:00:54 +0000 (16:00 +0800)]
MLK-12509-1 video: mipi_dsi_samsung: create a new dts for mipi dsi.

Create a new dts for the 'TFT3P5079E' mipi panel on
imx7d sabresd revb board.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-12496 bcmdhd: update driver to Broadcom official released version 141.88
Dong Aisheng [Wed, 24 Feb 2016 03:43:08 +0000 (11:43 +0800)]
MLK-12496 bcmdhd: update driver to Broadcom official released version 141.88

Some major fixes delivered by Broadcom.
1. Initialize nd_config parameter of cfg80211_wowlan to NULL
2. Avoid using hardcoded dummy channel number while creating p2p interface
3. Avoid creation of multiple instance of wl_event_handler thread.

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
7 years agoMLK-12415: ARM: imx: imx6q: ddr3 adjust read/write latency from DCD
Adrian Alonso [Thu, 18 Feb 2016 19:36:36 +0000 (13:36 -0600)]
MLK-12415: ARM: imx: imx6q: ddr3 adjust read/write latency from DCD

Adjust high frequence (528M) read/write additional latency settings
from target board initial configuration; Save/restore MMDC_MDMISC
from DCD settings.

Remove hardcodded value to issue a ZQ calibration command.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
(Cherry picked from commit 1036293d72173ef9051ec23babfd4d7f13db4f58)

7 years agoMLK-12400: ARM: imx: imx6q: lppdr2 mmdc timing settings
Adrian Alonso [Wed, 27 Jan 2016 23:49:33 +0000 (17:49 -0600)]
MLK-12400: ARM: imx: imx6q: lppdr2 mmdc timing settings

Add support for saving initial boot mmdc timing settings,
restore timming settings when switching from low to high
lpddr2 ddr frequency.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
(Cherry picked from commit 6787b0fea9eb1ba5cc21e2faf232c3e7d80ac028)

7 years agoMLK-12478-2 dts: imx7d-lpddr3-arm2: add lpsr mode state for flexcan pins
Dong Aisheng [Fri, 4 Mar 2016 10:18:37 +0000 (18:18 +0800)]
MLK-12478-2 dts: imx7d-lpddr3-arm2: add lpsr mode state for flexcan pins

add lpsr mode state for flexcan pins

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
7 years agoMLK-12478-1 can: flexcan: add LPSR mode support
Dong Aisheng [Fri, 4 Mar 2016 08:11:40 +0000 (16:11 +0800)]
MLK-12478-1 can: flexcan: add LPSR mode support

For MX7D LPSR mode, the controller will lost power and got the
configuration state lost after system resume back.
So we need to set pinctrl state again and re-start chip to do
re-configuration after resume.

For wakeup case, we also need re-configure the chip in case the state
got lost. For interface is not up before suspend case, we don't need
re-configure as it will be configured by user later by interface up.

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
7 years agoMLK-12462 mmc: sdhci-esdhc-imx: only force remove for available cards
Dong Aisheng [Tue, 1 Mar 2016 10:28:15 +0000 (18:28 +0800)]
MLK-12462 mmc: sdhci-esdhc-imx: only force remove for available cards

Do sanity check before calling mmc_force_remove.
BCM WiFi driver will call wifi_card_detect(false) if probe fails
due to no card exists on board.

This is needed for Android BSP since Android has builtin WiFi drver
and some boards may not have WiFi cards pluged.
Then the kernel dump likes follows may appear.
----------------------------------------------
dhd_module_init in
Power-up adapter 'DHD generic adapter'
wifi_platform_bus_enumerate device present 1
mmc1: mmc_rescan_try_freq: trying to init card at 400000 Hz
mmc1: mmc_rescan_try_freq: trying to init card at 300000 Hz
mmc1: mmc_rescan_try_freq: trying to init card at 200000 Hz
mmc1: mmc_rescan_try_freq: trying to init card at 100000 Hz
failed to power up DHD generic adapter, 3 retry left
wifi_platform_bus_enumerate device present 0
------------[ cut here ]------------
Kernel BUG at 8051247c [verbose debug info unavailable]
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
Modules linked in: bcmdhd(+) ov5642_camera ov5640_camera_mipi_int ov5640_camera_int mxc_v4l2_capture ipu_bg_overlay_sdc ipu_still v4l2_int_device mxc_dcic ipu_prp_enc ipu_csi_enc ipu_fg_overlay_sdc evbug
CPU: 3 PID: 1071 Comm: modprobe Not tainted 4.1.15-01591-g1393481 #1504
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
task: a99be880 ti: a8dd8000 task.ti: a8dd8000
PC is at mmc_sdio_remove+0x70/0x74
LR is at mmc_sdio_force_remove+0xc/0x34
pc : [<8051247c>]    lr : [<8051248c>]    psr: 60070013
sp : a8dd9d00  ip : 00000000  fp : 00000000
r10: 7f100c98  r9 : 00000000  r8 : 7f0fc410
r7 : a8dd9d48  r6 : a83b1800  r5 : 00000000  r4 : a83b1800
r3 : 00000000  r2 : 00000000  r1 : 809b50c8  r0 : 00000000
Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
Control: 10c53c7d  Table: 38cdc04a  DAC: 00000015
Process modprobe (pid: 1071, stack limit = 0xa8dd8210)
Stack: (0xa8dd9d00 to 0xa8dda000)
9d00: 00000000 a83b1800 00000000 00000000 a8dd9d48 8051248c 00000000 7f0ca6cc
9d20: a99be880 a90e6280 00000003 7f0ca920 fffffdfb a81af810 80bb570c 00000000
9d40: 00020002 00000000 a8dd9d48 a8dd9d48 00000000 7f100c98 7f100c98 a90e6280
9d60: fffffdfb 00000008 00000000 7f0fe490 56f19f1c 7f0cabe4 80bb6d74 a81af810
9d80: 7f0fe248 8037f864 8037f820 80bb6d74 a81af810 00000000 7f0fe248 8037e118
9da0: a81af810 7f0fe248 a81af844 80b1e8b0 00000000 8037e328 00000000 7f0fe248
9dc0: 8037e29c 8037c660 a8025c5c a8187a34 7f0fe248 a9547780 00000000 8037d8b4
9de0: 7f0f5028 7f0fe248 00000000 7f0fe248 00000000 a90e6280 80ba78f4 8037e92c
9e00: 00000000 7f100c98 00000000 7f0cb02c 00000000 80af7720 80af7720 a90e6280
9e20: 7f124000 00000000 00000001 80009730 00000000 8040003b abc7db80 800e1c68
9e40: 00000000 a935c340 8040003a abc83180 ab757000 80af257c 00000001 8040003a
9e60: 00000001 00000001 a8dd9e7c 80af2260 a8001f00 80af46c0 56f19f1c 800e32a0
9e80: 7f0fe448 a90e6108 a90e6240 7f0fe448 a90e6100 7f0fe490 56f19f1c 8078b2b0
9ea0: 7f0fe448 a90e6100 a8dd9f58 a90e6108 00000001 80092dd8 7f0fe454 00007fff
9ec0: 800902a8 a8928900 7f0fe490 00000000 7f0fe590 000015fa c1754bfc 7f0fe590
9ee0: c16d8000 000c823c 05de516a 00000000 0000000e 00000000 00000000 00000000
9f00: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
9f20: 00000000 00000000 00000000 00000000 00000648 00000000 00000003 01111348
9f40: 0000017b 8000f644 a8dd8000 00000000 00000073 8009352c c16d8000 000c823c
9f60: c175456c c17543a5 c17957ec 0007ad30 0008f7c0 00000000 00000000 00000000
9f80: 0000002a 0000002b 0000001f 00000023 00000014 00000000 01111348 00000000
9fa0: 00000000 8000f4c0 01111348 00000000 00000003 01111348 00000000 00040000
9fc0: 01111348 00000000 00000000 0000017b 00000000 01111218 00000073 00000073
9fe0: 7ec5d950 7ec5d940 0001f0dc 76ecf610 600d0010 00000003 00000000 00000000
[<8051247c>] (mmc_sdio_remove) from [<8051248c>] (mmc_sdio_force_remove+0xc/0x34)
[<8051248c>] (mmc_sdio_force_remove) from [<7f0ca6cc>] (wifi_platform_bus_enumerate+0x54/0x90 [bcmdhd])
[<7f0ca6cc>] (wifi_platform_bus_enumerate [bcmdhd]) from [<7f0ca920>] (dhd_wifi_platform_load+0x17c/0x39c [bcmdhd])
[<7f0ca920>] (dhd_wifi_platform_load [bcmdhd]) from [<7f0cabe4>] (wifi_plat_dev_drv_probe+0xa4/0x124 [bcmdhd])
[<7f0cabe4>] (wifi_plat_dev_drv_probe [bcmdhd]) from [<8037f864>] (platform_drv_probe+0x44/0xa4)
[<8037f864>] (platform_drv_probe) from [<8037e118>] (driver_probe_device+0x174/0x2b4)
[<8037e118>] (driver_probe_device) from [<8037e328>] (__driver_attach+0x8c/0x90)
[<8037e328>] (__driver_attach) from [<8037c660>] (bus_for_each_dev+0x6c/0xa0)
[<8037c660>] (bus_for_each_dev) from [<8037d8b4>] (bus_add_driver+0x148/0x1f0)
[<8037d8b4>] (bus_add_driver) from [<8037e92c>] (driver_register+0x78/0xf8)
[<8037e92c>] (driver_register) from [<7f0cb02c>] (dhd_wifi_platform_register_drv+0x1cc/0x20c [bcmdhd])
[<7f0cb02c>] (dhd_wifi_platform_register_drv [bcmdhd]) from [<80009730>] (do_one_initcall+0x8c/0x1d4)
[<80009730>] (do_one_initcall) from [<8078b2b0>] (do_init_module+0x5c/0x1a8)
[<8078b2b0>] (do_init_module) from [<80092dd8>] (load_module+0x177c/0x1d4c)
[<80092dd8>] (load_module) from [<8009352c>] (SyS_finit_module+0x64/0x74)
[<8009352c>] (SyS_finit_module) from [<8000f4c0>] (ret_fast_syscall+0x0/0x3c)
Code: e3a03000 e58631f8 e5863228 e8bd80f8 (e7f001f2)
---[ end trace 6f28ec270544e09e ]---
Segmentation fault
root@imx6qdlsolo:~#

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
7 years agoMLK-12481 pci: imx: turn off pcie clks when link down
Richard Zhu [Tue, 1 Mar 2016 03:24:37 +0000 (11:24 +0800)]
MLK-12481 pci: imx: turn off pcie clks when link down

In order to save power consumption, turn off pcie clks/regulators
if there is no pcie link at all.
Summit this patch, because of that MLK-12278
doesn't turn off the clks/regulators actually.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
7 years agoRevert "mmc: block: don't use parameter prefix if built as module"
Ulf Hansson [Thu, 11 Feb 2016 15:42:58 +0000 (16:42 +0100)]
Revert "mmc: block: don't use parameter prefix if built as module"

This reverts commit 829b6962f7e3cfc06f7c5c26269fd47ad48cf503.

Revert this change as it causes a sysfs path to change and therefore
introduces and ABI regression. More precisely Android's vold is not being
able to access /sys/module/mmcblk/parameters/perdev_minors any more, since
the path becomes changed to: "/sys/module/mmc_block/..."

Fixes: 829b6962f7e3 ("mmc: block: don't use parameter prefix if built as
module")
Reported-by: John Stultz <john.stultz@linaro.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit a5ebb87db84392edfd3142c3a6a78431d820a789)

7 years agoMLK-12480 dts: imx7d-12x12-lpddr3-arm2: remove extended enet dts file
Fugang Duan [Wed, 2 Mar 2016 02:17:02 +0000 (10:17 +0800)]
MLK-12480 dts: imx7d-12x12-lpddr3-arm2: remove extended enet dts file

There have two same extended enet dts file to enable fec2 port, so
remove the redundant enet dts file.

The issue is caused by the commit 370426c2a918 that was cherry picked
after commit b74c6b9c7fdc.

Signed-off-by: Fugang Duan <B38611@freescale.com>
7 years agoMLK-12462-2 dts: imx: add pm-ignore-notify for WiFi card
Dong Aisheng [Fri, 26 Feb 2016 10:19:38 +0000 (18:19 +0800)]
MLK-12462-2 dts: imx: add pm-ignore-notify for WiFi card

MMC core pm_notify will re-detect card after system suspend/resume,
regardless of post-cd claim.
Since in current MMC implement, non-removeable card only detects once,
this will break post card detect which happens next.
e.g. when we suspend/resume system first, then load Broadcom wifi module,
we will get below dump:

root@imx6qdlsolo:/mnt/nfs/vte_IMX6QP-Sabre-SD# modprobe bcmdhd firmware_path=/lib/firmware/bcm/ZP_BCM4339/fw_bcmdhd.bin nvram_path=/lib/firmware/bcm/ZP_BCM4339/bcmdhd.ZP.SDIO.cal
dhd_module_init in
Power-up adapter 'DHD generic adapter'
wifi_platform_bus_enumerate device present 1
failed to power up DHD generic adapter, 3 retry left
wifi_platform_bus_enumerate device present 0
-----------[ cut here ]-----------
Kernel BUG at 80513170 [verbose debug info unavailable]
Internal error: Oops - BUG: 0 1 PREEMPT SMP ARM
Modules linked in: bcmdhd ov5642_camera ov5640_camera_mipi_int ov5640_camera_int mxc_v4l2_capture mxc_dcic ipu_bg_overlay_sdc ipu_still v4l2_int_device ipu_prp_enc ipu_csi_enc ipu_fg_overlay_sdc
CPU: 1 PID: 1487 Comm: modprobe Not tainted 4.1.15-1.0.0+g54cf6a2 #1
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
task: a881e3c0 ti: a9152000 task.ti: a9152000
PC is at mmc_sdio_remove+0x7c/0x80
LR is at mmc_sdio_force_remove+0xc/0x34
pc : [<80513170>] lr : [<80513180>] psr: 60030013
sp : a9153d28 ip : 00000000 fp : 00000000
r10: 00000000 r9 : 00000000 r8 : 7f0f76e0
r7 : a9153d58 r6 : 00000000 r5 : 00000000 r4 : a83f1800
r3 : 00000000 r2 : 00000000 r1 : 809c02f4 r0 : a83f1800
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 10c53c7d Table: 38d7804a DAC: 00000015
Process modprobe (pid: 1487, stack limit = 0xa9152210)
Stack: (0xa9153d28 to 0xa9154000)
3d20: 00000000 7f0c569c a9ffe440 00000003 00000000 7f0c58f4
3d40: a81942c0 8032e33c a8195960 7f0fbf68 00020002 00000000 a9153d58 a9153d58
3d60: fffffdfb 80bc0db4 a81af810 7f0f9518 fffffdfb 00000008 00000000 5624ce5c
3d80: 00000124 80381140 80bc0db4 a81af810 7f0f9518 00000000 00000008 8037f9dc
3da0: a81af810 7f0f9518 a81af844 80b288b0 00000000 8037fbec 00000000 7f0f9518
3dc0: 8037fb60 8037e068 a8025c5c a818fa34 7f0f9518 a20ff280 00000000 8037f16c
3de0: 7f0f0330 a9ffe440 00000000 7f0f9518 a9ffe440 00000000 80bb18f4 803801ec
3e00: 7f0fbf68 a9ffe440 00000000 7f0c5fdc 80b01720 80b01720 a9ffe440 7f11f000
3e20: 00000000 00000001 5624ce5c 80009730 abc7b120 800e316c 000000c8 a9209a00
3e40: 8040003f 00000001 00010000 800b0dfc 000000c8 8040003f abc7dc60 80afc2b0
3e60: abc75880 80afc260 a8001f00 80afe6c0 00000124 800e4944 7f0f9718 00000001
3e80: 7f0f9718 00000001 a9ffeb00 7f0f9718 a9db31c0 8078e47c 7f0f9718 a9db31c0
3ea0: a9153f58 00000001 a9db31c8 80094094 7f0f9724 00007fff 800910d4 00000000
3ec0: 00000000 7f0f9760 00000000 7f0f9860 c0fce8f4 7f0f9724 00000000 8079aa0c
3ee0: c0f07000 000c7944 00b6817a 00000000 0000000e 00000000 00000000 00000000
3f00: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
3f20: 00000000 00000000 00000000 00000000 00000640 00000000 00000003 01608348
3f40: 0000017b 8000f604 a9152000 00000000 01608270 800944f8 c0f07000 000c7944
3f60: c0fce28c c0f83439 c0f99248 0007aff8 0008f968 00000000 00000000 00000000
3f80: 00000029 0000002a 00000020 00000024 00000015 00000000 01608348 00000073
3fa0: 00000000 8000f480 01608348 00000073 00000003 01608348 00000000 00000000
3fc0: 01608348 00000073 00000000 0000017b 01608218 00000000 00000073 01608270
3fe0: 7e9ab8c0 7e9ab8b0 0001f2c0 76eac340 600d0010 00000003 00000000 00000000
[<80513170>] (mmc_sdio_remove) from [<7f0c58f4>] (dhd_wifi_platform_load+0x180/0x39c [bcmdhd])
[<7f0c58f4>] (dhd_wifi_platform_load [bcmdhd]) from [<80381140>] (platform_drv_probe+0x44/0xac)
[<80381140>] (platform_drv_probe) from [<8037f9dc>] (driver_probe_device+0x174/0x2b4)
[<8037f9dc>] (driver_probe_device) from [<8037fbec>] (__driver_attach+0x8c/0x90)
[<8037fbec>] (__driver_attach) from [<8037e068>] (bus_for_each_dev+0x68/0x9c)
[<8037e068>] (bus_for_each_dev) from [<8037f16c>] (bus_add_driver+0x148/0x1f0)
[<8037f16c>] (bus_add_driver) from [<803801ec>] (driver_register+0x78/0xf8)
[<803801ec>] (driver_register) from [<7f0c5fdc>] (dhd_wifi_platform_register_drv+0x1bc/0x208 [bcmdhd])
[<7f0c5fdc>] (dhd_wifi_platform_register_drv [bcmdhd]) from [<80009730>] (do_one_initcall+0x8c/0x1d4)
[<80009730>] (do_one_initcall) from [<8078e47c>] (do_init_module+0x5c/0x1a8)
[<8078e47c>] (do_init_module) from [<80094094>] (load_module+0x1ba8/0x1e50)
[<80094094>] (load_module) from [<800944f8>] (SyS_finit_module+0x80/0x90)
[<800944f8>] (SyS_finit_module) from [<8000f480>] (ret_fast_syscall+0x0/0x3c)

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 2ce993c504798e7fad0910432bd2c6cbd332120d)

7 years agoMLK-12462-1 mmc: core: add MMC_PM_IGNORE_PM_NOTIFY feature
Dong Aisheng [Fri, 26 Feb 2016 10:02:22 +0000 (18:02 +0800)]
MLK-12462-1 mmc: core: add MMC_PM_IGNORE_PM_NOTIFY feature

With igore pm notify feature, MMC core will not re-detect card
after system suspend/resume. This is needed for some special cards
like Broadcom WiFi which can't work propertly on card re-detect
after system resume.

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 3a4a074d2ead8044afe42cd0d060fe25564b274c)

7 years agoMA-7685 [#2124] Fix some remaining DEQP EGL CTS failures on GC400T
Richard Liu [Tue, 1 Mar 2016 08:51:01 +0000 (16:51 +0800)]
MA-7685 [#2124] Fix some remaining DEQP EGL CTS failures on GC400T

The root cause of these failures is related with a hardware
ERRATA (onComp2 flop power-up value is 1 instead of 0).
Preview patch c086763024a8117beaa8ea27ee88eaeafd03ef3e in issue
track #1105 is not a fully fix, here implement a DummyDraw to
workaround the hardware ERRATA.

Signed-off-by: Richard Liu <r66033@freescale.com>
7 years agoMLK-11438-4 lcdif: enable lpsr mode
Robby Cai [Thu, 27 Aug 2015 12:34:32 +0000 (20:34 +0800)]
MLK-11438-4 lcdif: enable lpsr mode

restore the pinmux when resume from LPSR mode in suspend.

Signed-off-by: Robby Cai <r63905@freescale.com>
(cherry picked from commit 0462eb2cb8b64508260d9c6daa9f163d68ea6be0)

Conflicts:
drivers/video/mxsfb.c

(cherry picked from commit 8ddaa850df8cc9fe4dda4f505053eaa3f704ef69)

7 years agoMLK-12457 dts: imx7d-12x12-lpddr3-arm2: correct pwm1 pinctrl settings
Fancy Fang [Mon, 29 Feb 2016 10:06:53 +0000 (18:06 +0800)]
MLK-12457 dts: imx7d-12x12-lpddr3-arm2: correct pwm1 pinctrl settings

The pwm1's pin belongs to lpsr iomux. So this should
be corrected.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-12454 ARM: dts: imx7d-12x12-lpddr3-arm2: add adc support
Haibo Chen [Mon, 29 Feb 2016 03:24:47 +0000 (11:24 +0800)]
MLK-12454 ARM: dts: imx7d-12x12-lpddr3-arm2: add adc support

Add ADC support for imx7d-12x12-lpddr3-arm2 board.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 8ed7b52849feced89e8ddcbea49ec7426fa4d8bf)

7 years agoMLK-12466 ARM: dts: imx6ul-14x14-evk-usb-certi: add USB certification dts
Peter Chen [Fri, 26 Feb 2016 08:34:20 +0000 (16:34 +0800)]
MLK-12466 ARM: dts: imx6ul-14x14-evk-usb-certi: add USB certification dts

Below are the differences between standard evk:
- Enable tpl
- Enable software control vbus for otg2 (hardware rework is needed)
- Disable TSC due to the pin conflict with above vbus regulator

Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-11472 sim: imx: set sim1 IOMUX to default state
Gao Pan [Tue, 1 Sep 2015 05:14:08 +0000 (13:14 +0800)]
MLK-11472 sim: imx: set sim1 IOMUX to default state

SIM1 IOMUX is changed into reset state in LPSR mode.As a result,
sim can't work again.

This patch sets sim1 IOMUX to default state after existing from LPSR mode.

(cherry-picked from commit 8e237775cd413645bfd806e4c648954e1a773a2d)

Signed-off-by: Gao Pan <b54642@freescale.com>
7 years agoMLK-11405 spi: imx : sets spi IOMUX to default state
Gao Pan [Thu, 4 Jun 2015 08:57:47 +0000 (16:57 +0800)]
MLK-11405 spi: imx : sets spi IOMUX to default state

SPI IOMUX is changed into reset state in LPSR mode. As a result,
spi can't work again.

This patch sets spi IOMUX to default state.

(cherry-picked from commit 2c8603c31831bb355f6be5b015377fb8fbd89844)

Signed-off-by: Gao Pan <b54642@freescale.com>
7 years agoMLK-12456 ARM: dts : add spi1 IOMUX sleep state
Gao Pan [Fri, 26 Feb 2016 03:36:46 +0000 (11:36 +0800)]
MLK-12456 ARM: dts : add spi1 IOMUX sleep state

Add spi1 IOMUX sleep state in imx7d-12x12-lpddr3-arm2.dts.

Signed-off-by: Gao Pan <pandy.gao@nxp.com>
7 years agoMLK-12399: ARM: imx: imx6q: lpddr2 busfreq audio operation support
Adrian Alonso [Wed, 27 Jan 2016 23:48:20 +0000 (17:48 -0600)]
MLK-12399: ARM: imx: imx6q: lpddr2 busfreq audio operation support

Add 100Mhz (HIGH_AUDIO_CLK) bus frequency support for imx6q lpddr2 targets
On HIGH_AUDIO_CLK busfreq request source dram mmdc clock root from
pll2_pfd2_div_2 to generate 100Mhz operation frequency.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry-picked from commit 5bc118112b36b72ed6b1e75a3760c371b486abec)

7 years agoMLK-12449: mtd: gpmi: fix integer overflow issue
Han Xu [Wed, 24 Feb 2016 20:20:25 +0000 (14:20 -0600)]
MLK-12449: mtd: gpmi: fix integer overflow issue

fix the potential integer overflow issue found by coverify.

Signed-off-by: Han Xu <han.xu@nxp.com>
7 years agoMLK-12443 ARM: imx: disable low power mode before entering LPSR mode
Anson Huang [Wed, 24 Feb 2016 03:57:02 +0000 (11:57 +0800)]
MLK-12443 ARM: imx: disable low power mode before entering LPSR mode

Before entering LPSR mode, as GPC was set to STOP/DSM mode already,
the wfi loop after LPSR mode would cause system enter STOP/DSM mode
first, then SNVS will force PMIC_ON_REQ to low, as SNVS needs IPG
clock to be on before entering SNVS/LPSR mode, so we have to disable
STOP/DSM mode to make sure IPG clock is on before SNVS actually enters
LPSR mode.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
7 years agoMLK-12433: arm: dts: imx: disable tempmon device when cpufreq is disabled
Bai Ping [Tue, 23 Feb 2016 09:04:13 +0000 (17:04 +0800)]
MLK-12433: arm: dts: imx: disable tempmon device when cpufreq is disabled

In the lpddr3-arm2-m4 dts, the I2C1 is disabled, so PMIC is disabled,
the cpufreq is not support. As thermal driver is depended on cpufreq
driver, if cpufreq is not support, the tempmon device can be disabled.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-10983 : ARM: imx: gpc: wait PU LDO ramp before GPU power up on i.mx6qp
Robin Gong [Tue, 26 May 2015 09:08:11 +0000 (17:08 +0800)]
MLK-10983 : ARM: imx: gpc: wait PU LDO ramp before GPU power up on i.mx6qp

Wait PU LDO ramp before GPU power on once system resume back on i.mx6qp,
otherwise, GPU resume may hang.

Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 361af86190c160e0ea66e007c61b18a793149b74)

7 years agoMGS-1633 GPU: Replace CONFIG_PM_RUNTIME with CONFIG_PM
Shawn Xiao [Mon, 22 Feb 2016 07:04:41 +0000 (15:04 +0800)]
MGS-1633 GPU: Replace CONFIG_PM_RUNTIME with CONFIG_PM

Since 4.1, linux kernel has dropped CONFIG_PM_RUNTIME macro. And
CONFIG_PM is used instead. GPU driver should be synced with the change.

Date Feb 22, 2016

Signed-off-by: Shawn Xiao <b49994@freescale.com>
7 years agoMLK-12412 ARM: imx: clk: correct 'csi_sel' settings
Fancy Fang [Thu, 18 Feb 2016 03:16:33 +0000 (11:16 +0800)]
MLK-12412 ARM: imx: clk: correct 'csi_sel' settings

The 'csi_sel' clock is in ccm instead of anatop.
So correct the wrong register address used.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-12430 ARM: imx: enable and bypass pll1_bypass clk before changing arm_podf
Bai Ping [Sun, 21 Feb 2016 06:53:50 +0000 (14:53 +0800)]
MLK-12430 ARM: imx: enable and bypass pll1_bypass clk before changing arm_podf

Before changing the ARM_PODF, the pll1_bypass clock should be enabled and
bypassed to make sure the ARM_PODF can be changed.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agonet: fec: stop the "rcv is not +last, " error messages
Troy Kisky [Fri, 5 Feb 2016 21:52:43 +0000 (14:52 -0700)]
net: fec: stop the "rcv is not +last, " error messages

Setting the FTRL register will stop the fec from
trying to use multiple receive buffers.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
7 years agoMLK-12423: ARM: dts: imx6sl: remove always-on for vddpu
Robin Gong [Mon, 15 Sep 2014 08:13:55 +0000 (16:13 +0800)]
MLK-12423: ARM: dts: imx6sl: remove always-on for vddpu

PU can be dynamically turned off or on, so we need remove
"regulator-always-on" property.

Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit f3c0df15fbecce36cae531a4a919d544f9ea8e2a)
(cherry picked from commit ec113127f090c225dd731383b6fb950c02ae1f0b)

7 years agoMLK-11051 net: phy: mdio_bus: don't call .phy_suspendi() when netdev is NULL
Fugang Duan [Fri, 5 Jun 2015 07:16:23 +0000 (15:16 +0800)]
MLK-11051 net: phy: mdio_bus: don't call .phy_suspendi() when netdev is NULL

In .mdio_bus_phy_may_suspend(), there check netdev is NULL to judge to set
phy to suspend status.

netdev is NULL has three cases:
- phy is not found
- phy is found, match to general phy driver
- phy is found, match to specifical phy driver

Case 1: phy is not found, cannot communicate by MDIO bus.
Case 2: phy is found:
        if phy dev driver probe/bind err, netdev is not __open__ status,
           mdio bus is unregistered.
        if phy is detached, phy had entered suspended status.
Case 3: phy is found, phy is detached, phy had entered suspended status.

So, in here, it shouldn't set phy to suspend by calling mdio bus.

In i.MX6UL evk/arm2 board, if down the ethx interface and do suspend/resume,
system will hang. Because after ethx down all clocks are gated off, for general
phy driver, unbind the phy device, for specifical phy driver, no unbind the
device, and the original driver call mdio bus to set phy to suspend during
system suspend, so system will hang since there have mdio register access.
The patch can fix it.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Conflicts:
drivers/net/phy/mdio_bus.c

7 years agoMLK-10177 arm: imx: add cpuidle driver support for i.MX6DL
Bai Ping [Thu, 29 Jan 2015 13:24:36 +0000 (21:24 +0800)]
MLK-10177 arm: imx: add cpuidle driver support for i.MX6DL

Add cpudile driver support for i.MX6DL.

Signed-off-by: Bai Ping <b51503@freescale.com>
(cherry picked from commit 72809d405ca73f85c0397fa277ba2481512fe521)

7 years agoMLK-12375 ARM: imx: improve ARM power up time for i.MX6UL TO1.1
Anson Huang [Thu, 28 Jan 2016 14:21:52 +0000 (22:21 +0800)]
MLK-12375 ARM: imx: improve ARM power up time for i.MX6UL TO1.1

On i.MX6UL, PGC_CPU_PUPSCR_SW's counter uses IPG/2048 as clock
source, as IPG is at 1.5MHz during low power idle, so the power
up time can be up to 1.3mS which is too long for idle.

Since TO1.1, design team re-define the bit[5], if this bit is
set to 1, the clock will be IPG/32, ~22us, enable this function
for TO1.1, the latency value for low power idle needs to be
adjusted accordingly.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-12371: ARM: imx: suspend-imx7: correct HW_ANADIG_SNVS_MISC_CTRL set
Robin Gong [Tue, 2 Feb 2016 08:30:50 +0000 (16:30 +0800)]
MLK-12371: ARM: imx: suspend-imx7: correct HW_ANADIG_SNVS_MISC_CTRL set

To avoid touch other bits of HW_ANADIG_SNVS_MISC_CTRL , use set/clear register
, and correct the bit29 setting:
  --before: write 1 to toggle DDR power pin to high before enter DDR retention,
            and write 1 again to pull pin to low when exit from DDR retention.
  --now: write 1 to pull DDR power pin to high and write 0 to low.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-10190 ARM: dts: disable disp mix on imx6sl by default
Robby Cai [Sun, 1 Feb 2015 10:11:16 +0000 (18:11 +0800)]
MLK-10190 ARM: dts: disable disp mix on imx6sl by default

The cause is EPDC works not stable if DISP mix is enabled.

Signed-off-by: Robby Cai <r63905@freescale.com>
(cherry picked from commit db5b89bd35d259504da1c15d62f898f1291541e2)

7 years agoMLK-12404-2 mmc: sdhci-esdhc-imx: change SLV_DLY_TARGET to value 0x7
Dong Aisheng [Tue, 16 Feb 2016 11:05:17 +0000 (19:05 +0800)]
MLK-12404-2 mmc: sdhci-esdhc-imx: change SLV_DLY_TARGET to value 0x7

Change SLV_DLY_TARGET to IC recommended value 0x7(4/1 cycle)
according to spec.
The old value 0x1 is not robust and may fail in some critical
circumstance.

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>