Laurentiu Palcu [Fri, 19 Jan 2018 13:04:37 +0000 (15:04 +0200)]
MLK-17634-5: drm: imx: dcss: overlay planes support HDR
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Thu, 25 Jan 2018 09:27:46 +0000 (11:27 +0200)]
MLK-17634-4: drm: move hdr_panel_metadata to drm_hdmi_info
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Mon, 12 Feb 2018 08:09:57 +0000 (10:09 +0200)]
MLK-17634-3: drm: edid: fix hdr infoframe creation routine
The frame->type was overwritten, instead of setting the frame->metadata_type
field.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Fri, 9 Feb 2018 08:07:35 +0000 (10:07 +0200)]
MLK-17634-2: drm: edid: add support for HLG EOTF
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Uma Shankar [Fri, 19 Jan 2018 12:42:00 +0000 (14:42 +0200)]
drm: Enable HDR infoframe support
Enable Dynamic Range and Mastering Infoframe for HDR
content, which is defined in CEA 861.3 spec.
The metadata will be computed based on blending
policy in userspace compositors and passed as a connector
property blob to driver. The same will be sent as infoframe
to panel which support HDR.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Uma Shankar [Mon, 22 Jan 2018 08:06:43 +0000 (10:06 +0200)]
drm: Parse Colorimetry data block from EDID
EA 861.3 spec adds colorimetry data block for HDMI.
Parsing the block to get the colorimetry data from
panel.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Uma Shankar [Wed, 31 May 2017 10:10:55 +0000 (15:40 +0530)]
drm: Implement HDR source metadata set and get property handling
HDR source metadata set and get property implemented in this
patch. The blob data is received from userspace and saved in
connector state, the same is returned as blob in get property
call to userspace.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Uma Shankar [Wed, 31 May 2017 10:10:54 +0000 (15:40 +0530)]
drm: Add HDR capabilty field to plane structure
Hardware may have HDR capability on certain plane
engines. Enabling the same in drm plane structure
so that this can be communicated to user space.
Each drm driver should set this flag to true for planes
which support HDR.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Uma Shankar [Fri, 19 Jan 2018 10:54:25 +0000 (12:54 +0200)]
drm: Parse HDR metadata info from EDID
HDR metadata block is introduced in CEA-861.3 spec.
Parsing the same to get the panel's HDR metadata.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Uma Shankar [Wed, 31 May 2017 10:10:50 +0000 (15:40 +0530)]
drm: Add CEA extended tag blocks and HDR bitfield macros
Add bit field and macro for extended tag in CEA block. Also,
declare macros for HDR metadata block.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Uma Shankar [Wed, 31 May 2017 10:10:49 +0000 (15:40 +0530)]
drm: Add HDR source metadata property
This patch adds a blob property to get HDR metadata
information from userspace. This will be send as part
of AVI Infoframe to panel.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Laurentiu Palcu [Fri, 19 Jan 2018 07:02:23 +0000 (09:02 +0200)]
MLK-17634-1: drm: imx: dcss: send vblank event from ISR
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Shengjiu Wang [Mon, 26 Feb 2018 07:12:32 +0000 (15:12 +0800)]
MLK-17620-1: hdp: register generic hdmi codec driver
Register generic hdmi codec driver, and move audio related
code to an independent file.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
Laurentiu Palcu [Fri, 23 Feb 2018 10:39:22 +0000 (12:39 +0200)]
MLK-17459-4: drm: imx: dcss: fix weston
This patch fixes an issue introduced by the cropping patches which made
weston look bad. That's because use_dtrc flag was enabled if modifiers
were present. However, graphics plane can have modifiers too. This patch
adds an extra check.
Also, remove an unnecessary debug message.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Wed, 21 Feb 2018 08:00:55 +0000 (10:00 +0200)]
MLK-17459-3: drm: imx: dcss: fixes for compressed format cropping
Cropping of compressed formats seems problematic and we cannot up-align
in this case. For compressed formats we need to down-align both the
width and height.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Mon, 19 Feb 2018 13:58:21 +0000 (15:58 +0200)]
MLK-17459-2: drm: imx: dcss: add cropping functionality and fix odd resolutions
This patch fixes playback for movies with unaligned widths/heights and
adds cropping functionality for tiled formats. Untiled formats will not
have this feature as cropping is a DTRC function.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Tue, 23 Jan 2018 07:56:18 +0000 (09:56 +0200)]
MLK-17459-1: drm: imx: dcss: change ctxld irq handling
To remove any possible latencies introduced by scheduling the bottom
half interrupt handler, do everything in the top half handler and get
rid of the IRQ worker thread handler. Also, that needs all mutexes
changed to spinlocks since mutexes can sleep.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Fancy Fang [Mon, 5 Feb 2018 01:49:02 +0000 (09:49 +0800)]
MLK-17523 drm/imx: dcss: do
dec400d shadow trigger only for primary plane
Since only primary plane has
DEC400D attached to it, the
shadow register trigger for
DEC400D is only necessary to
be done for primary plane update.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Fri, 2 Feb 2018 08:40:24 +0000 (16:40 +0800)]
MLK-17514: drm/imx: dcss: directly bypass
dec400d when no modifier present
When no modifier present, the 'fb->modifier[0]' may contain
undefined value. So it cannot be used to decide whether the
DEC400D should be set to bypass or not in this case.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Sandor Yu [Wed, 31 Jan 2018 09:31:33 +0000 (17:31 +0800)]
MLK-17480: hdp: Change dp_vic to int variable
Change dp_vic to int variable.
sync data type with the return variable of function imx_get_vic_index.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit
bb5bdf30ec7fc61c918e0a956d761e17d79f96ab)
Sandor Yu [Fri, 2 Feb 2018 08:18:52 +0000 (16:18 +0800)]
MLK-17489-4: hdmi arc: Create new imx-arc.c file
Move hdmi arc functions to imx-arc.c from phy configuration file.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Fri, 2 Feb 2018 07:41:14 +0000 (15:41 +0800)]
MLK-17489-3: hdp: use the drm debug log
Use drm debug log function.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Tue, 30 Jan 2018 08:04:58 +0000 (16:04 +0800)]
MLK-17489-2: imx hdp: merge CDN api 1.0.36 code
Merge Cadence HDMI API 1.0.36 code.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Tue, 30 Jan 2018 08:03:55 +0000 (16:03 +0800)]
MLK-17489-1: hdp api: merge CDN api V1.0.36 code
Merge Cadence HDMI API V1.0.36 code.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Fancy Fang [Thu, 1 Feb 2018 15:21:58 +0000 (23:21 +0800)]
MLK-17492 drm/imx:
dec400d: set read config to '0x0' when bypass
dec400d
When the
DEC400D is set to bypass mode from decompressed mode,
the read config should be set to disable compression along with
the control register. Otherwise, the
DEC400D cannot really leave
the decompressed mode. And the value '0x0' is suitable to be set
to read config register in this case.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Thu, 1 Feb 2018 11:22:07 +0000 (19:22 +0800)]
MLK-17490-2 drm/imx:
dec400d: fix wrong path to define 'dcss_dec400d_write()'
The macro 'USE_CTXLD' usage in function 'dcss_dec400d_write()'
is opposite to the real defintion path.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Thu, 1 Feb 2018 11:19:34 +0000 (19:19 +0800)]
MLK-17490-1 drm/imx:
dec400d: fix incorrect register base passed to context loader
The register base of
DEC400D which is passed to context loader
should be the physical address but not the ioremaped virtual
address.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 31 Jan 2018 11:52:40 +0000 (19:52 +0800)]
MLK-17473-7 drm/imx:
dec400d: avoid shadow trigger when bypass
dec400d
Do not really do shadow regiters trigger in'dcss_dec400d_shadow_trig()'
when
dec400d is bypassed, since in 'dcss_dec400d_bypass()', the shadow
registers have already been triggerd.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Laurentiu Palcu [Tue, 23 Jan 2018 07:49:31 +0000 (09:49 +0200)]
MGS-3632-2: drm: imx: dcss: adjust DPR MAX_BYTES_PREQ depending on resolution
Current setting uses a 256 bytes/request for anything less than 1080p.
This works when DTRC is not involved. However, with DTRC, the
MAX_BYTES_PREQ needs to be fine tuned a little.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Fri, 26 Jan 2018 08:31:50 +0000 (10:31 +0200)]
MGS-3632-1: drm: imx: dcss: adjust ratio when WR_SCL kicks in
Using WRSCL for downscaling ratios between 3 and 5 can lead to more
DDR bandwidth beeing used (~400MB/s).
Hence, use WR_SCL only for downscaling ratios from 5 to 7.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Fancy Fang [Tue, 30 Jan 2018 07:36:50 +0000 (15:36 +0800)]
MLK-17473-6 drm/imx: dcss: remove 'allow_fb_modifiers' assignment
Since the 'allow_fb_modifiers' has been assigned to be true in
imx drm core driver in bind(), it is not necessary to set this
flag again here.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Thu, 25 Jan 2018 10:43:24 +0000 (18:43 +0800)]
MLK-17473-5 drm/imx: core: allow fb modifiers for DCSS
Set the 'allow_fb_modifiers' flag to be true when DCSS
exists to make the format modifiers blob data can be
created correctly during the plane initialization.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Tue, 23 Jan 2018 14:17:23 +0000 (22:17 +0800)]
MLK-17473-4 drm/imx: dcss: handle tiled and compressed layout for primary plane
Add handling code to support tiled and compressed pixel source
layout. The tiled only layout will bypass
DEC400D and be resolved
by DPR, since
DEC400D is only responsible for decompression.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Mon, 22 Jan 2018 08:44:45 +0000 (16:44 +0800)]
MLK-17473-3 drm/imx: dcss: remove 'dcss_plane_mod_supported()'
The 'dcss_plane_mod_supported()' function is duplicated with
another function 'dcss_plane_format_mod_supported()'. So remove
it and use 'dcss_plane_format_mod_supported()' to replace its
calling.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Thu, 18 Jan 2018 06:30:51 +0000 (14:30 +0800)]
MLK-17473-2 drm/imx: dcss: add modifiers support for primary plane
Add four possible modifiers 'linear', 'tiled', 'super tiled'
and 'compressed super tiled' for the primary plane which can
be de-compressed by
DEC400D and de-tiled by DPR. And also
change the 'dcss_plane_format_mod_supported()' to handle these
modifiers.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Fancy Fang [Wed, 17 Jan 2018 09:00:23 +0000 (17:00 +0800)]
MLK-17473-1 drm/fourcc: add modifier for vivante compressed tiled layout
Add a new fb modifier for Vivante compressed and tiled
pixle layout which can be decompressed by
DEC400D module
in DCSS.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Sandor Yu [Fri, 22 Dec 2017 10:10:31 +0000 (18:10 +0800)]
MLK-17289-5: hdmi cec: change cec driver architecture
Change hdmi cec driver architecture.
Embedded cec function to hdmi driver.
Rewrite cec_read and cec_write fucntion
to support both imx8qm and imx8mq cec.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Also include MLK-17289-6: hdp drm: Add cec register/unregister function
Add cec register/unregister function in hdp drm driver.
Add is_cec variable to check cec function setting in dtb.
Squashed MLK-17289-5 and MLK-17289-6 from imx_4.9.y because they only
build together.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Sandor Yu [Fri, 22 Dec 2017 10:08:24 +0000 (18:08 +0800)]
MLK-17289-4: hdp api: Add hdmi cec base address
Add hdmi cec base address.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Fri, 22 Dec 2017 10:07:53 +0000 (18:07 +0800)]
MLK-17289-3: hdmi fb: change mem variable type
Change mem variable type.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Fri, 22 Dec 2017 10:06:43 +0000 (18:06 +0800)]
MLK-17289-2: hdp drm: Add mem variable
Add mem variable in struct imx_hdp,
and move regs_base and ss_base to struct mem.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Fri, 22 Dec 2017 10:04:58 +0000 (18:04 +0800)]
MLK-17289-1: hdp: change struct mem variable type to pointer
Change struct mem variable type to pointer in struct state.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Mon, 29 Jan 2018 08:43:16 +0000 (16:43 +0800)]
MLK-17468-2: hdp: Enable imx8qm hdmi/dp 4kp30 support
Add link rate select function.
Change max support pixel clock rate to 297MHz(4kp30).
Because edid read function is not enabled.
For such TV that max support 1080p60 or 720p60,
the followed cmdline mode should be added to kernel boot args:
video=HDMI-A-1:1920x1080-32@60 or
video=HDMI-A-1:1280x720-32@60
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Mon, 29 Jan 2018 08:41:21 +0000 (16:41 +0800)]
MLK-17468-1: dptx: remove CDN_API_Get_PIXEL_FREQ_KHZ_ClosetVal
Remove CDN_API_Get_PIXEL_FREQ_KHZ_ClosetVal function,
replace with vic_table.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Thu, 25 Jan 2018 08:27:54 +0000 (16:27 +0800)]
MLK-17461-3: hdp: Remove pixel clock root setting
HDMI pixel clock reparent function have implemented in dts,
remove clock root set function from hdp driver.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Sandor Yu [Wed, 24 Jan 2018 11:23:04 +0000 (19:23 +0800)]
MLK-17456-2: hdmi: Remove debug log
Remove debug log
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Wed, 24 Jan 2018 11:18:16 +0000 (19:18 +0800)]
MLK-17456-1: hdp: Enable EDID read function for imx8mq hdmi
-Enable EDID read function for imx8mq hdmi.
-Add video mode check.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Laurentiu Palcu [Fri, 19 Jan 2018 07:49:07 +0000 (09:49 +0200)]
MLK-17401: drm: imx: dcss: fix scaling issue
Under certain circumstances (corner cases) the scaling fractions were
not set properly. This patch fixes this.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Fri, 12 Jan 2018 13:23:38 +0000 (15:23 +0200)]
MLK-17368-4: drm: imx: dcss: add modifier checks
This patch activates modifiers in CRTC and adds checks in the
atomic_check() callback so that only the allowed modifiers are accepted.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Fri, 12 Jan 2018 13:18:51 +0000 (15:18 +0200)]
MLK-17368-3: drm: imx: dcss: Add support for tiled formats
This patch effectively enables DTRC module in DCSS to decode tiled
formats from VPU:
* uncompressed G1;
* uncompressed G2;
* compressed G2;
Compressed G2 formats need to pass on the decompression table offsets,
by using the 'dtrc_dec_ofs' property. This is a 64 bit value like below:
64--------48----------32---------16---------0
|<- chroma table ofs ->|<- luma table ofs ->|
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Fri, 12 Jan 2018 11:56:58 +0000 (13:56 +0200)]
MLK-17368-2: drm: imx: dcss: split dcss_ctxld_write
In order for DTRC to work properly, we need to be able to write the DCTL
registers (to switch banks), just before activating CTXLD. However,
__dcss_ctxld_enable() function is usually called from irq context, or
whn the mutex is taken. Hence, create a function the can be called from
irq context.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Bing Song [Fri, 5 Jan 2018 06:33:51 +0000 (08:33 +0200)]
MLK-17368-1: drm: add fourcc codes for Verisilicon tiled formats
These formats will be used by VPU and DCSS.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Tue, 19 Dec 2017 11:38:44 +0000 (13:38 +0200)]
MLK-17257-2: drm: imx: dcss: use the WRSCL/RDSRC modules
This patch makes the necessary changes so that, for downscaling ratios
more than 3:1 and up to 7:1 (for video) and 5:1 (for graphics), the
WRSCL/RDSRC path will be used. This way the DRAM bandwidth will be lower
and spread evenly across the frame time.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Tue, 19 Dec 2017 11:33:32 +0000 (13:33 +0200)]
MLK-17257-1: drm: imx: dcss: Add WRSCL/RDSRC modules
WRSCL and RDSRC modules will be needed when downscaling ratios starting
from 3:1 up to 7:1 are needed. Otherwise, if the usual scaling path is
used, the DRAM bandwidth needed will be too much and performance will be
affected.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Wed, 20 Dec 2017 13:13:33 +0000 (15:13 +0200)]
MLK-17274: drm: imx: dcss: use_global_alpha not working if channel
already enabled
If the channel is already enabled, or it doesn't need a mode set, then
the dcss_dtg_global_alpha_changed() will always return false for formats
with per-pixel alpha. Hence, the plane will not be updated. This patch
removes the check for image format and the check will be done for all
image formats.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Mon, 18 Dec 2017 06:22:25 +0000 (08:22 +0200)]
MLK-17232-2: drm: imx: dcss: ignore SB_PEND_DISP_ACTIVE interrupt
There is a logic error in the DCSS B0 silicon and this interrupt does
not behave as it's supposed to. Ignore for now.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Thu, 14 Dec 2017 13:35:02 +0000 (15:35 +0200)]
MLK-17232-1: drm: imx: dcss: Fix context loader settings for LCD panel
If the vfront/vback porches are small are vsync length is small, the
dis_ulc_y is also small. Hence, the DB trigger setting will be
inappropriate and the DB context will not be able to load in time.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Tue, 12 Dec 2017 11:08:36 +0000 (13:08 +0200)]
MLK-17231-3: drm: imx: dcss: drop runtime autosuspend feature
This was needed when using the mode_set_nofb() callback. Since
everything was moved to crtc_enable() callback, runtime autosuspend
can be dropped.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Tue, 12 Dec 2017 11:06:35 +0000 (13:06 +0200)]
MLK-17231-2: drm: imx: dcss: Do not use mode_set_nofb callback
This callback is not suitable for drivers using runtime PM. Move
everything in the crtc_enable() callback.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Tue, 12 Dec 2017 10:13:27 +0000 (12:13 +0200)]
MLK-17231-1: drm: imx: dcss: set own KMS commit_tail callback
According to documentation, for the default commit_tail helper:
* Note that the default ordering of how the various stages are called is to
* match the legacy modeset helper library closest. One peculiarity of that is
* that it doesn't mesh well with runtime PM at all.
*
* For drivers supporting runtime PM the recommended sequence is instead ::
*
* drm_atomic_helper_commit_modeset_disables(dev, state);
*
* drm_atomic_helper_commit_modeset_enables(dev, state);
*
* drm_atomic_helper_commit_planes(dev, state,
* DRM_PLANE_COMMIT_ACTIVE_ONLY);
This patch creates our own commit_tail() callback and changes the order of the
commit_modeset callbacks, as instructed.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Oliver Brown [Thu, 14 Dec 2017 00:16:08 +0000 (18:16 -0600)]
MLK-17206 hdp: Disable firmware hdp loading
Disabling HDP firmware loading except for debug.
Added simple checks to test HDP firmware status.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Sandor Yu [Mon, 11 Dec 2017 09:10:48 +0000 (17:10 +0800)]
MLK-17107-03: hdp: return unknow status if cable detect failed
Return unknow status to connector if hdp cable detect function
failed to get cable status.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit
d16c633b1be1326b3583632c5279ea6b34ed3ec2)
Sandor Yu [Mon, 11 Dec 2017 08:32:29 +0000 (16:32 +0800)]
MLK-17107-02: hdmi: Add api function return check
Add api function return check to hdmi api call.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit
cba6f4fc6f382731fabf938fb9e03db1c17b1666)
Conflicts:
drivers/gpu/drm/imx/hdp/imx-hdmi.c
Sandor Yu [Mon, 11 Dec 2017 08:27:38 +0000 (16:27 +0800)]
MLK-17107-01: hdp api: Add return value check for hdmi api
Add return value check for hdmitx api.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit
fa29a23b5327e2739389c12e3d6ae54298c10c2f)
Conflicts:
drivers/mxc/hdp/API_HDMITX.c
Laurentiu Palcu [Fri, 8 Dec 2017 13:54:19 +0000 (15:54 +0200)]
MLK-17805: drm: imx: dcss: fix resume without HDMI cable
When no HDMI cable is in, the device is runtime suspended. Hence,
there's nothing to resume in this case.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Fri, 8 Dec 2017 12:42:05 +0000 (14:42 +0200)]
MLK-17140-2: drm: imx: dcss: Change CTXLD trigger values
After activating the PM QoS, the old triggers didn't work anymore. Also,
this will remove a hardcoded value that might not work for all
resolutions.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Thu, 7 Dec 2017 10:57:19 +0000 (12:57 +0200)]
MLK-17140-1: drm: imx: dcss: add PM QoS
PM QoS is needed so that cpuidle doesn not influence DCSS performance.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Wed, 6 Dec 2017 09:03:50 +0000 (11:03 +0200)]
MMFMWK-7806: drm: imx: dcss: check up/down scale ratios
When scaling up/down, DCSS has limits that cannot be exceeded. This
patch adds checks before the plane is updated and rejects those planes
that exceed the up/down scale limits.
Currently, the limit is 3:1 for downscaling and 1:3 for upscaling for
both video and graphics channels.
When support for WR_SCL/RD_SRC will be added, these limits will increase
to the following values:
* video: 7:1 downscale, 1:7 upscale
* graphics: 5:1 downscale, 1:5 upscale
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Liu Ying [Thu, 3 Aug 2017 08:00:46 +0000 (16:00 +0800)]
MLK-15110-1 drm/fourcc: Add Amphion tiled layout format modifier
Amphion VPU has a tiled layout using 8x128 pixel vertical strips,
where each strip contains 1x16 groups of 8x8 pixels in a row-major layout.
Signed-off-by: Song Bing <bing.song@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Sandor Yu [Fri, 8 Dec 2017 08:16:48 +0000 (16:16 +0800)]
MLK-17126-4: hdp: Fix V/Hsync polarity issue
Remove v/hsync polarity adjust function.
Add pixel link mux configuration function for imx8qm.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Fri, 8 Dec 2017 08:41:21 +0000 (16:41 +0800)]
MLK-17126-3: hdmi api: Fix h/v sync polarity issue
Fix H/V Sync polarity issue.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Thu, 7 Dec 2017 10:04:03 +0000 (18:04 +0800)]
MLK-17126-2: hdp: Support imx8qm HDMI function
Add phy reset before hdmi/dp phy init.
Reparent hdmi pixel clock to av_pll.
Combine DP and HDMI ipg clock function.
Add DP and HDMI pixel clock set rate function.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Fri, 8 Dec 2017 06:54:26 +0000 (14:54 +0800)]
MLK-17126-1: hdp api: workaround for imx8qm HDMI DDC R/W issue
HDMI DDC R/W function is not supported by imx8qm HDMI FW.
Skip the function for imx8qm before the issue is fixed in FW.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Tue, 28 Nov 2017 10:01:39 +0000 (18:01 +0800)]
MLK-17003: hdmi: More delay need for hdmi phy init
DRM core waits for 50ms for a vblank interrupt to come
after changing the mode. But in video mode change from
4Kp60 to 480p60 case, the VBLANK interrupt is not coming
in 50ms, drm core driver will dump the followed warning
information.
[ 1034.956833] [CRTC:25] vblank wait timed out
[ 1034.961069] ------------[ cut here ]------------
[ 1034.965702] WARNING: CPU: 0 PID: 3485 at
/home/bamboo/build/4.9.51-8mq-beta/fsl-imx-internal-xwayland/temp_build_dir/build_fsl-imx-internal-xwayland/tmp/work-shared/imx8mqevk/kernel-source/drivers/gpu/drm/drm_atomic_helper.c:1140
drm_atomic_helper_wait_for_vblanks+0x230/0x238
[ 1034.990111] Modules linked in: 8021q garp stp mrp galcore(O) ipv6
[ 1034.996289]
[ 1034.997785] CPU: 0 PID: 3485 Comm: modetest Tainted: G W O
4.9.51-imx_4.9.51_imx8m_beta+gaf29127 #1
[ 1035.007783] Hardware name: Freescale i.MX8MQ EVK (DT)
[ 1035.012832] task:
ffff8000b6c49900 task.stack:
ffff8000b64cc000
[ 1035.018751] PC is at drm_atomic_helper_wait_for_vblanks+0x230/0x238
[ 1035.025016] LR is at drm_atomic_helper_wait_for_vblanks+0x230/0x238
[ 1035.031281] pc : [<
ffff0000085a6b08>] lr : [<
ffff0000085a6b08>]
pstate:
00000145
[ 1035.038673] sp :
ffff8000b64cfa50
[ 1035.041985] x29:
ffff8000b64cfa50 x28:
0000000000000000
[ 1035.047316] x27:
0000000000000000 x26:
ffff8000b86c4820
[ 1035.052646] x25:
0000000000000090 x24:
0000000000006d57
[ 1035.057976] x23:
0000000000000018 x22:
ffff8000b86c3800
[ 1035.063306] x21:
ffff8000b955fc00 x20:
ffff8000b64f1180
[ 1035.068637] x19:
0000000000000000 x18:
0000000000000010
[ 1035.073967] x17:
0000000000000000 x16:
0000000000000000
[ 1035.079297] x15:
0000000000000006 x14:
ffff00008937abc7
[ 1035.084628] x13:
ffff00000937abd5 x12:
0000000000000007
[ 1035.089959] x11:
000000000000022f x10:
0000000005f5e0ff
[ 1035.095289] x9 :
0000000000000230 x8 :
6974207469617720
[ 1035.100619] x7 :
6b6e616c6276205d x6 :
ffff00000937abf6
[ 1035.105949] x5 :
0000000000000000 x4 :
0000000000000000
[ 1035.111279] x3 :
0000000000000000 x2 :
ffff8000b64cc000
[ 1035.116609] x1 :
ffff8000b64cc000 x0 :
000000000000001f
[ 1035.121938]
[ 1035.123428] ---[ end trace
d3bf25e791b7a9c7 ]---
[ 1035.128043] Call trace:
[ 1035.130488] Exception stack(0xffff8000b64cf880 to 0xffff8000b64cf9b0)
[ 1035.136928] f880:
0000000000000000 0001000000000000 ffff8000b64cfa50
ffff0000085a6b08
[ 1035.144756] f8a0:
0000000000000002 0000000000000004 ffff00000937cfe8
000000000000001f
[ 1035.152584] f8c0:
ffff00000937a000 ffff000008f67838 ffff8000b64cf970
ffff0000081009f0
[ 1035.160412] f8e0:
0000000000000000 ffff8000b64f1180 ffff8000b955fc00
ffff8000b86c3800
[ 1035.168240] f900:
0000000000000018 0000000000006d57 0000000000000090
ffff8000b86c4820
[ 1035.176067] f920:
000000000000001f ffff8000b64cc000 ffff8000b64cc000
0000000000000000
[ 1035.183895] f940:
0000000000000000 0000000000000000 ffff00000937abf6
6b6e616c6276205d
[ 1035.191723] f960:
6974207469617720 0000000000000230 0000000005f5e0ff
000000000000022f
[ 1035.199551] f980:
0000000000000007 ffff00000937abd5 ffff00008937abc7
0000000000000006
[ 1035.207377] f9a0:
0000000000000000 0000000000000000
[ 1035.212255] [<
ffff0000085a6b08>]
drm_atomic_helper_wait_for_vblanks+0x230/0x238
[ 1035.219562] [<
ffff0000085a96a0>]
drm_atomic_helper_commit_tail+0x50/0x68
[ 1035.226261] [<
ffff0000085a971c>] commit_tail+0x64/0x80
[ 1035.231398] [<
ffff0000085a97f8>] drm_atomic_helper_commit+0xa8/0x108
[ 1035.237752] [<
ffff0000085ec468>] dcss_drm_atomic_commit+0x100/0x148
[ 1035.244018] [<
ffff0000085c8308>] drm_atomic_commit+0x50/0x60
[ 1035.249676] [<
ffff0000085a9d28>]
drm_atomic_helper_set_config+0x88/0xc8
[ 1035.256290] [<
ffff0000085bb5f8>]
drm_mode_set_config_internal+0x68/0xf8
[ 1035.262903] [<
ffff0000085bc9dc>] drm_mode_setcrtc+0x38c/0x450
[ 1035.268649] [<
ffff0000085b3ba8>] drm_ioctl+0x198/0x448
[ 1035.273788] [<
ffff0000081f067c>] do_vfs_ioctl+0xa4/0x748
[ 1035.279099] [<
ffff0000081f0dac>] SyS_ioctl+0x8c/0xa0
[ 1035.284064] [<
ffff000008082f4c>] __sys_trace_return+0x0/0x4
Added more delay for hdmi phy init will fixed the issue.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Laurentiu Palcu [Wed, 29 Nov 2017 11:27:23 +0000 (13:27 +0200)]
MLK-17032-2: drm: imx: dcss: fix runtime suspend/resume
If the DCSS core is runtime suspended, but the display-subsystem is not,
we need to resume the DCSS core before setting up DTG and SUBSAM
modules.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Mon, 27 Nov 2017 07:45:52 +0000 (09:45 +0200)]
MLK-16992-2: drm: imx: dcss: enable/disable all clocks during suspend/resume
Clocks were not properly disabled during suspend. This patch will
disable all clocks during suspend.
Also, remove the hardcoded clocks' rates. These will be set through DTB.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Mon, 27 Nov 2017 06:38:26 +0000 (08:38 +0200)]
MLK-16992-1: drm: imx: dcss: Do not request bus_freq twice
Make sure we request/release the bus_freq exactly once.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Sandor Yu [Fri, 24 Nov 2017 09:59:00 +0000 (17:59 +0800)]
MLK-16946-4: hdp: Add mutex for mailbox access
Add mutex for mailbox access.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Thu, 23 Nov 2017 06:39:53 +0000 (14:39 +0800)]
MLK-16946-2: hdmi: Enable cable hotplug detect function
-Enable HDMI/DP cable hotplug detect function.
-Remove HPD polling thread function.
-Move HDMI/DP FW init and download function
before hdmi drm register.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Thu, 23 Nov 2017 04:26:32 +0000 (12:26 +0800)]
MLK-16946-1: hdp: Reduce timeout counter for hdp functions
Reduce hdp function r/w timeout counter.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Laurentiu Palcu [Fri, 24 Nov 2017 14:59:20 +0000 (16:59 +0200)]
MLK-16953: drm: imx: dcss: Add propriety to change global alpha priority
This patch adds 'use_global_alpha' property to the primary plane, so that
one can choose whether to use global alpha instead of per-pixel alpha,
when the framebuffer has per-pixel alpha.
Framebuffers that do not have per-pixel alpha will always use global
alpha.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Fri, 24 Nov 2017 13:03:28 +0000 (15:03 +0200)]
MLK-16954: drm: imx: dcss: adjust context loader trigger values
Apparently, when DCSS has to fight for data on the bus with other
processes, exists the risk for the scaler to freeze. Previous setting
used the documentation recommendation for setting the DB context loader
trigger time. Unfortunately, with that value, under high stress, the RGB
planes will go black and scaler will freeze.
This patch sets the SB/DB context loader triggers to a values
obtained through repeated tests that proved to provide the best user
experience (i.e. planes will not go black).
However, the underlining issue remains and HW needes to prioritize the
DCSS read operations.
With this workaround, under high stress, the RGB planes may experience
some flickering but they will not freeze.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Sandor Yu [Wed, 22 Nov 2017 07:22:12 +0000 (15:22 +0800)]
MLK-16942-1: hdmi-cec: Update clock rate to 133MHz
After apply HDMI FW ROM patch to mscale B0.
The HDMI core clock will run at 133MHz.
Update hdmi cec clock rate.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit
4198c8f6677eff3e6e50ca17f3d1b7f6e6f8b8c3)
Sandor Yu [Wed, 22 Nov 2017 10:29:31 +0000 (18:29 +0800)]
MLK-16941: hdmi: check video mode with cmdline mode
when EDID function is disabled, the cmdline mode is
the max support video mode.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit
4bdf485762441578a50a1b1586777f1291dd32e5)
Sandor Yu [Wed, 22 Nov 2017 03:37:17 +0000 (11:37 +0800)]
MLK-16932: hdp: Add 720x480p60 video mode support
Add 720x480p60 video mode to default support modelist.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Laurentiu Palcu [Tue, 21 Nov 2017 13:00:28 +0000 (15:00 +0200)]
MLK-16928: drm: dcss: fix modesetting issues
DTG needs to be completely stopped before changing the display
resolution through modesetting. If DTG is not stopped, any change in
resolution could result in unpredictable results, like split screen,
etc.
This patch fixes that by introducing a completion signaling mechanism so
that we can signal the DRM CRTC when DCSS core is done stopping DTG.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Tue, 21 Nov 2017 10:22:18 +0000 (12:22 +0200)]
MLK-16927: drm: imx: dcss: Add basic plane checks
Currently, there are no plane checks and the user can try set up a plane
with a CRTC size that is actually bigger than the current CRTC mode.
Because, currently, the driver does not support cropping, all planes
with CRTC sizes bigger than the actual CRTC mode will be rejected.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Tue, 21 Nov 2017 07:32:25 +0000 (09:32 +0200)]
MLK-16922-2: drm: imx: dcss: call DCSS runtime PM routines
When CRTC is disabled/enabled, the runtime PM routines should be called.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Tue, 21 Nov 2017 07:31:09 +0000 (09:31 +0200)]
MLK-16922-1: drm: dcss: Add DCSS core power management support
This patch support for suspend/resume and runtime PM in DCSS driver
core.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Fri, 10 Nov 2017 08:07:28 +0000 (10:07 +0200)]
MLK-16923-2: drm: imx: dcss: Add possibility to debug BLKCTL registers
When debugging it's useful to be able to see the DCSS registers. BLKCTL
was not added to the list of modules supporting this feature. This patch
adds it.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Fri, 10 Nov 2017 07:52:08 +0000 (09:52 +0200)]
MLK-16923-1: drm: imx: dcss: dont't use static vars in blkctl
If, in the future, a platform will have two DCSS controllers, having
static variables holding various settings will not work out. Add a
private structure instead.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Sandor Yu [Tue, 21 Nov 2017 09:03:28 +0000 (17:03 +0800)]
MLK-16924: hdp: Disable HDP hotplug detect thread temporary
HDMI Fw is unstable, hotplug detect thread may
blocked at hdmi mailbox access.
Disable hotplug detect thread function temporary.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Laurentiu Palcu [Mon, 20 Nov 2017 09:51:13 +0000 (11:51 +0200)]
MLK-16911: drm: imx: dcss: do not advertise modifiers
Since support for tiled formats has not been added to DCSS DRM driver,
do not allow usage of FB modifiers by userspace.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Laurentiu Palcu [Fri, 17 Nov 2017 09:03:52 +0000 (11:03 +0200)]
MLK-16906: drm: imx: core: add possiblity to detect if chip has DCSS
The Mscale Display Controller Subsystem does not support RGB565.
However, the default legacy FB pixel depth is 16. Hence, the users would
have to add a kernel cmdline option to set it to 32bpp:
imxdrm.legacyfb_depth=32
This patch changes imx-drm-core to detect if platform has DCSS and, if
it does, set the FB pixel depth to 32, so that user does not have to.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Sandor Yu [Mon, 20 Nov 2017 09:23:30 +0000 (17:23 +0800)]
MLK-16908-3: hdmi phy: Remove debug log
Remove debug log
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Mon, 20 Nov 2017 09:12:05 +0000 (17:12 +0800)]
MLK-16908-2: hdp: Support video modeset
Add HDMI PHY configurated function to mode set.
Add 720p60, 2160p30 and 2160p60 video mode to default video modes.
Rewrite mode valid function.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Mon, 20 Nov 2017 08:42:12 +0000 (16:42 +0800)]
MLK-16908-1: hdmitx: Support hdmi 2.0 to hdmi 1.4 reconfiguration
Add HDMI 2.0 to HDMI 1.4 reconfiguration.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Shengjiu Wang [Fri, 17 Nov 2017 07:24:06 +0000 (15:24 +0800)]
MLK-16887-1: drm: imx: hdp: add aux config for HDMI ARC
Add aux config for HDMI ARC, the config is from the HDMI usr
guide
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Sandor Yu [Fri, 17 Nov 2017 08:30:53 +0000 (16:30 +0800)]
MLK-16888: hdp audio: support multi-type audio
Add audio_type variable to support different audio type.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Fri, 17 Nov 2017 08:14:07 +0000 (16:14 +0800)]
MLK-16886: hdp: Disable EDID function
Disable EDID function temporary
because edid read is unstable on some boards.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Thu, 16 Nov 2017 03:48:38 +0000 (11:48 +0800)]
MLK-16834-03: hdmi/dp phy: Enable additional PLL loop Amplifier.
Addresses the PLL lock issue found on many devices.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit
5e16126749b90e3e53fc8872b87d310ce808f84e)