Gao Pan [Thu, 13 Apr 2017 09:15:46 +0000 (17:15 +0800)]
MLK-14637 arm: dts: imx6ul: enable sim for imx6ul
enable sim for imx6ul
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Gao Pan [Thu, 13 Apr 2017 06:58:03 +0000 (14:58 +0800)]
MLK-14642 imx: sim: fix segment fault caused by user address access
Kernel space cannot access user space memory directly.
In fact, the issue always exited. Since 4.4, the kernel
handle the action as page abort.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Octavian Purdila [Fri, 7 Apr 2017 10:29:43 +0000 (13:29 +0300)]
MLK-14653 cpufreq: imx6q: reparent pll1_sys to pll1_bypass before changing it's rate
Make sure we reparent pll1_sys to pll1_bypass before changing it's
rate. Otherwise, it may happen that pll1_sys is "parented" to
pll1_bypass_src like this:
osc
pll1 0 0
996000000 0 0
pll1_bypass_src 0 0
24000000 0 0
pll1_bypass 0 0
24000000 0 0
pll1_sys 0 0
24000000 0 0
in which case changing the rate of pll1_sys won't propagate up to pll1
and we will end up with a different pll1_sys rate than requested.
This fixes an issue where cpufreq can't properly switch to 792Mhz:
$ cpufreq-set -f 996000
$ cpufreq-set -f 396000
$ cpufreq-set -f 792000
$ cat /sys/kernel/debug/clk/clk_summary
pll1 1 1
996000000 0 0
pll1_bypass 1 1
996000000 0 0
pll1_sys 1 1
996000000 0 0
pll1_sw 1 1
996000000 0 0
arm 2 2
498000000 0 0
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Adriana Reus [Wed, 12 Apr 2017 10:45:13 +0000 (13:45 +0300)]
MLK-14451: arm: dts: Remove dts entry for sensors in imx7ulp-evk.dts
Sensors are connected to M4 and not to A-Core.
Sensors will not be exposed to A-Core via standard
i2c interface but via an i2c proxy layer over rpmsg.
Remove the dts entry to avoid the probe error messages and
add a separate dts file for the case where someone wishes to
rework the board themselves and connect sensors for testing purposes.
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Octavian Purdila [Tue, 11 Apr 2017 06:31:33 +0000 (09:31 +0300)]
MLK-14668 cpufreq: interactive: check index before using it
This also fixes the following warning:
drivers/cpufreq/cpufreq_interactive.c: In function 'choose_freq':
drivers/cpufreq/cpufreq_interactive.c:284:7: warning: 'ret' may be used uninitialized in this function [-Wmaybe-uninitialized]
if (ret)
^
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Adriana Reus [Thu, 13 Apr 2017 07:47:48 +0000 (10:47 +0300)]
MLK-14451: Documentation: Add dt documentation for fxas2100x and fxos8700
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Leonard Crestez [Wed, 12 Apr 2017 14:05:47 +0000 (17:05 +0300)]
MLK-14586: ARM: imx: Fix path to serial port for pm save/restore
The imx7 sleep code will save and restore UART1 registers on
suspend/resume. It does this by fetching the address base using an
absolute devicetree path. Fix that path in 4.9 where the DTS is closer
to the one in upstream.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Richard Zhu [Mon, 10 Apr 2017 05:36:23 +0000 (13:36 +0800)]
MLK-14644 PCI: imx: toggle the perst after the release of rc's reset
imxcommunity reports that Intel Wireless 3160 doesn't
work if the perst# is toggled before the release of rc
controller's reset.
Specification doesn't specify the exactly sequence of
the toggle of the perst# and the release of the rc
controller reset. Just find the following description
in the chapter 4.2.2 of the PCI Local Bus Specification.
"The system must guarantee that the bus remains in the idle
state for a minimum time delay following the deassertion
of RST# to a device before the system will permit the first
assertion of FRAME#."
Toggle the perst# after the release of rc's reset to
fix the issue.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
(cherry picked from commit
ba75c5e4795ab36d7765fe3ac03f0c4320828c78)
Fancy Fang [Tue, 11 Apr 2017 02:05:35 +0000 (10:05 +0800)]
MLK-14655-5 video: mxsfb: remove ofb var clear when open ofb
Clear the variable screeninfo structure when the overlay
fb is opened has the side effect of deleting timings info
of overlay fb.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
9fd7656d75de224d3e825930cd3f894408fbad40)
Fancy Fang [Tue, 11 Apr 2017 01:45:42 +0000 (09:45 +0800)]
MLK-14655-4 video: mxsfb: check var info during initialization for overlay fb
During overlay fb initialization, check the variable screeninfo
to get some required values for variable screeninfo.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
d2dff36f18a41419055e529bd45d9a264fbc25d5)
Fancy Fang [Tue, 11 Apr 2017 01:24:45 +0000 (09:24 +0800)]
MLK-14655-3 video: mxsfb: copy timings info of primary fb to overlay fb
During overlay fb initialization, copy the timings information
of primary fb to init the timings of overlay fb.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
e47da3a65d32faec2fac7926b50980f0aa822343)
Fancy Fang [Mon, 10 Apr 2017 09:26:48 +0000 (17:26 +0800)]
MLK-14655-2 video: mxsfb: add default videomode for overlayfb
Use the videomode of primary fb as the default videomode
for overlay fb during overlay fb initialization process.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
c3f12ccefc2025fbe4b9280e5715767f6dc72442)
Fancy Fang [Mon, 10 Apr 2017 05:50:51 +0000 (13:50 +0800)]
MLK-14655-1 video: mxsfb: don't clear AS regs when overlay fb release
Don't clear the 'LCDC_AS_CTRL' and 'LCDC_AS_NEXT_BUF' registers
in the function 'overlayfb_release()', since the next user may
enable overlay fb without calling set_par first.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
167b1f430d2bb178d22f32f790d55b08352a6a87)
Gao Pan [Tue, 11 Apr 2017 07:08:19 +0000 (15:08 +0800)]
MLK-14671 input: touch: focaltech: disable debug information
disable debug information for focaltech touch.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
(cherry picked from commit
b88a0ed7837ab964253f710da03fdab481592350)
Fancy Fang [Thu, 6 Apr 2017 06:09:44 +0000 (14:09 +0800)]
MLK-14630 video: mipi_dsi_northwest: refine suspend logic
Move the 'lcd_inited' flag status modification from
'mipi_dsi_disable' to 'mipi_dsi_suspend' to make sure
this flag to be set to 0 during system suspend.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
02d805b48bfb1fc637f9ccce4ed7ae59d62e7d2f)
Fancy Fang [Thu, 23 Mar 2017 06:11:13 +0000 (14:11 +0800)]
MLK-14286-9 video: mipi_dsi_northwest: create a struct to store CM, CN and CO
The mipi pll has three factors to calculate the output clock
frequency. So create a new structure to hold them for convinience.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
27b71152096bb43fd94ce0a8bb047bb85aa6ec84)
Fancy Fang [Mon, 20 Mar 2017 10:54:33 +0000 (18:54 +0800)]
MLK-14286-8 video: mipi_dsi_northwest: enable 640x480@60HZ 24bpp HDMI display mode
Enable 640x480@60Hz 24bpp RGB display mode for ADV7535. And the display
mode cannot be changed dynamically, since the exact pixel clock cannot
be get through current clock subsystem dynamically.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
a602e2adda52a1f6e9a924eff28ebbd657fb9de6)
Fancy Fang [Tue, 21 Mar 2017 09:41:48 +0000 (17:41 +0800)]
MLK-14286-7 ARM: clk: imx7ulp: mpll can only be used by mipi dsi
The mpll can only be configured by mipi dphy and it is disabled
by default. And it is also not a fixed frequency clock source.
So replace it with a dummy clock for 'periph_slow_sels' to avoid
any peripheral except mipi to use it for clock source.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
a7c6555e0d79491b939b84af99969b21264ec9f8)
Conflicts:
arch/arm/mach-imx/clk-imx7ulp.c
Fancy Fang [Tue, 28 Feb 2017 08:16:08 +0000 (16:16 +0800)]
MLK-14286-6 video: mipi_dsi_northwest: add encoder support in dsi
The northwest mipi dsi on imx7ulp board has an ADV7535 dsi-to-hdmi
encoder. Enable the encoder support in the dsi driver.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
a6e2da1935d893860cd389ce8360e89434f5fd50)
Fancy Fang [Tue, 7 Feb 2017 10:27:38 +0000 (18:27 +0800)]
MLK-14286-5 video: ADV7535: add build support.
Add build support for ADV7535 kernel driver.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
124ff1d4de5bc93d5bd2c68ac0fcb4f414b199ef)
Fancy Fang [Tue, 7 Feb 2017 10:24:57 +0000 (18:24 +0800)]
MLK-14286-4 video: ADV7535: implement the initial driver.
Implement the initial driver for the I2C device
ADV7535.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
274e17dd0cb6068a94103c948aa1a032e52b8efa)
Fancy Fang [Tue, 28 Mar 2017 06:47:46 +0000 (14:47 +0800)]
MLK-14286-3 ARM: dts: imx7ulp-evk-hdmi: create the hdmi dts file
Create a new dts file 'imx7ulp-evk-hdmi.dts' to enable hdmi
display to avoids conflict with mipi dsi panel display. Use
endpoint to connect dsi controller and adv7535.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
86fb9340d01a4583628d465f29fba67df93c453c)
Fancy Fang [Tue, 28 Feb 2017 07:08:53 +0000 (15:08 +0800)]
MLK-14286-2 ARM: dts: imx7ulp-evk: add dts support for ADV7535
ADV7535 is a low-power MIPI-DSI receiver with HDMI 1.4 compliant
transmitter. And it's an I2C device attached by lpi2c5.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
0bbfb671445d1f2d5037ea7168ebcb4699760095)
Fancy Fang [Tue, 28 Feb 2017 06:52:48 +0000 (14:52 +0800)]
MLK-14286-1 ARM: dts: imx7ulp: add two new properties for mipi dsi node
Add the 'data-lanes-num' and 'max-data-rate' properties which
are used to describe this mipi dsi capabilites.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
bfe7d0e1c6931467f00a382e48aa592bf50c9339)
Fancy Fang [Mon, 13 Mar 2017 08:11:28 +0000 (16:11 +0800)]
MLK-14260 video: mipi_dsi_northwest: assign the 'mode' field of fb_info.
Assign the 'mode' field of fb_info structure to show correct
content when running "cat /sys/class/graphics/fb0/mode".
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
06a16560683047681c46b680efef7af58c75b6b2)
Fancy Fang [Thu, 9 Mar 2017 04:11:14 +0000 (12:11 +0800)]
MLK-14362-1 video: mipi_dsi_northwest: add VLLS mode support
Add VLLS mode support for NorthWest MIPI DSI controller.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
9a0fb27dc67fb0d156ca6d5a09349b7163cfcfd2)
Fancy Fang [Thu, 9 Mar 2017 03:04:28 +0000 (11:04 +0800)]
MLK-14299-2 video: mxsfb: setup the initial params for overlay fb
The initial params for overlay fb should be setup during
its initialization to make it in a determined state before
using it.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
f3d3d58165f9f36af85a46256cacc274b2d0b107)
Fancy Fang [Thu, 9 Mar 2017 03:04:04 +0000 (11:04 +0800)]
MLK-14299-1 video: mxsfb: clear the overlay fb memory buffer
Clear the overlay fb memory buffer after allocated to avoid
random pixel data in it before using it.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
6b1a31b8fc39c7cf19ff3dcdc57f2f4059632f45)
Fancy Fang [Fri, 24 Feb 2017 01:26:57 +0000 (09:26 +0800)]
MLK-14257 video: mxsfb: fix a deadlock issue for overlay fb
The overlayfb_enable() function would call fb0 info lock,
so in some overlay functions which may call overlay_enable()
should not lock the fb0 info.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
ec53f89c7f702aa56e7fe6f360e23582ed78302f)
Octavian Purdila [Thu, 6 Apr 2017 10:45:42 +0000 (13:45 +0300)]
MLK-14624 cpufreq: imx6q: imx6ull should use the same flow as imx6ul
This fixes an issue with imx6ull where setting the frequency to 528Mhz
would actually set the ARM clock to 324Mhz.
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Octavian Purdila [Fri, 7 Apr 2017 12:06:17 +0000 (15:06 +0300)]
MLK-14594-2 ARM: dts: imx*: avoid duplicate names in lcdif node
This patch fixes the following warning on various imx boards:
OF: Duplicate name in lcdif@......, renamed to "display#1"
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Haibo Chen [Thu, 23 Mar 2017 07:54:20 +0000 (15:54 +0800)]
MLK-14381 mmc: sdhci-esdhc-imx: reset tuning circuit when system resume
USDHC tuning circuit should be reset before every time card enumeration
or re-enumeration.
On imx7ulp-evk board, for SDR104 card, when system suspend in standby
mode, and then resume back, the IO timing is still SDR104 which may
result in card re-enumeration fail in low speed mode (400khz) for some
cards. And we did meet the issue that in certain probability, SDR104
card meet mmc command CRC/Timeout error when send CMD2 during mmc bus
resume.
This patch reset the tuning circuit when the ios timing is
MMC_TIMING_LEGACY/MMC_TIMING_MMC_HS/MMC_TIMING_SD_HS, which means both
mmc_power_up() and mmc_power_off() will reset the tuning circuit.
This patch can cover the 'commit
374da688c65a ("MLK-12345 mmc:
sdhci-esdhc-imx: reset tuning circurt when insert sd card")', and is a
better solution. So use this patch instead.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit
84a6b78bc4e2ccd433b25a4261194b93e6f83323)
Conflicts:
drivers/mmc/host/sdhci-esdhc-imx.c
Haibo Chen [Mon, 10 Apr 2017 08:16:20 +0000 (16:16 +0800)]
MLK-14539 mmc: sdhci: make no-1-8-v also work for DDR52 mode
MMC SDHCI maintainer Adrian Hunter Introduce SDHCI flags for signal
voltage support and set them based on the supported transfer modes,
except in the case where 3V DDR52 is supported but 1.8V is not.
This patch add the support to make eMMC DDR52 only work at 3.3v when
property 'no-1-8-v' defined.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Robin Gong [Fri, 31 Mar 2017 07:53:39 +0000 (15:53 +0800)]
MLK-14610 DMA: fsl-edma-v3: add fsl-edma-v3 support
Add edma-v3 driver on i.mx8qm.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Bai Ping [Tue, 21 Mar 2017 04:08:27 +0000 (12:08 +0800)]
MLK-14238-05 ARM: dts: imx: Add PWM backlight support on i.mx7ulp evk
Add PWM backlight support on i.MX7ULP EVK board.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
[Octavian: fix checkpatch warnings]
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Bai Ping [Tue, 21 Mar 2017 03:22:51 +0000 (11:22 +0800)]
MLK-14238-04 ARM: configs: Enable TPM PWM driver in default config
Enable TPM PWM driver in default config.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Bai Ping [Tue, 21 Mar 2017 03:18:25 +0000 (11:18 +0800)]
MLK-14238-03 ARM: dts: imx: Add pwm device node in dtsi
Add pwm device node in dtsi file.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Bai Ping [Tue, 21 Mar 2017 03:16:18 +0000 (11:16 +0800)]
MLK-14238-02 Doc: bingding: pwm: Add binging doc for tpm-pwm module
Add binding doc for tpm pwm module.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Bai Ping [Tue, 21 Mar 2017 03:12:42 +0000 (11:12 +0800)]
MLK-14238-01 driver: pwm: Add tpm pwm driver support
Add TPM PWM driver support i.MX7ULP.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
[Octavian: updated for 4.9 APIs]
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Richard Zhu [Thu, 30 Mar 2017 09:56:55 +0000 (17:56 +0800)]
MLK-14554 PCI: imx: pcie ep board can't boot up
In the imx pcie ep/rc validation system, the mem
resource parser of ep probe is failed on 4.9.
Change the mem resource parser method from 4.1
to 4.9 to fix this failure.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Ranjani Vaidyanathan [Fri, 31 Mar 2017 21:50:54 +0000 (16:50 -0500)]
MLK-14599-3 arm64:dts:Update VPU and GPU power domains
Update VPU and GPU power domain info in the dts file.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Ranjani Vaidyanathan [Fri, 31 Mar 2017 15:29:19 +0000 (10:29 -0500)]
MLK-14599-1 soc:imx8:Update SCFW API
Update SCFW API to the following commit in SCFW git:
"
'commit: ("
a620caf7444c45715b68b5cf128219005598365f")'
Author: Mike <michael.kjar@nxp.com>
Date: Thu Mar 30 18:35:27 2017 -0500
Added a DDR Stress Test to the test folder
- New DDR test is like the stress test where we increment/sweep the DDR freq
- More tests may be added as development continues
- Modified mx8qm/soc.h to boot the A72 to DDR when building with option qmddr
"
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Leonard Crestez [Thu, 6 Apr 2017 10:32:40 +0000 (13:32 +0300)]
MLK-14596: ARM: imx7s.dtsi: Fix reg_1p2 min-bit-val
According to the manual the bit value for the minimum 1.1V is 0x14, not
0x8. This fixes reading incorrect voltages from the regulator. On new
kernels reading an out-of-range voltage on startup results in probe
errors.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Octavian Purdila <octavian.purdila@nxp.com>
Daniel Baluta [Wed, 5 Apr 2017 12:56:43 +0000 (15:56 +0300)]
MLK-14536: ASoC: codec: wm8960: Relax bit clock computation when using PLL
Bitclk is derived from sysclk using bclk_divs.
Sysclk can be derived in two ways:
(1) directly from MLCK
(2) MCLK via PLL
Commit
3c01b9ee2ab9d0d ("ASoC: codec: wm8960: Relax bit clock
computation")
relaxed bitclk computation when sysclk is directly derived from MCLK.
Lets do the same thing when sysclk is derived via PLL.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Daniel Baluta [Tue, 4 Apr 2017 15:58:19 +0000 (18:58 +0300)]
MLK-14536: ASoC: codec: wm9860: Refactor PLL out freq search
Add a separate function for deriving (sysclk, lrclk, bclk)
when the clock is auto or pll.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Xianzhong [Wed, 5 Apr 2017 11:56:40 +0000 (19:56 +0800)]
MGS-2811: gpu: integrate 6.2.2 official release
Include some bug-fixings for critical gpu issue.
source repo: gpu-viv6
source branch: fsl_6.2.2
Source commit:
ef725bcb98733bfe640e814c6ca2b1aa7412402b
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Xianzhong [Thu, 30 Mar 2017 03:58:04 +0000 (11:58 +0800)]
MGS-2786 [#imx-479] fix gpu kernel panic with debugfs
the user space data cannot be directly accessible in 4.9 kernel.
add copy_from_user to fix this kernel painic for gpu debugfs.
Date: Mar 30, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Andy Duan [Wed, 5 Apr 2017 07:30:59 +0000 (15:30 +0800)]
MLK-14618 net: fec: fixed-link don't need phy fixup setting
In MAC-MAC fixed link case, it don't need phy fixup setting.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Wed, 5 Apr 2017 07:15:39 +0000 (15:15 +0800)]
MLK-14617 net: fec: fix the clock count mismatch in error path
Avoid ipg clock count mismatch in error path, the issue is introduced by
the patch: "net: fec: Ensure clocks are enabled while using mdio bus".
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Thu, 30 Mar 2017 08:53:27 +0000 (16:53 +0800)]
MLK-14616 tty: serial: fsl_lpuart: remove the dev.coherent_dma_mask zero setting
By default, .of_dma_configure() init dev.coherent_dma_mask to BIT(32) that
match the eDMA address range. If re-init dev.coherent_dma_mask to zero, then
streaming dma mapping will go swiotlb dma_map, if swiotlb is not initalized
then it causes mapping failed.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Guy Shapiro [Sun, 29 Jan 2017 09:57:19 +0000 (11:57 +0200)]
MLK-13798: rtc: snvs: add a missing write sync
The clear of the LPTA_EN flag should be synced before writing to the
alarm register. Omitting this synchronization creates a race when
trying to change existing alarm.
(cherry picked from commit
7bb633b1a9812a6b9f3e49d0cf17f60a633914e5)
Signed-off-by: Guy Shapiro <guy.shapiro@mobi-wize.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Octavian Purdila <octavian.purdila@nxp.com>
Cristina Ciocan [Thu, 30 Mar 2017 11:21:42 +0000 (14:21 +0300)]
MLK-14542 ARM: dts: imx7d-sdb: change DE polarity to high for HDMI and LCD
Fix HDMI functionality by changing DE default polarity to active high,
which is needed by the default HDMI mode. Active low DE is needed by MIPI
DSI, which is why there is a different dts file for working with a MIPI
DSI panel.
This issue has been previously fixed in commit
5443a75ed03 ("MLK-14283: dts:
fix DE polarity for lcdif"), but this commit was reverted because it broke
other workflows. It was reverted in commit
34ac60798ec ("Revert "MLK-14283:
dts: fix DE polarity for lcdif"")and another solution was offered in
commit
8766ca8eddf ("MLK-14399: 4.9 rebase: LVDS panel does not work on
iMX6SX Auto").
This change of the default DE polarity was one of the changes in the
reverted commit, which should have been kept.
Signed-off-by: Cristina Ciocan <cristina-mihaela.ciocan@nxp.com>
Octavian Purdila [Mon, 3 Apr 2017 08:30:45 +0000 (11:30 +0300)]
MLK-14594 ARM: dts: imx7d-sdb: avoid duplicate names in lcdif node
This fixes the following boot warning:
OF: Duplicate name in lcdif@
30730000, renamed to "display#1"
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Octavian Purdila [Fri, 31 Mar 2017 11:01:01 +0000 (14:01 +0300)]
MLK-14587-2: ARM: imx_v7_defconfig: enable cpufreq stats
The default on 4.1 was to be enabled by default, but that changed in
4.9. Since we have tests that depend on it and it does not add too
much overhead, explicitly enable it in the config.
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Octavian Purdila [Fri, 31 Mar 2017 10:53:30 +0000 (13:53 +0300)]
MLK-14587-1 ARM: imx_v7_defconfig: update with savedefconfig
This patch does not introduce any changes in the config, it just
re-runs savedefconfig to create a proper minimal defconfig for the
current version.
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Cyrille Pitchen [Tue, 6 Dec 2016 17:14:24 +0000 (18:14 +0100)]
MLK-14496 mtd: spi-nor: remove WARN_ONCE() message in spi_nor_write()
This patch removes the WARN_ONCE() test in spi_nor_write().
This macro triggers the display of a warning message almost every time we
use a UBI file-system because a write operation is performed at offset 64,
which is in the middle of the SPI NOR memory page. This is a valid
operation for ubifs.
Hence this warning is pretty annoying and useless so we just remove it.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Suggested-by: Richard Weinberger <richard@nod.at>
Suggested-by: Andras Szemzo <szemzo.andras@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Octavian: rebased to 4.9]
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Reviewed-by: "Frank Li" <frank.li@nxp.com>
Anson Huang [Thu, 30 Mar 2017 22:44:15 +0000 (06:44 +0800)]
MLK-14585-2 clk: imx: correct pm API for getting power domain structure
Should use correct power domain API for getting power
domain structure by phandle, adding a power domain here is
incorrect, replace it with correct API.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang [Thu, 30 Mar 2017 22:36:55 +0000 (06:36 +0800)]
MLK-14585-1 power: domain: expose generic_pm_domain structure to clients
In some platforms, accessing registers needs to make sure
power domain is enabled, such as for clock operations, power
domain needs to be enabled first before accessing clock
registers, so some clocks need to know its power domain's
status, it will need to get power domain structure by phandle,
expose the API to support this case.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Octavian Purdila [Thu, 30 Mar 2017 10:13:31 +0000 (13:13 +0300)]
MLK-14450 ARM: dts: imx6ul-14x14-evk: remove duplicate i2c node
Commit
2c2a56059ff7e7e4 ("MLK-11407-8: ARM: dts: i.mx6sx/i.mx6ul: add
ldo-bypass support") was backported from imx_4.1.y and added a
duplicate i2c node which was already present upstream.
This patch removes the duplicated node and moves the difference
(clocks for wm8960) to the existing upstream node.
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Octavian Purdila [Thu, 30 Mar 2017 14:04:04 +0000 (17:04 +0300)]
MLK-14580 ARM: dts: imx7d-arm2: enable fec1 and usdhc nodes
These devices are enabled on imx_4.1.y, enable them on imx_4.9.y as
well.
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Gao Pan [Fri, 13 Jan 2017 09:58:14 +0000 (17:58 +0800)]
MLK-13756 ARM: dts: imx6sll-evk-btwifi: change the pad setting for sd3
The pad setting suggested by HW team affects the normal function
of sdio wifi. This patch changes the pad setting for sd3.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
Tiberiu Breana [Wed, 29 Mar 2017 14:16:20 +0000 (17:16 +0300)]
MLK-14551: arm64: defconfig: enable ddr perf monitors by default
Set CONFIG_IMX8_DDR_PERF to y for arm64 platforms
such as i.MX8QM or i.MXQXP.
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
Robert Chiras [Wed, 29 Mar 2017 06:59:27 +0000 (09:59 +0300)]
MLK-14524: dma: Fix division by zero
The audio driver is initialized by preparing a DMA slave channel using 0's
as parameters in sdma_prep_dma_cyclic function. This would lead to a
division by zero, since period_len is used as a divisor.
Used the code from 4.1 to fix this, where the division is made only for
non HDMI peripheral types.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Andy Duan [Wed, 29 Mar 2017 07:23:27 +0000 (15:23 +0800)]
MLK-14543 tty: serial: fsl_lpuart: add lpuart32 dma support
The current driver don't support lpuart32 DMA mode.
The patch add lpuart32 tx/rx DMA support, there have two main changes:
- lpuart32 tx dma resue lpuart tx dma mode to reduce code duplication.
- lpuart32 rx dma still use prep_sg mode since imx7ulp don't support
eeop mode that also ailgned with 4.1.y.
If don't use DMA mode, remove dma chan property in dts file.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Wed, 29 Mar 2017 07:08:00 +0000 (15:08 +0800)]
MLK-14547 tty: serial: fsl_lpuart: con->write should call .uart_console_write()
earlycon con->write() should call .uart_console_write() to process
'\n' character.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Wed, 29 Mar 2017 06:56:19 +0000 (14:56 +0800)]
MLK-14546 tty: serial: fsl_lpuart: add per_clk support
i.MX8QM lpuart has ipg_clk and per_clk, ipg_clk for bus and register
accessing, per_clk is lpuart module clock. Add per_clk support in
driver.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Wed, 29 Mar 2017 06:30:07 +0000 (14:30 +0800)]
MLK-14544 arm: dts: imx7ulp: correct earlycon port.membase address
Correct i.MX7ulp earlycon port.membase address for arm2 and evk
board dts file.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Wed, 29 Mar 2017 05:26:26 +0000 (13:26 +0800)]
MLK-14541 dmaengine: fsl-edma: remove the duplicated code
The function .fsl_edma_irq_init() has been called twice in .probe(), which
cause all dma controller registered failed.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Sat, 31 Dec 2016 08:01:32 +0000 (16:01 +0800)]
MLK-13712 dmaengine: fsl-edma: restore edma registers for i.MX7ULP VLLS mode
EDMA controller will loss power on i.MX7ULP VLLS mode, then registers
are set to HW reset default value that cause EDMA cannot work after
system wake up. So the patch is to restore eDMA registers status after
system exit from VLLS mode.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit:
bc15f814383d)
Conflicts:
drivers/dma/fsl-edma.c
Andy Duan [Fri, 24 Mar 2017 05:47:41 +0000 (13:47 +0800)]
dts: arm64: imx8qm: add lpuart0 ipg clock and correct interrupt number
Add lpuart0 ipg clock and correct interrupt number.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Robert Chiras [Thu, 16 Mar 2017 10:20:45 +0000 (12:20 +0200)]
MLK-14473: touchscreen: Fix return type
The touchscreen driver, max11801, which is on 12c2 bus, won't be probed
when using the hdcp specific DTS (this is disabling 12c2, since it
will acquire it for DDC communications). Since this driver won't be
probed, it will spam the dmesg with the pr_err from max11801_read_adc()
function. This function is periodically called by the battery driver. For
this reason, I removed the pr_err() call.
Also, to be noticed that the function signature is u32, but in case of an
error it will return a negative integer. In order to correctly propagate
errors, I changed the function signature to int. This is safe, since the
read value from i2c is on 16 bits (MSB and LSB on 8 bits).
Also, the function calibration_voltage is calling max11801_read_adc from
touchscreen driverm which can return negative values in case of an
error. I case of an error, just stop reading ADC data and return 0 as
voltage_data.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Robert Chiras [Thu, 16 Mar 2017 10:15:50 +0000 (12:15 +0200)]
MLK-14473: hdmi: Fix ioctl implementation
The function mxc_hdmi_ioctl is passing kernel memory to user-space. The
case for HDMI_IOC_GET_CPU_TYPE is passing the memory directly, which is
not permitted. Fixed this, by using put_user().
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Xianzhong [Tue, 28 Mar 2017 06:04:20 +0000 (14:04 +0800)]
MGS-2752 [#imx-303] integrate 6.2.2 snapshot release
Integrate 6.2.2 coverity fix and snapshot patches
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Anson Huang [Tue, 28 Mar 2017 16:10:50 +0000 (00:10 +0800)]
MLK-14534-3 arm64: defconfig: enable i.MX8 cpufreq
Enable i.MX8 cpu-freq by default for defconfig.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang [Tue, 28 Mar 2017 16:09:35 +0000 (00:09 +0800)]
MLK-14534-2 soc: imx8: register cpu-freq platform driver
Register cpu-freq platform driver for i.MX8.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang [Tue, 28 Mar 2017 16:07:57 +0000 (00:07 +0800)]
MLK-14534-1 cpufreq: imx8: add cpu-freq support
Add multi-clusters cpu-freq driver support for i.MX8,
only support cpu-freq get now.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Frank Li [Wed, 5 Oct 2016 19:54:42 +0000 (14:54 -0500)]
MLK-14379: drivers: perf: Add DDR perf count support
perf stat -a -e ddr0/cycles/,ddr0/read-bytes/,ddr0/write-bytes/,ddr1/cycles/,d
dr1/read-bytes/,ddr1/write-bytes/ dd if=/dev/zero of=/dev/null bs=10M count=1
1+0 records in
1+0 records out
Performance counter stats for 'system wide':
7236174 ddr0/cycles/ (99.97%)
8573 ddr0/read-bytes/ (99.99%)
163628 ddr0/write-bytes/
7256543 ddr1/cycles/ (99.99%)
9308 ddr1/read-bytes/ (100.00%)
165039 ddr1/write-bytes/
0.
008990125 seconds time elapsed
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
Peter Chen [Tue, 28 Mar 2017 03:32:07 +0000 (11:32 +0800)]
MLK-14527 ARM: dts: Makefile: remove duplicate entry
Remove duplicate entry for imx6sx-sabreauto-m4.dtb
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Yuchou Gan [Tue, 28 Mar 2017 10:00:05 +0000 (18:00 +0800)]
MGS-2767 [#imx-320] i.MX7ULP GPU suspend/resume problem
This commit reverts the patch from VSI and use the fix from commit
ba8592e6d791cd5ab81dcd872eab610d3b232934. As the patch VSI provided did not fix this issue tested on 6q.
Date: Mar 27, 2017
Signed-off-by: yuchou.gan <yuchou.gan@nxp.com>
Tiberiu Breana [Wed, 22 Mar 2017 09:58:25 +0000 (11:58 +0200)]
MLK-14505: dts: imx6ull-14x14-evk: Remove imx6ul-evk function node
Removed the unnecessary imx6ul-evk function node, as it was causing
a kernel panic at boot time due to an enumeration error.
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
Peng Fan [Fri, 24 Mar 2017 08:24:11 +0000 (16:24 +0800)]
MLK-14479 clk: imx: scu mux: fix gpr mux settings
sc_misc_set/get_control use mutex lock/unlock internally,
so using spin lock/unlock to protect sc_misc_set/get_control is
wrong. So drop the spin lock.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Prabhu Sundararaj [Thu, 23 Mar 2017 21:49:50 +0000 (16:49 -0500)]
MGS-2133 GPU kernel driver bring-up on i.MX8QM
Add GPU support for i.M8QM.
Signed-off-by Meng Mingming <mingming.meng@nxp.com>
Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@nxp.com>
Prabhu Sundararaj [Thu, 23 Mar 2017 19:29:09 +0000 (14:29 -0500)]
MGS-2437 mxc: add gpu-viv driver configuration for i.MX8
gpu-viv driver is common for ARCH_MXC and MX8
Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@nxp.com>
Prabhu Sundararaj [Thu, 23 Mar 2017 19:26:21 +0000 (14:26 -0500)]
MGS-2437 gpu: Add support for i.MX8QXP
Add the GPU configuration for i.MX8QXP
Signed-off-by: Yong Gan <yong.gan@nxp.com>
Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@nxp.com>
Robin Gong [Fri, 24 Mar 2017 08:46:52 +0000 (16:46 +0800)]
MLK-14514-2 dma: sdma: use dma_pool_free instead of dma_free_coherent
Some drivers may call terminate dma channel in interrupt, thus
we'd better use dma_poo_free.(Documentation/DMA-API-HOWTO.txt)
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Robin Gong [Fri, 24 Mar 2017 08:58:56 +0000 (16:58 +0800)]
MLK-14514-1 ARM: dts: imx6/7: revert 'enable ocram for sdma'
Revert "MLK-14498-12 arm: dts: imx6/7: enable ocram for sdma"
This reverts commit
51b2a6f6d70c.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Richard Zhu [Wed, 22 Mar 2017 02:19:57 +0000 (10:19 +0800)]
MLK-14501 ARM: imx: mu: pass real dev id when request shared irq
Pass the real dev id when the shared irq is request.
Otherwise, the request_irq would be failed.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Robin Gong [Thu, 23 Mar 2017 03:34:40 +0000 (11:34 +0800)]
MLK-14510: ARM: dts: imx6ull-14x14-ddr3-arm2: fix pfuze200 probe error
SW3B fused to high voltage 0.8v~3.3v and the low voltage setting in
dts cause pfuze200 driver probe failed as below even if the pfuze
driver have already updated the voltage to the right 0.8v~3.3v.But the
issue not caught on v4.1 since it's common regualtor framework behavior.
Correct the SW3B into the right voltage in v4.9
fuze100-regulator 0-0008: pfuze200 found.
SW3B: Bringing 3300000uV into
1975000-1975000uV
SW3B: failed to apply
1975000-1975000uV constraint(-22)
pfuze100-regulator 0-0008: register regulatorSW3B failed
pfuze100-regulator: probe of 0-0008 failed with error -22
2020000.serial: ttymxc0 at MMIO 0x2020000 (irq = 19, base_baud =
5000000) is a IMX
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Anson Huang [Wed, 22 Mar 2017 10:16:21 +0000 (18:16 +0800)]
MLK-14502 drivers: build mxc drivers by default
Build mxc drivers by default for both ARMv7 and ARMv8
platforms.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Daniel Baluta [Mon, 20 Mar 2017 09:57:26 +0000 (11:57 +0200)]
MLK-14277: ASoC: codec: wm8960: Relax bit clock computation
WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8
clocking register (See WM8960 datasheet, page 71).
There are use cases, like this:
aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm
where no BCLKDIV applied to sysclock can give us the exact requested
bitclk, so driver fails to configure clocking and aplay fails to run.
Fix this by relaxing bitclk computation, so that when no exact value
can be derived from sysclk pick the closest value greater than
expected bitclk.
Suggested-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Daniel Baluta [Mon, 13 Mar 2017 16:57:23 +0000 (18:57 +0200)]
MLK-14277: ASoC: codec: wm8960: Refactor sysclk freq search
Add a separate function for finding (sysclk, lrclk, bclk)
when the clock is auto or mclk. This makes code easier to
read and reduces the indentation level in wm8960_configure_clocking.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Robin Gong [Wed, 22 Mar 2017 08:29:46 +0000 (16:29 +0800)]
MLK-14503: ARM: dts: imx6qdl: correct ecspi sdma script type
Correct the ecspi sdma script type, since the workaroud sdma script
NOT work in SPBA bus, just sync with v4.1.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Robin Gong [Thu, 24 Dec 2015 09:44:31 +0000 (17:44 +0800)]
MLK-12076-4: spi: spi-imx: add imx6ul device type
Add imx6ul device type in spi driver to enable the ERR008517 workaround
or not by dts easily.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit
85c6cc2243919f2c46b335ec8b5be70294942e4d)
(cherry picked from commit
296305f200abd5982a4934b82e7aaf11a3dfc354)
Conflicts:
drivers/spi/spi-imx.c
Robin Gong [Wed, 11 Mar 2015 06:58:18 +0000 (14:58 +0800)]
MLK-10404-1 spi: spi-imx: use XCH mode even in DMA mode
To workaroud the TKT238285, the safe way is use XCH mode in SDMA
script to simulate as PIO mode which never report such issue. Meanwhile,
set tx threashold as 0. But this workaroud will bring performance impacted,
below performance data is collected by 'dd' with SPI-NOR flash on i.mx6dl
sabresd board:
mode write data read data
--PIO 194KB/s 644KB/s
--DMA normal
(SMC, tx_thresh=32) 222KB/s 1.4MB/s
--DMA(XCH, tx_thresh=0) 210KB/s 1.0MB/s
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit
01be65fa5617aa192307ca38b6fc6128f3f0c3f7)
(cherry picked from commit
646a751a4d1d0e227a762b461d9b8f92605c26b1)
(cherry picked from commit
b334993950b24ced30fcfc70c126b65bf4cb4cff)
Conflicts:
drivers/spi/spi-imx.c
Andy Duan [Wed, 22 Mar 2017 08:40:09 +0000 (16:40 +0800)]
MLK-14498-13 tty: serial: imx: use tty_port_suspended() instead of ASYNC_SUSPENDED
tty_port flag "ASYNC_SUSPENDED" has been discarded from kernel upgrade, then
use .tty_port_suspended() instead of the flag check.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Wed, 22 Mar 2017 08:30:23 +0000 (16:30 +0800)]
MLK-14498-12 arm: dts: imx6/7: enable ocram for sdma
Add ocram for sdma BDs memory.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
Andy Duan [Wed, 22 Mar 2017 03:33:38 +0000 (11:33 +0800)]
MLK-14498-11 reset: gpio-reset: use the cansleep variant of the GPIO API
Use the cansleep variant of the GPIO API.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Wed, 22 Mar 2017 02:31:04 +0000 (10:31 +0800)]
MLK-14498-10 dma: imx-sdma: fix wrong chn_real_count in cyclic mode
The sdmac->chn_real_count is equal to sdmac->period_len in dma cyclic
mode that is not correct, correct it to real count in current BD transfer.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Tue, 21 Mar 2017 10:08:04 +0000 (18:08 +0800)]
MLK-14498-9 dts: imx6/imx7: add modem device reset node
Add BT modem device reset node.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Andy Duan [Tue, 21 Mar 2017 09:59:20 +0000 (17:59 +0800)]
MLK-14498-8 tty: serial: imx: add modem device reset
Add modem device reset, wthether to reset depend on dts configuration.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>