linux.git
7 years agoMLK-17580: ASoC: fsl: dsd: Add DSD utilities helper
Viorel Suman [Thu, 8 Mar 2018 12:37:30 +0000 (14:37 +0200)]
MLK-17580: ASoC: fsl: dsd: Add DSD utilities helper

Add DSD utilities helper.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com
7 years agoMLK-17734-2: ASoC: fsl: ak5558: Remove support for 192KHz in TDM mode
Daniel Baluta [Thu, 8 Mar 2018 17:04:19 +0000 (19:04 +0200)]
MLK-17734-2: ASoC: fsl: ak5558: Remove support for 192KHz in TDM mode

Using TDM256 mode (our only supported mode) in order to
support 192KHz we would need a MCLK of 192000 * 512 = 98304000.

But maximum frequency supported by the Audio PLL is 4.91 MHz.

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-17734-1: ASoC: fsl: imx-ak5558: Fix TDM mode for 8kHz / 16Khz
Daniel Baluta [Thu, 8 Mar 2018 16:55:32 +0000 (18:55 +0200)]
MLK-17734-1: ASoC: fsl: imx-ak5558: Fix TDM mode for 8kHz / 16Khz

In order for TDM to correctly work we need that MCLK and
BCLK to follow the values in Table 9.

Thus,
* TDM128: BCLK = 128fs, MCLK = 128-1024fs
* TDM256: BCLK = 256fs, MCLK = 256-1024fs
* TDM512: BCLK = 512fs, MCLK = 512-1024fs

We assume only support TDM256 for the moment.

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-17647: drm: imx: dcss: fix the flip_done timed out problem
Laurentiu Palcu [Thu, 8 Mar 2018 09:47:05 +0000 (11:47 +0200)]
MLK-17647: drm: imx: dcss: fix the flip_done timed out problem

The commit:

44c45128 - MLK-17634-1: drm: imx: dcss: send vblank event from ISR

made some changes related to vblank handling. However, it looks like
they were not robust enough and, sometimes, the flip events are not
sent. This happens only when playing videos over Weston.

This patch, effectively, reverts those changes.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMGS-3724 increase the core clock rate for qxp B0 board.
Yuchou Gan [Fri, 9 Mar 2018 14:37:15 +0000 (22:37 +0800)]
MGS-3724 increase the core clock rate for qxp B0 board.

The qxp B0 board gpu core clock rate is 700MHz, increase to it.

Signed-off-by: Yuchou Gan<yuchou.gan@nxp.com>
7 years agoMLK-17689-3: arm64: dts: fsl-imx8mq-evk: Fix clocks for DCSS-RM67191
Robert Chiras [Thu, 8 Mar 2018 11:53:53 +0000 (13:53 +0200)]
MLK-17689-3: arm64: dts: fsl-imx8mq-evk: Fix clocks for DCSS-RM67191

Currently, the default clock configuration for DCSS configures the pixel
clock to be sourced from VIDEO_PLL2, but this source cannot be used by the
DSI PHY_REF clock.
So, in order to make DCSS working with DSI, we need to have them both
(DCSS and DSI PHY) use the same clock source: VIDEO_PLL1.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
7 years agoMLK-17692-4: imx hdp: Add pixel clock return check
Sandor Yu [Thu, 8 Mar 2018 08:14:36 +0000 (16:14 +0800)]
MLK-17692-4: imx hdp: Add pixel clock return check

Return 0 if pixel clock isn't supported by hdmi phy.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17692-3: imx hdp: Remove CDN vic table
Sandor Yu [Tue, 6 Mar 2018 09:17:35 +0000 (17:17 +0800)]
MLK-17692-3: imx hdp: Remove CDN vic table

Remove CDN vic table and replace with drm_display_mode.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17692-2: defconfig: Remove FB_MX8_HDMI
Sandor Yu [Tue, 6 Mar 2018 09:11:04 +0000 (17:11 +0800)]
MLK-17692-2: defconfig: Remove FB_MX8_HDMI

Remove FB_MX8_HDMI.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17692-1: fbdev: Remove imx8 hdmi fb driver
Sandor Yu [Tue, 6 Mar 2018 09:01:18 +0000 (17:01 +0800)]
MLK-17692-1: fbdev: Remove imx8 hdmi fb driver

imx8 hdmi fb driver is not maintain.
imx8 hdmi function have implemented with DRM framework
in driver/gpu/drm/imx folder.
So remove hdmi fb driver.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
7 years agoMLK-17730 rtc: rtc-imx-sc: only print once for read time error
Anson Huang [Thu, 8 Mar 2018 03:23:17 +0000 (11:23 +0800)]
MLK-17730 rtc: rtc-imx-sc: only print once for read time error

As RTC read time will be called periodically, to avoid
too many error messages when RTC is NOT ready in SCFW,
change the error print to only print once.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17698-6 ARM64: dts: freescale: imx8qm: enable mek board pmic thermal zone
Anson Huang [Wed, 7 Mar 2018 06:01:39 +0000 (14:01 +0800)]
MLK-17698-6 ARM64: dts: freescale: imx8qm: enable mek board pmic thermal zone

Enable i.MX8QM MEK board PMIC thermal zone.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17698-5 thermal: imx_sc: add PMIC thermal sensor for i.MX8QM
Anson Huang [Tue, 6 Mar 2018 08:33:09 +0000 (16:33 +0800)]
MLK-17698-5 thermal: imx_sc: add PMIC thermal sensor for i.MX8QM

Remove unused thermal sensors and add PMIC thermal sensors
for i.MX8QM.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17698-4 ARM64: dts: freescale: imx8qxp: enable mek board pmic thermal zone
Anson Huang [Wed, 7 Mar 2018 05:53:40 +0000 (13:53 +0800)]
MLK-17698-4 ARM64: dts: freescale: imx8qxp: enable mek board pmic thermal zone

Enable i.MX8QXP MEK board PMIC thermal zone.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17698-3 thermal: imx_sc: add PMIC thermal sensors for i.MX8QXP
Anson Huang [Tue, 6 Mar 2018 07:39:46 +0000 (15:39 +0800)]
MLK-17698-3 thermal: imx_sc: add PMIC thermal sensors for i.MX8QXP

Add PMIC thermal sensors for i.MX8QXP.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17698-2 ARM64: dts: freescale: imx8qxp: update thermal zone info
Anson Huang [Tue, 6 Mar 2018 07:37:25 +0000 (15:37 +0800)]
MLK-17698-2 ARM64: dts: freescale: imx8qxp: update thermal zone info

Update thermal zone number, including CPU thermal
zone and DRC thermal zone.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17698-1 thermal: imx_sc: use system controller thermal sensor for A35 CPU
Anson Huang [Tue, 6 Mar 2018 07:37:10 +0000 (15:37 +0800)]
MLK-17698-1 thermal: imx_sc: use system controller thermal sensor for A35 CPU

Now that SCFW (0d43db9 SCF-22: Move SCU controls to SYSTEM.
Allows AP to use SCU temp sensor.) exposes SCU's temp sensor
for AP, and it is placed more close to i.MX8QXP A35 core, so
it should be used as A35's CPU thermal sensor, add this change
and move DRC temp sensor to a new thermal zone.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-17729: ARM64: dts: Add power domains for display resources
Oliver Brown [Wed, 7 Mar 2018 19:27:47 +0000 (13:27 -0600)]
MLK-17729: ARM64: dts: Add power domains for display resources

Some resources are being enabled without the associated resource being
powered up.

Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
7 years agoMLK-17672 lpspi: fix clock polarity issue and DBT issue
Gao Pan [Tue, 6 Mar 2018 01:25:10 +0000 (09:25 +0800)]
MLK-17672 lpspi: fix clock polarity issue and DBT issue

1. Fix code error of changing lpspi clock polarity.

2. Set one SPI clock period for DBT parameter.

Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
7 years agoMLK-17701 swiotlb-xen: implement xen_swiotlb_get_sgtable callback
Andrii Anisov [Tue, 7 Feb 2017 17:58:03 +0000 (19:58 +0200)]
MLK-17701 swiotlb-xen: implement xen_swiotlb_get_sgtable callback

Signed-off-by: Andrii Anisov <andrii_anisov@epam.com>
Signed-off-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: Konrad Rzeszutek Wilk <konrad@kernel.org>
(cherry picked from commit 69369f52d28a34c84acb6f2a8a585e743441566a)

on 8QM A0, video play use ion to allocate buffer and mmap buffer,
there is a call dma_get_sgtable, but xen arm not implement that.
when playing video, GPU driver will use sg dma address, but because
of xen_swiotlb_get_sgtable not implemented, sg->amd_address is not
exactly the address that ion allocated. This patch fixes the issue.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
7 years agoSound: SoC: codecs: Put AK4458 codec in manual mode
Cosmin-Gabriel Samoila [Wed, 7 Mar 2018 09:45:22 +0000 (11:45 +0200)]
Sound: SoC: codecs: Put AK4458 codec in manual mode

We cannot both derive SAI BCLK for 384KHz-S32/768KHz-S16 and
respect the codec MCLK restrictions shown in AK4458 datasheet
Table 5, 6 and 7.
Since we can have same master clock for SAI and Codec in Manual
Mode, we've chosen to use it instead of Auto Mode.

Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
7 years agoSound: Soc: fsl: Set SAI Channel Mode to Output Mode
Cosmin-Gabriel Samoila [Wed, 7 Mar 2018 09:35:07 +0000 (11:35 +0200)]
Sound: Soc: fsl: Set SAI Channel Mode to Output Mode

Transmit data pins will output zero when slots are masked or channels
are disabled. In CHMOD TDM mode, transmit data pins are tri-stated when
slots are masked or channels are disabled. When data pins are tri-stated,
there is noise on some channels when FS clock value is high and data is
read while fsclk is transitioning from high to low.

Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
7 years agoMLK-17569-2: hdp: add channel/speaker allocation for 4 channel
Shengjiu Wang [Wed, 7 Mar 2018 10:27:48 +0000 (18:27 +0800)]
MLK-17569-2: hdp: add channel/speaker allocation for 4 channel

According to CEA-861-E section 6.6.2, add channel/speaker
allocation configuration for 4 channel.
0x0: FL, FR
0x3: FL, FR, LFE, FC
0x1F:FL, FR, LFE, FC, RL, RR, FLC, FRC

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
7 years agoMLK-17569-1: hdp: fix channel swapping issue for hdmi audio
Shengjiu Wang [Wed, 7 Mar 2018 10:23:23 +0000 (18:23 +0800)]
MLK-17569-1: hdp: fix channel swapping issue for hdmi audio

There is channel swapping issue for 4 channel and 8 channel audio.
After dump the register, found that SMPL2PKT_CNFG is not set
correctly, the reason is that F_NUM_OF_I2S_PORTS should be
F_NUM_OF_I2S_PORTS_S.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
7 years agoMLK-17156-7: ASoC: imx-rpmsg: use rpmsg codec instead the dummy
Shengjiu Wang [Wed, 7 Mar 2018 03:14:53 +0000 (11:14 +0800)]
MLK-17156-7: ASoC: imx-rpmsg: use rpmsg codec instead the dummy

use the rpmsg_wm8960 codec instead of the dummy codec

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-17156-6: ASoC: imx-pcm-rpmsg: fix get codec data failed
Shengjiu Wang [Tue, 6 Mar 2018 04:46:18 +0000 (12:46 +0800)]
MLK-17156-6: ASoC: imx-pcm-rpmsg: fix get codec data failed

Receive message is only used when the type is B. originally
we copy the receive message to revg_msg all the time, when
the message type is C, which will overide the revg_msg, which
cause the get codec data command return wrong value.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-17156-5: ASoC: imx-pcm-rpmsg: register rpmsg codec
Shengjiu Wang [Wed, 7 Mar 2018 03:15:23 +0000 (11:15 +0800)]
MLK-17156-5: ASoC: imx-pcm-rpmsg: register rpmsg codec

register rpmsg codec after the rpmsg-audio-channel is
ready.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-17156-4: ASoC: rpmsg_wm8960: add rpmsg_wm8960 codec
Shengjiu Wang [Wed, 7 Mar 2018 03:14:29 +0000 (11:14 +0800)]
MLK-17156-4: ASoC: rpmsg_wm8960: add rpmsg_wm8960 codec

This codec is accessed by rpmsg. As the wm8960 is controlled
mainly by M4, so we only add volume in this rpmsg_wm8960 codec.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-17156-3: ASoC: fs_rpmsg_i2s: update the protocol for i2c message
Shengjiu Wang [Tue, 6 Mar 2018 04:45:22 +0000 (12:45 +0800)]
MLK-17156-3: ASoC: fs_rpmsg_i2s: update the protocol for i2c message

rpmsg provide command for A7 side to set the codec value and get
codec value by i2c. In this case, the A7 can control the codec.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-17156-2: ARM: dts: update dts for demo audio in A7 domain
Shengjiu Wang [Tue, 6 Mar 2018 04:46:45 +0000 (12:46 +0800)]
MLK-17156-2: ARM: dts: update dts for demo audio in A7 domain

This is dts is for demo SAI + codec in A7 domain, which need to
do i2c hardware rework, connect the wm8960 to i2c7.
for this is for demo usage, so don't need the headphone plug/unplug
event, so remove the iomux for this case.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-17156-1: ASoC: fsl_sai: update register offset for ULP B0
Shengjiu Wang [Tue, 6 Mar 2018 03:45:30 +0000 (11:45 +0800)]
MLK-17156-1: ASoC: fsl_sai: update register offset for ULP B0

ULP B0 integrate the latest SAI IP, there is version id and
parameter id register in the beginning, so update the offset
for ULP B0

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-17696: Change resource from PID_0 to SYSTEM for scu control.
Adriana Reus [Tue, 6 Mar 2018 13:28:03 +0000 (15:28 +0200)]
MLK-17696: Change resource from PID_0 to SYSTEM for scu control.

Syncs with the following change in scfw.

    Author: Chuck Cannon <chuck.cannon@freescale.com>
    Date:   Mon Mar 5 07:44:27 2018 -0600

    SCF-22: Move SCU controls to SYSTEM. Allows AP to use SCU temp
    sensor.

BuildInfo:
  - SCFW e56d4c0a, IMX-MKIMAGE d4e440b2, ATF 4af5ca0
  - U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta2+gf195c38

Tested-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Nitin Garg <nitin.garg@nxp.com>
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
7 years agoMLK-17645: drm: imx: dcss: fix DTRC start issue
Laurentiu Palcu [Tue, 6 Mar 2018 11:56:55 +0000 (13:56 +0200)]
MLK-17645: drm: imx: dcss: fix DTRC start issue

The following commit:

af01350 - MLK-17634-18: drm: imx: dcss: optimize context loading and DDR
bus load

introduced a regression. During my attempts to fix various green screen
issues, I modified the DTRC start routine by enabling the other register
bank, not the current one.

Unfortunately, this was committed by mistake...

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17655: drm: imx: hdp: send HDR metadata when property is set
Laurentiu Palcu [Fri, 2 Mar 2018 08:56:15 +0000 (10:56 +0200)]
MLK-17655: drm: imx: hdp: send HDR metadata when property is set

HDR metadata infoframe was sent only when doing a mode set. However,
kmssink is using the same device as Weston and mode setting messes up
with Weston's plane state.

This patch allows for the HDR metadata to be sent out to the sink when
the property is set. Hence, no need for a mode set.

Also, the older functionality allowed only for 4K@60 to be used for HDR.
However, HDR is not about resolution. This patch will also allow to go
to HDR mode in other resolutions as well.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17671-2: drm: imx: hdp: mscale: remove delay at the end of mode setting
Laurentiu Palcu [Tue, 6 Mar 2018 09:18:54 +0000 (11:18 +0200)]
MLK-17671-2: drm: imx: hdp: mscale: remove delay at the end of mode setting

Since DCSS was moved to use VIDEO2_PLL clock, HDMI phy clock is not used
anymore. Hence, this delay here is not necessary. It's been added inside
DCSS driver.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17671-1: drm: imx: dcss: add a delay after changing the pixel clock
Laurentiu Palcu [Tue, 6 Mar 2018 09:08:49 +0000 (11:08 +0200)]
MLK-17671-1: drm: imx: dcss: add a delay after changing the pixel clock

DCSS needs some time to stabilize after switching to a new pixel clock.
All interrupts will delayed till the clock stabilizes and we'll end up
getting warnings about VBLANK interrupt taking more than 50ms to arrive.

This patch adds a 500ms delay after switching to a new clock. This will
allow DCSS to stabilize before enabling CRTC and DTG channels.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17689-2: arm64: dts: fsl-imx8mq-evk: Fix clocks for DCSS-ADV7535
Robert Chiras [Tue, 6 Mar 2018 10:40:34 +0000 (12:40 +0200)]
MLK-17689-2: arm64: dts: fsl-imx8mq-evk: Fix clocks for DCSS-ADV7535

Currently, the default clock configuration for DCSS configures the pixel
clock to be sourced from VIDEO_PLL2, but this source cannot be used by
the DSI PHY_REF clock.
So, in order to make DCSS working with DSI, we need to have them both
(DCSS and DSI PHY) use the same clock source: VIDEO_PLL1.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
7 years agoMLK-17689-1: drm:imx: dcss: Fix DCSS clock selection for MIPI
Robert Chiras [Tue, 6 Mar 2018 09:56:56 +0000 (11:56 +0200)]
MLK-17689-1: drm:imx: dcss: Fix DCSS clock selection for MIPI

Fix the clock source selection for MIPI use-case.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
7 years agoMLK-17685-2: Enable CCI400 PMU in defconfig
Frank Li [Tue, 6 Mar 2018 05:23:47 +0000 (23:23 -0600)]
MLK-17685-2: Enable CCI400 PMU in defconfig

Enable CCI400 PMU config

Signed-off-by: Frank Li <Frank.Li@nxp.com>
7 years agoMLK-17685-1 Enable CCI perfomance monitor
Frank Li [Mon, 5 Mar 2018 11:27:05 +0000 (05:27 -0600)]
MLK-17685-1 Enable CCI perfomance monitor

perf list

  CCI_400_r1/cycles/                                 [Kernel PMU event]
  CCI_400_r1/mi_retry_speculative_fetch,source=?/    [Kernel PMU event]
  CCI_400_r1/mi_rrq_stall_barrier_hazard,source=?/   [Kernel PMU event]
  CCI_400_r1/mi_rrq_stall_hi_prio_rtq_full,source=?/ [Kernel PMU event]
  CCI_400_r1/mi_rrq_stall_low_prio_rtq_full,source=?/ [Kernel PMU event]
  CCI_400_r1/mi_rrq_stall_master_id_hazard,source=?/ [Kernel PMU event]
  CCI_400_r1/mi_rrq_stall_mid_prio_rtq_full,source=?/ [Kernel PMU event]
  CCI_400_r1/mi_rrq_stall_qvn_vn0,source=?/          [Kernel PMU event]
  CCI_400_r1/mi_rrq_stall_qvn_vn1,source=?/          [Kernel PMU event]
  CCI_400_r1/mi_rrq_stall_qvn_vn2,source=?/          [Kernel PMU event]
  CCI_400_r1/mi_rrq_stall_qvn_vn3,source=?/          [Kernel PMU event]

Signed-off-by: Frank Li <Frank.Li@nxp.com>
7 years agoMLK-17646 gpu: imx: dpu: Correct number of fg instances in plane group resource
Liu Ying [Fri, 2 Mar 2018 04:44:05 +0000 (12:44 +0800)]
MLK-17646 gpu: imx: dpu: Correct number of fg instances in plane group resource

The resources for a plane group are shared by the two display streams
of one DPU.  Thus, the two Framegen(fg) instances of one DPU should be
in the plane group resource.  The resource users may find the fg instance
onto which the resources are built via the stream id.  This patch corrects
the number of fg instances in a plane group resource from one to two.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
7 years agoMLK-15071: ASoC: fsl: imx-ak4497: Fix clk for 384KHz and 786KHz
Viorel Suman [Mon, 12 Feb 2018 10:35:19 +0000 (12:35 +0200)]
MLK-15071: ASoC: fsl: imx-ak4497: Fix clk for 384KHz and 786KHz

With the current multipliers SAI isn't able to derive a correct bitclk.

e.g: When playing at 786Khz with current multiplier

MCLK = 22579200, requested freq 22579200 but SAI wants:
MCLK = (DIV + 1) * 2 * freq [SAI TCR2], so an acceptable solution
is to add a 2x factor to mclk.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
7 years agovideo: mxfsb: Fix endless -EPROBE_DEFER with empty disp_dev
Leonard Crestez [Fri, 23 Feb 2018 16:03:04 +0000 (18:03 +0200)]
video: mxfsb: Fix endless -EPROBE_DEFER with empty disp_dev

Since f7b48681ec68 ("MLK-16137 video: fbdev: add defer probe for mxs framebuffer")
the mxsfb_dispdrv_init function will return -EPROBE_DEFER on all
mxc_dispdrv_gethandle failures. That makes sense because all
mxc_dispdrv_entry are registered in their respective probe functions and
an absent entry should result in probing mxsfb later.

However in some cases an the disp_dev is empty and those configurations
now result in enless EPROBE_DEFER loops. Fix this by accepting empty
disp_dev at the start of mxsfb_dispdrv_init.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
7 years agovideo: mxsfb: Fix leaking videomem if dispdrv not ready
Leonard Crestez [Fri, 23 Feb 2018 15:18:18 +0000 (17:18 +0200)]
video: mxsfb: Fix leaking videomem if dispdrv not ready

This is a large leak and repeated probing can even exhaust CMA

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
7 years agoMLK-17623: imx8 scu: Explicitly make irq optional
Leonard Crestez [Wed, 7 Feb 2018 19:27:45 +0000 (21:27 +0200)]
MLK-17623: imx8 scu: Explicitly make irq optional

The MU works just fine without interrupts because sc_call_rpc will poll
waiting for a response. Make this explicit because it allows easier
emulation for virtualization.

The request_irq error is just reported but doesn't fail the probe,
however failing to set that irq as a wake source is fatal.

This was introduced recently:
commit 3b20aa779f33 ("MLK-17072-1: soc: imx: sc: ipc: enable MU
interrupt as wakeup source")

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
7 years agoMLK-17650-2: arm64: dts: fsl-imx8mq-evk: Update adv7535
Robert Chiras [Fri, 2 Mar 2018 09:35:53 +0000 (11:35 +0200)]
MLK-17650-2: arm64: dts: fsl-imx8mq-evk: Update adv7535

Since the ADV7535 address for DSI-CEC can be configured from DTS file,
update the ADV7535 specific files in order to remove the disabling
camera node and update the ADV7535 node to use a different i2c address.
Currently 0x3c was used, conflicting with camera. Now, program ADV7535
to use 0x3b for the DSI-CEC memory map.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
7 years agoMLK-17650-1: drm/bridge: adv7511: Add support for programmable i2c addresses
Robert Chiras [Fri, 2 Mar 2018 09:31:50 +0000 (11:31 +0200)]
MLK-17650-1: drm/bridge: adv7511: Add support for programmable i2c addresses

The DSI-HDMI converter, ADV7535, driver uses four i2c memory maps: MAIN,
DSI-CEC, EDID and PACKET.
While the MAIN address is hard-coded in the ROM chip, the other three
can be programmed into the MAIN memory map.
Currently, the three memory maps addresses, that can be programmed, are
hard-coded into the code.
In order to avoid conflicts with other i2c clients on the bus, update
the driver to use configurable addresses specified in DTS file.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
7 years agoMLK-17641 thermal: imx: Fix race condition in imx_thermal_probe()
Anson Huang [Thu, 1 Mar 2018 08:45:28 +0000 (16:45 +0800)]
MLK-17641 thermal: imx: Fix race condition in imx_thermal_probe()

Upstream reports below race condition:

When device boots with T > T_trip_1 and requests interrupt,
the race condition takes place. The interrupt comes before
THERMAL_DEVICE_ENABLED is set. This leads to an attempt to
reading sensor value from irq and disabling the sensor,
based on the data->mode field, which expected to be
THERMAL_DEVICE_ENABLED, but still stays as THERMAL_DEVICE_DISABLED.
Afher this issue sensor is never re-enabled, as the driver state is wrong.

Fix this problem by setting the 'data' members prior to requesting
the interrupts.

Signed-off-by: Mikhail Lappo <mikhail.lappo@esrlabs.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
7 years agodrm/fb: add support for not enabling fbcon on non-desktop displays [v2]
Dave Airlie [Mon, 16 Oct 2017 04:08:39 +0000 (05:08 +0100)]
drm/fb: add support for not enabling fbcon on non-desktop displays [v2]

We don't want fbcon to get used on non-desktop dislays,
don't pass them as enabled connectors to the fb helper setup.

This prevents my HMD from getting disorted fbcon, and from
affecting other displays console.

v2: Change description from non-standard to non-desktop

Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Marius Vlad <marius-cristian.vlad@nxp.com>
(cherry-picked b5f053882ff19a8ce from git://people.freedesktop.org/~airlied/linux)

7 years agodrm: add connector info/property for non-desktop displays [v2]
Dave Airlie [Thu, 1 Mar 2018 13:38:11 +0000 (15:38 +0200)]
drm: add connector info/property for non-desktop displays [v2]

This adds the infrastructure needed to quirk displays
using edid and to mark them a non-desktop.

A non-desktop display is one which shouldn't normally be included
as a part of a desktop environment.

This is meant to cover head mounted devices like HTC Vive.

v2: Change description from non-standard to non-desktop, add docs

Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Marius Vlad <marius-cristian.vlad@nxp.com>
(Ported 66660d4cf21b7dfcb25 from git://people.freedesktop.org/~airlied/linux)

7 years agoMLK-17639-2: ARM64: dts: enable spdif rx for HDMI ARC
Shengjiu Wang [Wed, 27 Dec 2017 09:12:11 +0000 (17:12 +0800)]
MLK-17639-2: ARM64: dts: enable spdif rx for HDMI ARC

enable spdif rx for HDMI ARC

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-17639-1: hdp: enable HDMI ARC with common API
Shengjiu Wang [Thu, 1 Mar 2018 03:34:24 +0000 (11:34 +0800)]
MLK-17639-1: hdp: enable HDMI ARC with common API

Define __ARC_CONFIG__ to enable HDMI ARC

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
7 years agoMLK-17626: drm: imx: dcss: fix "ctxld error" messages
Laurentiu Palcu [Thu, 1 Mar 2018 08:36:51 +0000 (10:36 +0200)]
MLK-17626: drm: imx: dcss: fix "ctxld error" messages

The problem arised because of a combination of 2 commits:

Commit 1:

"2a70f32 - MLK-17232-2: drm: imx: dcss: ignore SB_PEND_DISP_ACTIVE
interrupt"

disabled the SB_PEND_DISP_ACTIVE interrupt because of a problem in SOC.
However, it did not remove the flag from CTXLD_IRQ_ERROR macro.

Commit 2:

"f0e3911 - MLK-17459-1: drm: imx: dcss: change ctxld irq handling"

moved the bottom half interrupt handling to top half. By doing that, the
top half did not exit immediately if IRQ_COMPLETION condition was met
and continued evaluating if any interrupts in CTXLD_IRQ_ERROR flags
were triggered.

This patch removes SB_PEND_DISP_ACTIVE interrupt flag from
CTXLD_IRQ_ERROR macro.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-19: drm: imx: dcss: set crtc output pipe to P010 only if sink suports YUV420
Laurentiu Palcu [Tue, 27 Feb 2018 11:11:19 +0000 (13:11 +0200)]
MLK-17634-19: drm: imx: dcss: set crtc output pipe to P010 only if sink suports YUV420

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-18: drm: imx: dcss: optimize context loading and DDR bus load
Laurentiu Palcu [Mon, 26 Feb 2018 14:16:19 +0000 (16:16 +0200)]
MLK-17634-18: drm: imx: dcss: optimize context loading and DDR bus load

This will lower the amount of ctxld entries sent, if configuration has
not changed much. Also, disable channel 0 if alpha is 0 and global alpha
is used. This will lower the DDR load, depending on graphics channel
resolution.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-17: drm: imx: dcss: make P010 tiled formats work
Laurentiu Palcu [Thu, 22 Feb 2018 08:42:59 +0000 (10:42 +0200)]
MLK-17634-17: drm: imx: dcss: make P010 tiled formats work

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-16: drm: imx: dcss: make 10-bit formats work with HDR
Laurentiu Palcu [Tue, 20 Feb 2018 13:06:49 +0000 (15:06 +0200)]
MLK-17634-16: drm: imx: dcss: make 10-bit formats work with HDR

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-15: drm: imx: dcss: handle P010 format
Laurentiu Palcu [Mon, 19 Feb 2018 14:01:14 +0000 (16:01 +0200)]
MLK-17634-15: drm: imx: dcss: handle P010 format

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-14: drm: imx: dcss: Add basic HDR10 support
Laurentiu Palcu [Wed, 14 Feb 2018 12:06:41 +0000 (14:06 +0200)]
MLK-17634-14: drm: imx: dcss: Add basic HDR10 support

This patch adds basic HDR10 support. However, full support depends on
subsequent patches.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-13: drm: imx: dcss: remove the dcss-tables header
Laurentiu Palcu [Mon, 12 Feb 2018 11:01:54 +0000 (13:01 +0200)]
MLK-17634-13: drm: imx: dcss: remove the dcss-tables header

The tables header is no longer necessary as dcss.fw file will be used
from now on to store LUT and CSC tables.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-12: drm: imx: hdp: Send HDR metadata to the sink
Laurentiu Palcu [Mon, 12 Feb 2018 08:23:48 +0000 (10:23 +0200)]
MLK-17634-12: drm: imx: hdp: Send HDR metadata to the sink

If the HDR metadata proprety is set, then the metadata will be sent
to the sink at the next mode set.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-11: drm: imx: dcss: make DCSS use VIDEO2_PLL2 clock
Laurentiu Palcu [Wed, 7 Feb 2018 14:51:34 +0000 (16:51 +0200)]
MLK-17634-11: drm: imx: dcss: make DCSS use VIDEO2_PLL2 clock

This clock is needed by HDR10 so this patch makes DCSS use VIDEO2_PLL2
for the rest of the resolutions as well.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-10: clk: imx8m: add support for 27MHz phy clock and fix pll2 round/set...
Laurentiu Palcu [Wed, 7 Feb 2018 14:48:12 +0000 (16:48 +0200)]
MLK-17634-10: clk: imx8m: add support for 27MHz phy clock and fix pll2 round/set rate functions

The SSCG PLL2 is identical to PLL1, hence make the rounding/setting
functions reflect that.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-9: clk: imx8m: add VIDEO2_PLL2 clock tree
Laurentiu Palcu [Wed, 7 Feb 2018 14:25:59 +0000 (16:25 +0200)]
MLK-17634-9: clk: imx8m: add VIDEO2_PLL2 clock tree

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-8: drm: imx: dcss: read HDR10 LUTs/CSCs from FW file
Laurentiu Palcu [Mon, 22 Jan 2018 07:50:23 +0000 (09:50 +0200)]
MLK-17634-8: drm: imx: dcss: read HDR10 LUTs/CSCs from FW file

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-7: drm: imx: dcss: remove unused dcss_hdr10_priv structure member
Laurentiu Palcu [Sat, 27 Jan 2018 14:05:25 +0000 (16:05 +0200)]
MLK-17634-7: drm: imx: dcss: remove unused dcss_hdr10_priv structure member

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-6: drm: imx: dcss: add P010 drm format
Laurentiu Palcu [Fri, 19 Jan 2018 13:15:58 +0000 (15:15 +0200)]
MLK-17634-6: drm: imx: dcss: add P010 drm format

This is 10-bit per channel YUV420 semi-planar.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-5: drm: imx: dcss: overlay planes support HDR
Laurentiu Palcu [Fri, 19 Jan 2018 13:04:37 +0000 (15:04 +0200)]
MLK-17634-5: drm: imx: dcss: overlay planes support HDR

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agodrm: add helper functions for YCBCR420 handling
Shashank Sharma [Thu, 13 Jul 2017 15:33:14 +0000 (21:03 +0530)]
drm: add helper functions for YCBCR420 handling

This patch adds helper functions for YCBCR 420 handling.
These functions do:
- check if a given video mode is YCBCR 420 only mode.
- check if a given video mode is YCBCR 420 also mode.

V2: Added YCBCR functions as helpers in DRM layer, instead of
    keeping it in I915 layer.
V3: Added handling for YCBCR-420 only modes too.
V4: EXPORT_SYMBOL(drm_find_hdmi_output_type)
V5: Addressed review comments from Danvet:
    - %s/drm_find_hdmi_output_type/drm_display_info_hdmi_output_type
    - %s/drm_can_support_ycbcr_output/drm_display_supports_ycbcr_output
    - %s/drm_can_support_this_ycbcr_output/
drm_display_supports_this_ycbcr_output
    - pass drm_display_info instead of drm_connector for consistency
    - For drm_get_highest_quality_ycbcr_supported doc, move the variable
      description above, and then the function description.
V6: Add only YCBCR420 helpers (Ville)
V7: Addressed review comments from Ville
    - Remove cea_vic_valid() check.
    - Fix indentation.
    - Make input parameters to helpers, const.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jose Abreu <Jose.Abreu@synopsys.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499960000-9232-9-git-send-email-shashank.sharma@intel.com
[vsyrjala: Fix sparse indentation warn]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
7 years agodrm/edid: parse ycbcr 420 deep color information
Shashank Sharma [Thu, 13 Jul 2017 15:33:13 +0000 (21:03 +0530)]
drm/edid: parse ycbcr 420 deep color information

CEA-861-F spec adds ycbcr420 deep color support information
in hf-vsdb block. This patch extends the existing hf-vsdb parsing
function by adding parsing of ycbcr420 deep color support from the
EDID and adding it into display information stored.

V2: Rebase
V3: Rebase
V4: Moved definition of y420_dc_modes into this patch, where its used
    (Ville)
V5: Optimize function, if(conditions) not reqd (Ville)
V6: Rebase
V7: Rebase

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499960000-9232-8-git-send-email-shashank.sharma@intel.com
[vsyrjala: Fix sparse indentation warn]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
7 years agodrm/edid: parse sink information before CEA blocks
Shashank Sharma [Thu, 13 Jul 2017 15:33:09 +0000 (21:03 +0530)]
drm/edid: parse sink information before CEA blocks

CEA-861-F adds ycbcr capability map block, for HDMI 2.0 sinks.
This block contains a map of indexes of CEA modes, which can
support YCBCR 420 output also. To avoid multiple parsing of same
CEA block, let's parse the sink information and get this map, before
parsing CEA modes.

This patch moves the call to drm_add_display_info function, before the
mode parsing block.

V4: Introduced new patch in the series
V5: Move this patch before 4:2:0 parsing patch (ville)
    Added r-b from Ville
V6: Rebase
V7: Rebase

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499960000-9232-4-git-send-email-shashank.sharma@intel.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
7 years agodrm/edid: parse YCBCR420 videomodes from EDID
Shashank Sharma [Fri, 14 Jul 2017 10:33:46 +0000 (16:03 +0530)]
drm/edid: parse YCBCR420 videomodes from EDID

HDMI 2.0 spec adds support for YCBCR420 sub-sampled output.
CEA-861-F adds two new blocks in EDID's CEA extension blocks,
to provide information about sink's YCBCR420 output capabilities.

These blocks are:

- YCBCR420vdb(YCBCR 420 video data block):
This block contains VICs of video modes, which can be sopported only
in YCBCR420 output mode (Not in RGB/YCBCR444/422. Its like a normal
SVD block, valid for YCBCR420 modes only.

- YCBCR420cmdb(YCBCR 420 capability map data block):
This block gives information about video modes which can support
YCBCR420 output mode also (along with RGB,YCBCR444/422 etc) This
block contains a bitmap index of normal svd videomodes, which can
support YCBCR420 output too.
So if bit 0 from first vcb byte is set, first video mode in the svd
list can support YCBCR420 output too. Bit 1 means second video mode
from svd list can support YCBCR420 output too, and so on.

This patch adds two bitmaps in display's hdmi_info structure, one each
for VCB and VDB modes. If the source is HDMI 2.0 capable, this patch
adds:
- VDB modes (YCBCR 420 only modes) in connector's mode list, also makes
  an entry in the vdb_bitmap per vic.
- VCB modes (YCBCR 420 also modes) only entry in the vcb_bitmap.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jose Abreu <joabreu@synopsys.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
V2: Addressed
    Review comments from Emil:
    - Use 1ULL<<i instead of 1<<i to make sure the output is 64bit.
    - Use the suggested method for updating dbmap.
    - Add documentation for YCBCR420_vcb_map to fix kbuild warning.

    Review comments from Ville:
    - Do not expose the YCBCR420 flags in uabi layer, keep it internal.
    - Save a map of YCBCR420 modes for future reference.
    - Check db length before trying to parse extended tag.
    - Add a warning if there are > 64 modes in capability map block.
    - Use y420cmdb in function names and macros while dealing with vcb
      to be aligned with spec.
    - Move the display information parsing block ahead of mode parsing
      blocks.

V3: Addressed design/review comments from Ville
    - Do not add flags in video modes, else we have to expose them to user
    - There should not be a UABI change, and kernel should detect the
      choice of the output based on type of mode, and the bitmaps.
    - Use standard bitops from kernel bitmap header, instead of calculating
      bit positions manually.

V4: Addressed review comments from Ville:
    - s/ycbcr_420_vdb/y420vdb
    - s/ycbcr_420_vcb/y420cmdb
    - Be less verbose on description of do_y420vdb_modes
    - Move newmode variable in the loop scope.
    - Use svd_to_vic() to get a VIC, instead of 0x7f
    - Remove bitmap description for CMDB modes & VDB modes
    - Dont add connector->ycbcr_420_allowed check for cmdb modes
    - Remove 'len' variable, in is_y420cmdb function, which is used
      only once
    - Add length check in is_y420vdb function
    - Remove unnecessary if (!db) check in function parse_y420cmdb_bitmap
    - Do not add print about YCBCR 420 modes
    - Fix indentation in few places
    - Move ycbcr420_dc_modes in next patch, where its used
    - Add a separate patch for movement of drm_add_display_info()

V5: Addressed review comments from Ville:
    - Add the patch which cleans up the current EXTENDED_TAG usage
    - Make y420_cmdb_map u64
    - Do not block ycbcr420 modes while parsing the EDID, rather
      add a separate helper function to prune ycbcr420-only modes from
      connector's probed modes.

V6: Rebase
V7: Move this patch after the 420_only validation patch (Ville)
V8: Addressed review comments from Ville
    - use cea_vic_valid check before adding cmdb/vdb modes
    - add check for i < 64 while adding cmdb modes
    - use 1ULL while checking bitmap

Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1500028426-14883-1-git-send-email-shashank.sharma@intel.com
[vsyrjala: Fix checkpatch complaints and indentation]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
7 years agodrm/edid: cleanup patch for CEA extended-tag macro
Shashank Sharma [Thu, 13 Jul 2017 15:33:10 +0000 (21:03 +0530)]
drm/edid: cleanup patch for CEA extended-tag macro

CEA-861-F introduces extended tag codes for EDID extension blocks,
which indicates the actual type of the data block. The code for
using exteded tag is 0x7, whereas in the existing code, the
corresponding macro is named as "VIDEO_CAPABILITY_BLOCK"

This patch renames the macro and usages from "VIDEO_CAPABILITY_BLOCK"
to "USE_EXTENDED_TAG"

V2: Add extended tag code check for video capabilitiy block (ville)
V3: Ville:
- Use suggested names for macros
- Check the block length first, before checking the extended tag
V4: Fix commit message (David)
V5: Introduced this patch into HDMI-YCBCR-output series
V6: Rebase
V7: Rebase

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499960000-9232-5-git-send-email-shashank.sharma@intel.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
7 years agodrm: add helper to validate YCBCR420 modes
Shashank Sharma [Thu, 13 Jul 2017 15:33:11 +0000 (21:03 +0530)]
drm: add helper to validate YCBCR420 modes

YCBCR420 modes are supported only on HDMI 2.0 capable sources.
This patch adds:
- A drm helper to validate YCBCR420-only mode on a particular
  connector. This function will help pruning the YCBCR420-only
  modes from the connector's modelist.
- A bool variable (ycbcr_420_allowed) in the drm connector structure.
  While handling the EDID from HDMI 2.0 sinks, its important to know
  if the source is capable of handling YCBCR420 output, so that no
  YCBCR 420 modes will be listed for sources which can't handle it.
  A driver should set this variable if it wants to see YCBCR420 modes
  in the modedb.

V5: Introduced the patch in series.
V6: Squashed two patches (validate YCBCR420 and add YCBCR420
   identifier)
V7: Addressed review comments from Vile:
    - Move this patch before we add 420 modes from EDID.
    - No need for drm_valid_cea_vic() check, function back to non-static.
    - Update MODE_STATUS with NO_420 condition.
    - Introduce y420_vdb_modes variable in this patch

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499960000-9232-6-git-send-email-shashank.sharma@intel.com
[vsyrjala: Drop the now bogus EXPORT_SYMBOL(drm_valid_cea_vic)]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
7 years agoMLK-17634-4: drm: move hdr_panel_metadata to drm_hdmi_info
Laurentiu Palcu [Thu, 25 Jan 2018 09:27:46 +0000 (11:27 +0200)]
MLK-17634-4: drm: move hdr_panel_metadata to drm_hdmi_info

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-3: drm: edid: fix hdr infoframe creation routine
Laurentiu Palcu [Mon, 12 Feb 2018 08:09:57 +0000 (10:09 +0200)]
MLK-17634-3: drm: edid: fix hdr infoframe creation routine

The frame->type was overwritten, instead of setting the frame->metadata_type
field.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17634-2: drm: edid: add support for HLG EOTF
Laurentiu Palcu [Fri, 9 Feb 2018 08:07:35 +0000 (10:07 +0200)]
MLK-17634-2: drm: edid: add support for HLG EOTF

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agodrm: Enable HDR infoframe support
Uma Shankar [Fri, 19 Jan 2018 12:42:00 +0000 (14:42 +0200)]
drm: Enable HDR infoframe support

Enable Dynamic Range and Mastering Infoframe for HDR
content, which is defined in CEA 861.3 spec.

 The metadata will be computed based on blending
policy in userspace compositors and passed as a connector
property blob to driver. The same will be sent as infoframe
to panel which support HDR.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
7 years agodrm: Parse Colorimetry data block from EDID
Uma Shankar [Mon, 22 Jan 2018 08:06:43 +0000 (10:06 +0200)]
drm: Parse Colorimetry data block from EDID

EA 861.3 spec adds colorimetry data block for HDMI.
Parsing the block to get the colorimetry data from
panel.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
7 years agodrm/edid: detect SCDC support in HF-VSDB
Shashank Sharma [Mon, 13 Mar 2017 11:24:02 +0000 (16:54 +0530)]
drm/edid: detect SCDC support in HF-VSDB

This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
  This structure will be used to save and indicate if sink
  supports advanced HDMI 2.0 features
- Adds another structure drm_scdc within drm_hdmi_info, to
  reflect scdc support and capabilities in connected HDMI 2.0 sink.
- Checks the HF-VSDB block for presence of SCDC, and marks it
  in scdc structure
- If SCDC is present, checks if sink is capable of generating
  SCDC read request, and marks it in scdc structure.

V2: Addressed review comments
  Thierry:
  - Fix typos in commit message and make abbreviation consistent
    across the commit message.
  - Change structure object name from hdmi_info -> hdmi
  - Fix typos and abbreviations in description of structure drm_hdmi_info
    end the description with a full stop.
  - Create a structure drm_scdc, and keep all information related to SCDC
    register set (supported, read request supported) etc in it.

  Ville:
  - Change rr -> read_request
  - Call drm_detect_scrambling function drm_parse_hf_vsdb so that all
    of HF-VSDB parsing can be kept in same function, in incremental
    patches.

V3: Rebase.
V4: Rebase.
V5: Rebase.
V6: Addressed review comments from Ville
  - Add clock rate calculations for 1/10 and 1/40 ratios
  - Remove leftovers from old patchset
V7: Added R-B from Jose.
V8: Rebase.
V9: Rebase.
V10: Rebase.

Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1489404244-16608-5-git-send-email-shashank.sharma@intel.com
7 years agodrm/edid: detect SCDC support in HF-VSDB
Shashank Sharma [Mon, 13 Mar 2017 11:24:01 +0000 (16:54 +0530)]
drm/edid: detect SCDC support in HF-VSDB

This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
  This structure will be used to save and indicate if sink
  supports advanced HDMI 2.0 features
- Adds another structure drm_scdc within drm_hdmi_info, to
  reflect scdc support and capabilities in connected HDMI 2.0 sink.
- Checks the HF-VSDB block for presence of SCDC, and marks it
  in scdc structure
- If SCDC is present, checks if sink is capable of generating
  SCDC read request, and marks it in scdc structure.

V2: Addressed review comments
 Thierry:
 - Fix typos in commit message and make abbreviation consistent
   across the commit message.
 - Change structure object name from hdmi_info -> hdmi
 - Fix typos and abbreviations in description of structure drm_hdmi_info
   end the description with a full stop.
 - Create a structure drm_scdc, and keep all information related to SCDC
   register set (supported, read request supported) etc in it.

Ville:
 - Change rr -> read_request
 - Call drm_detect_scrambling function drm_parse_hf_vsdb so that all
   of HF-VSDB parsing can be kept in same function, in incremental
   patches.

V3: Rebase.
V4: Rebase.
V5: Rebase.
V6: Rebase.
V7: Added R-B from Jose.
V8: Rebase.
V9: Rebase.
V10: Rebase.

Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1489404244-16608-4-git-send-email-shashank.sharma@intel.com
7 years agodrm/edid: check for HF-VSDB block
Thierry Reding [Mon, 13 Mar 2017 11:24:00 +0000 (16:54 +0530)]
drm/edid: check for HF-VSDB block

This patch implements a small function that finds if a
given CEA db is hdmi-forum vendor specific data block
or not.

V2: Rebase.
V3: Added R-B from Jose.
V4: Rebase
V5: Rebase
V6: Rebase
V7: Rebase
V8: Rebase
V9: Rebase
V10: Rebase

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1489404244-16608-3-git-send-email-shashank.sharma@intel.com
7 years agodrm: Add SCDC helpers
Thierry Reding [Mon, 13 Mar 2017 11:23:59 +0000 (16:53 +0530)]
drm: Add SCDC helpers

SCDC is a mechanism defined in the HDMI 2.0 specification that allows
the source and sink devices to communicate.

This commit introduces helpers to access the SCDC and provides the
symbolic names for the various registers defined in the specification.

V2: Rebase.
V3: Added R-B from Jose.
V4: Rebase
V5: Addressed review comments from Ville
 - Handle the I2c return values in a better way (dp_dual_mode)
 - Make the macros for SCDC Major/Minor more readable, by adding
   a 'GET' in the macro names
V6: Rebase
V7: Rebase
V8: Rebase
V9: Rebase
V10: Rebase

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1489404244-16608-2-git-send-email-shashank.sharma@intel.com
7 years agodrm: Implement HDR source metadata set and get property handling
Uma Shankar [Wed, 31 May 2017 10:10:55 +0000 (15:40 +0530)]
drm: Implement HDR source metadata set and get property handling

HDR source metadata set and get property implemented in this
patch. The blob data is received from userspace and saved in
connector state, the same is returned as blob in get property
call to userspace.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
7 years agodrm: Make drm_atomic_replace_property_blob_from_id() more generic
Jyri Sarha [Fri, 21 Apr 2017 09:51:13 +0000 (12:51 +0300)]
drm: Make drm_atomic_replace_property_blob_from_id() more generic

Change drm_atomic_replace_property_blob_from_id()'s first parameter
from drm_crtc to drm_device, so that the function can be used for other
drm_mode_objects too.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/851b8504c7f294a10645ba6f6d391ac9764068b7.1492768073.git.jsarha@ti.com
7 years agodrm: Add a new connector atomic property for link status
Manasi Navare [Fri, 16 Dec 2016 10:29:06 +0000 (12:29 +0200)]
drm: Add a new connector atomic property for link status

At the time userspace does setcrtc, we've already promised the mode
would work. The promise is based on the theoretical capabilities of
the link, but it's possible we can't reach this in practice. The DP
spec describes how the link should be reduced, but we can't reduce
the link below the requirements of the mode. Black screen follows.

One idea would be to have setcrtc return a failure. However, it
already should not fail as the atomic checks have passed. It would
also conflict with the idea of making setcrtc asynchronous in the
future, returning before the actual mode setting and link training.

Another idea is to train the link "upfront" at hotplug time, before
pruning the mode list, so that we can do the pruning based on
practical not theoretical capabilities. However, the changes for link
training are pretty drastic, all for the sake of error handling and
DP compliance, when the most common happy day scenario is the current
approach of link training at mode setting time, using the optimal
parameters for the mode. It is also not certain all hardware could do
this without the pipe on; not even all our hardware can do this. Some
of this can be solved, but not trivially.

Both of the above ideas also fail to address link degradation *during*
operation.

The solution is to add a new "link-status" connector property in order
to address link training failure in a way that:
a) changes the current happy day scenario as little as possible, to
avoid regressions, b) can be implemented the same way by all drm
drivers, c) is still opt-in for the drivers and userspace, and opting
out doesn't regress the user experience, d) doesn't prevent drivers
from implementing better or alternate approaches, possibly without
userspace involvement. And, of course, handles all the issues presented.
In the usual happy day scenario, this is always "good". If something
fails during or after a mode set, the kernel driver can set the link
status to "bad" and issue a hotplug uevent for userspace to have it
re-check the valid modes through GET_CONNECTOR IOCTL, and try modeset
again. If the theoretical capabilities of the link can't be reached,
the mode list is trimmed based on that.

v7 by Jani:
* Rebase, simplify set property while at it, checkpatch fix
v6:
* Fix a typo in kernel doc (Sean Paul)
v5:
* Clarify doc for silent rejection of atomic properties by driver (Daniel Vetter)
v4:
* Add comments in kernel-doc format (Daniel Vetter)
* Update the kernel-doc for link-status (Sean Paul)
v3:
* Fixed a build error (Jani Saarinen)
v2:
* Removed connector->link_status (Daniel Vetter)
* Set connector->state->link_status in drm_mode_connector_set_link_status_property
(Daniel Vetter)
* Set the connector_changed flag to true if connector->state->link_status changed.
* Reset link_status to GOOD in update_output_state (Daniel Vetter)
* Never allow userspace to set link status from Good To Bad (Daniel Vetter)

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Eric Anholt <eric@anholt.net> (for the -modesetting patch)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/0182487051aa9f1594820e35a4853de2f8747b4e.1481883920.git.jani.nikula@intel.com
7 years agodrm: Add HDR capabilty field to plane structure
Uma Shankar [Wed, 31 May 2017 10:10:54 +0000 (15:40 +0530)]
drm: Add HDR capabilty field to plane structure

Hardware may have HDR capability on certain plane
engines. Enabling the same in drm plane structure
so that this can be communicated to user space.

Each drm driver should set this flag to true for planes
which support HDR.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
7 years agodrm: Parse HDR metadata info from EDID
Uma Shankar [Fri, 19 Jan 2018 10:54:25 +0000 (12:54 +0200)]
drm: Parse HDR metadata info from EDID

HDR metadata block is introduced in CEA-861.3 spec.
Parsing the same to get the panel's HDR metadata.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
7 years agodrm: Add CEA extended tag blocks and HDR bitfield macros
Uma Shankar [Wed, 31 May 2017 10:10:50 +0000 (15:40 +0530)]
drm: Add CEA extended tag blocks and HDR bitfield macros

Add bit field and macro for extended tag in CEA block. Also,
declare macros for HDR metadata block.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
7 years agodrm: Add HDR source metadata property
Uma Shankar [Wed, 31 May 2017 10:10:49 +0000 (15:40 +0530)]
drm: Add HDR source metadata property

This patch adds a blob property to get HDR metadata
information from userspace. This will be send as part
of AVI Infoframe to panel.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
7 years agoMLK-17634-1: drm: imx: dcss: send vblank event from ISR
Laurentiu Palcu [Fri, 19 Jan 2018 07:02:23 +0000 (09:02 +0200)]
MLK-17634-1: drm: imx: dcss: send vblank event from ISR

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-15071: ASoC: fsl: imx-ak5558: Fix clk for 384KHz and 786KHz
Daniel Baluta [Wed, 28 Feb 2018 12:59:12 +0000 (14:59 +0200)]
MLK-15071: ASoC: fsl: imx-ak5558: Fix clk for 384KHz and 786KHz

With the current multipliers SAI isn't able to derive a correct bitclk.

e.g: When recording at 786Khz with current multiplier

MCLK = 24576000, requested freq 24576000 but SAI wants:
MCLK = (DIV + 1) * 2 * freq [SAI TCR2], so an acceptable solution
is to add a 2x factor to mclk.

Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMGS-3703 gpu-viv: fix coverity issue 1477266
Yuchou Gan [Tue, 27 Feb 2018 15:50:16 +0000 (23:50 +0800)]
MGS-3703 gpu-viv: fix coverity issue 1477266

fix coverity high impact issue for 1477266

Signed-off-by: Yuchou Gan <yuchou.gan@nxp.com>
7 years agoMLK-17626 Use DEFINE_SPINLOCK for imx_ccm_lock
Adriana Reus [Mon, 26 Feb 2018 15:03:53 +0000 (17:03 +0200)]
MLK-17626 Use DEFINE_SPINLOCK for imx_ccm_lock

If spinlock debug is enabled there are BUG_ON asserts in
place for default values on the spinlock_t members.
DEFINE_SPINLOCK declares and initializes the spinlock and
avoids triggering those.

Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Tested-by: Marius Vlad <marius-cristian.vlad@nxp.com>
Acked-By: Marius Vlad <marius-cristian.vlad@nxp.com>
7 years agoMLK-17620-2: ASoC: imx-cdnhdmi: switch to generic hdmi codec
Shengjiu Wang [Mon, 26 Feb 2018 07:13:02 +0000 (15:13 +0800)]
MLK-17620-2: ASoC: imx-cdnhdmi: switch to generic hdmi codec

switch to generic hdmi codec, which provide the api for get
the edid information.
Add snd controls which is the interface for user to query
the HDMI capibility. ( channels, rates, formats)

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
7 years agoMLK-17620-1: hdp: register generic hdmi codec driver
Shengjiu Wang [Mon, 26 Feb 2018 07:12:32 +0000 (15:12 +0800)]
MLK-17620-1: hdp: register generic hdmi codec driver

Register generic hdmi codec driver, and move audio related
code to an independent file.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
7 years agodrm: Check for lessee in DROP_MASTER ioctl
Keith Packard [Fri, 19 Jan 2018 01:51:59 +0000 (17:51 -0800)]
drm: Check for lessee in DROP_MASTER ioctl

Don't let a lessee control what the current DRM master is set to;
that's the job of the "real" master. Otherwise, the lessee would
disable all access to master operations for the owner and all lessees
under it.

This matches the same check made in the SET_MASTER ioctl.

Signed-off-by: Keith Packard <keithp@keithp.com>
Fixes: 2ed077e467ee ("drm: Add drm_object lease infrastructure [v5]")
Cc: <stable@vger.kernel.org> # v4.15+
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20180119015159.1606-1-keithp@keithp.com
Signed-off-by: Marius Vlad <marius-cristian.vlad@nxp.com>
(cherry-picked 761e05a702f5d537ffcc from git://people.freedesktop.org/~airlied/linux)

7 years agodrm: move lease init after validation in drm_lease_create
Keith Packard [Thu, 21 Dec 2017 06:54:24 +0000 (22:54 -0800)]
drm: move lease init after validation in drm_lease_create

Patch bd36d3bab2e3d08f80766c86487090dbceed4651 fixed a deadlock in the
failure path of drm_lease_create. This made the partially initialized
lease object visible for a short window of time.

To avoid having the lessee state appear transiently, I've rearranged
the code so that the lessor fields are not filled in until the
parameters are all validated and the function will succeed.

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20171221065424.1304-1-keithp@keithp.com
Signed-off-by: Marius Vlad <marius-cristian.vlad@nxp.com>
(cherry-picked d2a48e52541cdf4 from git://people.freedesktop.org/~airlied/linux)

7 years agoMLK-17459-4: drm: imx: dcss: fix weston
Laurentiu Palcu [Fri, 23 Feb 2018 10:39:22 +0000 (12:39 +0200)]
MLK-17459-4: drm: imx: dcss: fix weston

This patch fixes an issue introduced by the cropping patches which made
weston look bad. That's because use_dtrc flag was enabled if modifiers
were present. However, graphics plane can have modifiers too. This patch
adds an extra check.

Also, remove an unnecessary debug message.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
7 years agoMLK-17323 usb: cdns3: fix the kernel dump during the reboot stress test
Peter Chen [Mon, 15 Jan 2018 02:16:03 +0000 (10:16 +0800)]
MLK-17323 usb: cdns3: fix the kernel dump during the reboot stress test

During the reboot stress test, there may "nobody cared irq" for CDNS3,
the interrupts are occurred during the controller is entering low power
mode. In fact, we do no expect interrupt during this period, so disable
controller interrupt for it. With this patch, the kernel dump does
not occur again during reboot stress test.

[   18.460516] irq 44: nobody cared (try booting with the "irqpoll" option)
[   18.467222] CPU: 0 PID: 112 Comm: kworker/0:1 Not tainted 4.9.51-04150-ge84b58d-dirty #1198
[   18.475573] Hardware name: Freescale i.MX8QXP MEK (DT)
[   18.480720] Workqueue: pm pm_runtime_work
[   18.484739] Call trace:
[   18.487186] [<ffff0000080884e0>] dump_backtrace+0x0/0x1e0
[   18.492588] [<ffff0000080886d4>] show_stack+0x14/0x20
[   18.497644] [<ffff0000083e571c>] dump_stack+0x94/0xb8
[   18.502701] [<ffff0000081062c0>] __report_bad_irq+0x38/0xe8
[   18.508276] [<ffff000008106644>] note_interrupt+0x20c/0x2e0
[   18.513853] [<ffff00000810386c>] handle_irq_event_percpu+0x44/0x58
[   18.520038] [<ffff0000081038c8>] handle_irq_event+0x48/0x78
[   18.525608] [<ffff000008107260>] handle_fasteoi_irq+0xb8/0x1b0
[   18.531445] [<ffff000008102894>] generic_handle_irq+0x24/0x38
[   18.537187] [<ffff000008102f04>] __handle_domain_irq+0x5c/0xb8
[   18.543017] [<ffff00000808163c>] gic_handle_irq+0xbc/0x168
[   18.548506] Exception stack(0xffff80083ff4ae00 to 0xffff80083ff4af30)
[   18.554946] ae00: ffff80083ff4ae30 0001000000000000 ffff80083ff4af60 ffff0000080c1fec
[   18.562781] ae20: 0000000040000145 ffff80083a474000 0000000000000000 0000000000000000
[   18.570617] ae40: 00000000fffeecc3 ffff000008a2d368 00000000020c49ba 0000000000000020
[   18.578454] ae60: 000000000f78257c 7fffffffffffffff 0000000000000020 ffff80083a403f00
[   18.586290] ae80: ffff80083ff51ab0 ffff000008cb0b68 00000000000003ef 0000000000000000
[   18.594125] aea0: 0000000000000011 00000000000003ef 0000000000000019 0000000000000001
[   18.601962] aec0: 0000000000000007 ffff0000092f9000 ffff0000092f5b08 0000000000000000
[   18.609798] aee0: ffff000009501180 ffff80083a002a80 ffff80083a474000 00000000fffeecc2
[   18.617634] af00: ffff80083ff4b090 ffff000009336000 0000000000000002 ffff80083ff4af60
[   18.625469] af20: ffff0000080c243c ffff80083ff4af60
[   18.630343] [<ffff0000080827b0>] el1_irq+0xb0/0x124
[   18.635220] [<ffff0000080c243c>] irq_exit+0xac/0xf0
[   18.640099] [<ffff000008102f08>] __handle_domain_irq+0x60/0xb8
[   18.645928] [<ffff00000808163c>] gic_handle_irq+0xbc/0x168
[   18.651409] Exception stack(0xffff80083a477ad0 to 0xffff80083a477c00)

Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>