linux.git
2 years agoarm64: dts: imx8mn-somdevices.dtsi: Disable usbotg1 over current. rel_imx_5.10.35_2.0.0-somdevices.1
Josep Orga [Tue, 4 Apr 2023 11:26:37 +0000 (13:26 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Disable usbotg1 over current.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: imx8mn-somdevices.dtsi: Disconnect over current USB signal.
Josep Orga [Tue, 4 Apr 2023 11:25:48 +0000 (13:25 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Disconnect over current USB signal.
· As GPIO1_IO13 is used as ecspi2 CS1 signal.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: imx8mn-somdevices.dtsi: Add CS1 to ecspi2 and flexspi.
Josep Orga [Tue, 4 Apr 2023 11:24:09 +0000 (13:24 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Add CS1 to ecspi2 and flexspi.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: imx8mn-somdevices.dtsi: Disable BT from UART1.
Josep Orga [Tue, 4 Apr 2023 11:23:18 +0000 (13:23 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Disable BT from UART1.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: imx8mn-somdevices.dtsi: arm64: dts: Change old I2C4_SCL pin:
Josep Orga [Tue, 4 Apr 2023 11:22:09 +0000 (13:22 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: arm64: dts: Change old I2C4_SCL pin:
· PMIC INT changed to SD1_STROBE_GPIO2_IO11.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: imx8mn-somdevices.dtsi: Change old UART4 pins:
Josep Orga [Tue, 4 Apr 2023 11:14:19 +0000 (13:14 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Change old UART4 pins:
· Ethernet phy reset changed to SAI2_MCLK_GPIO4_IO27.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: imx8mn-somdevices.dtsi: Add UART4 peripheral.
Josep Orga [Tue, 4 Apr 2023 11:11:00 +0000 (13:11 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Add UART4 peripheral.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: imx8mm-somdevices.dtsi: Disable usbotg1 over current.
Josep Orga [Tue, 4 Apr 2023 11:05:00 +0000 (13:05 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Disable usbotg1 over current.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: Disconnect over current USB signals.
Josep Orga [Tue, 10 Jan 2023 17:40:21 +0000 (18:40 +0100)]
arm64: dts: Disconnect over current USB signals.
· As GPIO1_IO13 is used as ecspi2 CS1 signal.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: Add CS1 to ecspi2 and flexspi.
Josep Orga [Tue, 10 Jan 2023 17:35:58 +0000 (18:35 +0100)]
arm64: dts: Add CS1 to ecspi2 and flexspi.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: Disable BT from UART1.
Josep Orga [Tue, 10 Jan 2023 17:33:11 +0000 (18:33 +0100)]
arm64: dts: Disable BT from UART1.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: Change old I2C4_SCL pin:
Josep Orga [Tue, 10 Jan 2023 17:27:48 +0000 (18:27 +0100)]
arm64: dts: Change old I2C4_SCL pin:
· PMIC INT changed to SD1_STROBE_GPIO2_IO11.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: Change old UART4 pins:
Josep Orga [Tue, 10 Jan 2023 17:22:20 +0000 (18:22 +0100)]
arm64: dts: Change old UART4 pins:
· Ethernet phy reset changed to SAI2_MCLK_GPIO4_IO27.
· Pcie clkreq changed to I2C4_SCL_PCIE1_CLKREQ_B.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: Add UART4 peripheral.
Josep Orga [Tue, 10 Jan 2023 17:15:19 +0000 (18:15 +0100)]
arm64: dts: Add UART4 peripheral.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: Enable PCIe and set PCIe reference clock as internal PLL. rel_imx_5.10.35_2.0.0-somdevices.0
Josep Orga [Wed, 5 Oct 2022 16:06:02 +0000 (18:06 +0200)]
arm64: dts: Enable PCIe and set PCIe reference clock as internal PLL.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoarm64: dts: Enable pca9450 level shifter.
Josep Orga [Wed, 5 Oct 2022 16:05:13 +0000 (18:05 +0200)]
arm64: dts: Enable pca9450 level shifter.

Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoregulator: pca9450: Make I2C Level Translator configurable
Josep Orga [Wed, 5 Oct 2022 15:02:50 +0000 (17:02 +0200)]
regulator: pca9450: Make I2C Level Translator configurable

Make the I2C Level Translator included in PCA9450 configurable from devicetree. The reset state is off. By setting nxp,i2c-lt-enable, the I2C Level Translator will be enabled while in STANDBY or RUN state.

Signed-off-by: Per-Daniel Olsson <perdo@axis.com>
Signed-off-by: Rickard x Andersson <rickaran@axis.com>
Link: https://lore.kernel.org/r/20220429072211.24957-2-rickaran@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Josep Orga <jorga@somdevices.com>
2 years agoregulator: Add property for I2C level shifter
Josep Orga [Wed, 5 Oct 2022 15:01:24 +0000 (17:01 +0200)]
regulator: Add property for I2C level shifter

By setting nxp,i2c-lt-enable the I2C level translator is enabled.

Signed-off-by: Per-Daniel Olsson <perdo@axis.com>
Signed-off-by: Rickard x Andersson <rickaran@axis.com>
Link: https://lore.kernel.org/r/20220429072211.24957-1-rickaran@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: defconfig: imx8mmn_somdevices_defconfig: Set CONFIG_CRC_CCITT as y to match...
Josep Orga [Wed, 17 Nov 2021 08:22:57 +0000 (09:22 +0100)]
arm64: defconfig: imx8mmn_somdevices_defconfig: Set CONFIG_CRC_CCITT as y to match CONFIG_PPP_ASYNC configuration.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: defconfig: imx8mmn_somdevices_defconfig: Add modem detection and PPP configura...
Josep Orga [Tue, 16 Nov 2021 17:44:14 +0000 (18:44 +0100)]
arm64: defconfig: imx8mmn_somdevices_defconfig: Add modem detection and PPP configuration.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mmn somdevices dts: Add phy-reset-in-suspend to somdevices dtsi files...
Josep Orga [Thu, 28 Oct 2021 16:08:21 +0000 (18:08 +0200)]
arm64: dts: imx8mmn somdevices dts: Add phy-reset-in-suspend to somdevices dtsi files fec.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agonet: fec: Add phy-reset-in-suspend functionality.
Josep Orga [Thu, 28 Oct 2021 16:06:59 +0000 (18:06 +0200)]
net: fec: Add phy-reset-in-suspend functionality.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices-C0P1.dts: Changed leds to gpio-leds.
Josep Orga [Thu, 28 Oct 2021 16:04:25 +0000 (18:04 +0200)]
arm64: dts: imx8mn-somdevices-C0P1.dts: Changed leds to gpio-leds.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mm-somdevices.dtsi: Add flexspi device.
Josep Orga [Thu, 28 Oct 2021 15:52:40 +0000 (17:52 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Add flexspi device.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices.dtsi: Add gpio pinctrl to i2c1 pins.
Josep Orga [Thu, 28 Oct 2021 15:47:51 +0000 (17:47 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Add gpio pinctrl to i2c1 pins.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices.dtsi: Changes to decrease temperature.
Josep Orga [Thu, 28 Oct 2021 11:26:44 +0000 (13:26 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Changes to decrease temperature.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices.dtsi: Add SN65DSI83 support and eeprom.
Josep Orga [Mon, 11 Oct 2021 11:24:12 +0000 (13:24 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Add SN65DSI83 support and eeprom.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices.dtsi: Add SPI and SPI CAN controller.
Josep Orga [Mon, 11 Oct 2021 07:37:09 +0000 (09:37 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Add SPI and SPI CAN controller.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices.dtsi: Set proper configuration to usb1 (otg).
Josep Orga [Mon, 11 Oct 2021 07:28:01 +0000 (09:28 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Set proper configuration to usb1 (otg).

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices.dtsi: Set proper pins: · Set proper pins to pmic, usdhc...
Josep Orga [Mon, 11 Oct 2021 07:13:32 +0000 (09:13 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Set proper pins: · Set proper pins to pmic, usdhc2, mipi_csi, sai5 and uart2. · Added SMARC gpios.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices.dtsi: Configure WiFi/BT pins.
Josep Orga [Mon, 11 Oct 2021 07:00:55 +0000 (09:00 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Configure WiFi/BT pins.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices.dtsi: Configure memory and allocate less cma memory.
Josep Orga [Fri, 8 Oct 2021 17:26:54 +0000 (19:26 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Configure memory and allocate less cma memory.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices.dtsi: Disabled not used peripherals.
Josep Orga [Fri, 8 Oct 2021 11:56:19 +0000 (13:56 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Disabled not used peripherals.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices.dtsi: Removed not used peripherals.
Josep Orga [Fri, 8 Oct 2021 11:40:25 +0000 (13:40 +0200)]
arm64: dts: imx8mn-somdevices.dtsi: Removed not used peripherals.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: defconfig: Renamed defconfig to imx8mmn_somdevices_defconfig as somdevices...
Josep Orga [Fri, 8 Oct 2021 10:48:04 +0000 (12:48 +0200)]
arm64: defconfig: Renamed defconfig to imx8mmn_somdevices_defconfig as somdevices imx8mm and imx8mn boards will use same defconfig.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices: Add support for AR8035 phy.
Josep Orga [Fri, 8 Oct 2021 10:37:23 +0000 (12:37 +0200)]
arm64: dts: imx8mn-somdevices: Add support for AR8035 phy.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mn-somdevices: Changed heartbeat gpio led.
Josep Orga [Fri, 8 Oct 2021 10:28:09 +0000 (12:28 +0200)]
arm64: dts: imx8mn-somdevices: Changed heartbeat gpio led.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: Added imx8mn-somdevices-C0P1.dts.
Josep Orga [Fri, 8 Oct 2021 10:19:31 +0000 (12:19 +0200)]
arm64: dts: Added imx8mn-somdevices-C0P1.dts.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: Added imx8mn-evk.dts features to imx8mn-somdevices.dtsi.
Josep Orga [Fri, 8 Oct 2021 10:18:46 +0000 (12:18 +0200)]
arm64: dts: Added imx8mn-evk.dts features to imx8mn-somdevices.dtsi.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: Added imx8mn-somdevices.dtsi copying imx8mn-evk.dtsi.
Josep Orga [Fri, 8 Oct 2021 10:00:57 +0000 (12:00 +0200)]
arm64: dts: Added imx8mn-somdevices.dtsi copying imx8mn-evk.dtsi.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: video: Added somdevices fullscreen logo [1024x600]
Alejandro Benete [Wed, 6 Oct 2021 11:32:35 +0000 (13:32 +0200)]
arm64: video: Added somdevices fullscreen logo [1024x600]

Signed-off-by: Alejandro Benete <abenete@somdevices.com>
3 years agoarm64: dts: imx8mm-somdevices.dtsi: Changes to decrease temperature.
Josep Orga [Mon, 4 Oct 2021 16:16:24 +0000 (18:16 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Changes to decrease temperature.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: defconfig: imx8mm_somdevices_defconfig: Add CAN and SN65DSI83 support.
Josep Orga [Fri, 13 Aug 2021 10:46:21 +0000 (12:46 +0200)]
arm64: defconfig: imx8mm_somdevices_defconfig: Add CAN and SN65DSI83 support.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mm-somdevices.dtsi: Add SN65DSI83 support and eeprom.
Josep Orga [Fri, 13 Aug 2021 10:44:52 +0000 (12:44 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Add SN65DSI83 support and eeprom.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agodrm: bridge: add support for TI SN65DSI83 MIPI DSI -> LVDS bridge.
Josep Orga [Fri, 13 Aug 2021 10:34:01 +0000 (12:34 +0200)]
drm: bridge: add support for TI SN65DSI83 MIPI DSI -> LVDS bridge.
Based on https://github.com/karo-electronics/karo-tx-linux/commits/imx_5.10.9_1.0.0/drivers/gpu/drm/bridge/sn65dsi83
Commits 8ddea41926c08f5afdec3589f57a63d1d28b7aec and 9512d3fdb4b00b7b575e7349b3cfcdc3b20a7306.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mm-somdevices.dtsi: Add SPI CAN controller.
Josep Orga [Fri, 13 Aug 2021 10:30:24 +0000 (12:30 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Add SPI CAN controller.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mm-somdevices.dtsi: Set proper configuration to usb1 (otg) and add...
Josep Orga [Fri, 13 Aug 2021 10:22:06 +0000 (12:22 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Set proper configuration to usb1 (otg) and add usb2 (host).

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mm-somdevices.dtsi: Set proper pins:
Josep Orga [Fri, 13 Aug 2021 10:13:02 +0000 (12:13 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Set proper pins:
· Set proper pins to pmic, pcie, usdhc2, mipi_csi, sai5 and uart2.
· Added SMARC gpios.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mm-somdevices.dtsi: Configure WiFi/BT pins.
Josep Orga [Fri, 13 Aug 2021 09:57:56 +0000 (11:57 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Configure WiFi/BT pins.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mm-somdevices.dtsi: Configure memory and allocate less cma memory.
Josep Orga [Fri, 13 Aug 2021 09:41:28 +0000 (11:41 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Configure memory and allocate less cma memory.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mm-somdevices.dtsi: Disabled not used peripherals:
Josep Orga [Fri, 13 Aug 2021 09:35:51 +0000 (11:35 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Disabled not used peripherals:
· Disabled mipi_csi and pcie.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: imx8mm-somdevices.dtsi: Removed not used peripherals.
Josep Orga [Fri, 13 Aug 2021 09:29:15 +0000 (11:29 +0200)]
arm64: dts: imx8mm-somdevices.dtsi: Removed not used peripherals.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: defconfig: Add imx8mm_somdevices_defconfig copying imx_v8_defconfig.
Josep Orga [Fri, 13 Aug 2021 08:58:53 +0000 (10:58 +0200)]
arm64: defconfig: Add imx8mm_somdevices_defconfig copying imx_v8_defconfig.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: Add support for AR8035 phy.
Josep Orga [Tue, 10 Aug 2021 16:01:31 +0000 (18:01 +0200)]
arm64: dts: Add support for AR8035 phy.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: Changed heartbeat gpio led.
Josep Orga [Tue, 10 Aug 2021 15:51:03 +0000 (17:51 +0200)]
arm64: dts: Changed heartbeat gpio led.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: Added imx8mm-somdevices-C0P1.dts.
Josep Orga [Tue, 10 Aug 2021 11:18:52 +0000 (13:18 +0200)]
arm64: dts: Added imx8mm-somdevices-C0P1.dts.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: Added imx8mm-evk.dts features to imx8mm-somdevices.dtsi.
Josep Orga [Tue, 10 Aug 2021 09:37:29 +0000 (11:37 +0200)]
arm64: dts: Added imx8mm-evk.dts features to imx8mm-somdevices.dtsi.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agoarm64: dts: Added imx8mm-somdevices.dtsi copying imx8mm-evk.dtsi.
Josep Orga [Tue, 10 Aug 2021 08:38:23 +0000 (10:38 +0200)]
arm64: dts: Added imx8mm-somdevices.dtsi copying imx8mm-evk.dtsi.

Signed-off-by: Josep Orga <jorga@somdevices.com>
3 years agosdk_dpaa: rework private bpool seeding per CPU per interface
Camelia Groza [Tue, 8 Jun 2021 10:33:42 +0000 (13:33 +0300)]
sdk_dpaa: rework private bpool seeding per CPU per interface

The dpa_bp introduction has modified the existing design of buffer
pool seeding. The most notable (and unintended) change was that
instead of placing in the buffer pool an allotment of buffers for
each CPU, for each interface, only an allotment for each CPU was
performed. With this, the possibility that in certain scenarios,
each interface can draw from the buffer pool enough buffers to
drain it completely, but not enough to trigger a refill. This may
result in a complete stall of the reception on the interface.

The current patch reintroduces the initial design, that makes sure
each probed interface contributes to the common buffer pool an
allotment of buffers for each CPU, removing the above mentioned
issue.

In consequence, the per buffer pool seed_cb() callback is removed.
The seeding is now done at net device probe.

Reported-by: Radu Bulie <radu-andrei.bulie@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
3 years agoRevert "swiotlb: don't modify orig_addr in swiotlb_tbl_sync_single"
Jason Liu [Tue, 8 Jun 2021 09:43:46 +0000 (17:43 +0800)]
Revert "swiotlb: don't modify orig_addr in swiotlb_tbl_sync_single"

This reverts commit 85a5a6875ca93dc4efbf20df942ba41d27a917e3.

The tlb_addr might not be aligned with tlb bucket size when call
swiotlb_tbl_sync_single, which will result in data corruption.
The issue was seen when do the tcrypt test: modprobe tcrypt mode=211 sec=1
The call stack as the followings: the tlb_addr might be: 0x00000000c280f9c0
for example, in one of the test:
testing speed of rfc4106(gcm(aes)) (rfc4106-gcm-aes-caam) decryption

[   64.985483] Hardware name: NXP i.MX8MPlus EVK board (DT)
[   64.990793] Call trace:
[   64.993245]  dump_backtrace+0x0/0x1a0
[   64.996909]  show_stack+0x18/0x70
[   65.000226]  dump_stack+0xd0/0x128
[   65.003629]  swiotlb_tbl_sync_single+0x16c/0x1bc
[   65.008248]  dma_sync_single_for_device+0xf4/0x12c
[   65.013054]  rfc4106_setkey+0x68/0x9c [caam_jr]
[   65.017586]  crypto_aead_setkey+0x2c/0x60
[   65.021600]  test_aead_speed.constprop.0+0x264/0x660 [tcrypt]
[   65.027346]  do_test+0x37fc/0x5c48 [tcrypt]
[   65.031531]  tcrypt_mod_init+0x58/0x1000 [tcrypt]
[   65.036235]  do_one_initcall+0x54/0x1c0
[   65.040071]  do_init_module+0x54/0x250
[   65.043819]  load_module+0x6d0/0x78c
[   65.047395]  __do_sys_finit_module+0xb8/0x100
[   65.051752]  __arm64_sys_finit_module+0x24/0x30
[   65.056283]  el0_svc_common.constprop.0+0x78/0x1a0
[   65.061073]  do_el0_svc+0x24/0x90
[   65.064389]  el0_svc+0x14/0x20
[   65.067444]  el0_sync_handler+0x1a4/0x1b0
[   65.071453]  el0_sync+0x178/0x180

The fix was to adjust orig_addr by adding the offset back by revert the patch.

Fixes:85a5a6875ca9("swiotlb: don't modify orig_addr in swiotlb_tbl_sync_single)
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
Cc: Horia Geanta <horia.geanta@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
3 years agonet: phy: mscc: configure in-band auto-negotiation for VSC8514
Vladimir Oltean [Sun, 29 Mar 2020 21:01:34 +0000 (00:01 +0300)]
net: phy: mscc: configure in-band auto-negotiation for VSC8514

Add the in-band configuration knob for the VSC8514 quad PHY. Tested with
QSGMII in-band AN both on and off on NXP LS1028A-RDB and T1040-RDB.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
3 years agonet: phylink: explicitly configure in-band autoneg for PHYs that support it
Vladimir Oltean [Fri, 12 Feb 2021 17:01:52 +0000 (19:01 +0200)]
net: phylink: explicitly configure in-band autoneg for PHYs that support it

Currently Linux has no control over whether a MAC-to-PHY interface uses
in-band signaling or not, even though phylink has the
managed = "in-band-status";
property which denotes that the MAC expects in-band signaling to be used.

The problem is really that if the in-band signaling is configurable in
both the PHY and the MAC, there is a risk that they are out of sync
unless phylink manages them both. Most if not all in-band autoneg state
machines follow IEEE 802.3 clause 37, which means that they will not
change the operating mode of the SERDES lane from control to data mode
unless in-band AN completed successfully. Therefore traffic will not
work.

It is particularly unpleasant that currently, we assume that PHYs which
have configurable in-band AN come pre-configured from a prior boot stage
such as U-Boot, because once the bootloader changes, all bets are off.

Let's introduce a new PHY driver method for configuring in-band autoneg,
and make phylink be its first user. The main PHY library does not call
phy_config_inband_autoneg, because it does not know what to configure it
to. Presumably, non-phylink drivers can also call phy_config_inband_autoneg
individually.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
3 years agosdk_dpaa: memac: fix AQR autoneg to lower than 10G partners
Camelia Groza [Tue, 24 Nov 2020 11:08:35 +0000 (13:08 +0200)]
sdk_dpaa: memac: fix AQR autoneg to lower than 10G partners

Stop removing unsupported system side modes with AQR PHYs. Originally,
their removal didn't impact the modes advertised by the PHY. Since
auto-negotiation support was added to the aquantia driver, the
unsupported modes were no longer advertised. This prohibited the
PHY from negotiating with 1G link partners on LS1046ARDB.

Patch adapted from similar fix for the upstream DPAA1 Ethernet driver:
commit fddb5a50801a ("dpaa_eth: support all modes with rate adapting PHYs")

Aquantia auto-negotiation:
commit 09c4c57f7bc4 ("net: phy: aquantia: add support for auto-negotiation
configuration")

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
3 years agofsl_qbman: remove reference to archdata.iommu_domain for v5.9
Camelia Groza [Mon, 7 Jun 2021 08:30:32 +0000 (11:30 +0300)]
fsl_qbman: remove reference to archdata.iommu_domain for v5.9

The dev->archdata.iommu_domain was removed in upstream kernel v5.9
in commit 6255c8c8d256 ("powerpc/dma: Remove dev->archdata.iommu_domain").

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
3 years agopowerpc/configs/sdk_dpaa: update targets to corenet_base.config for v5.5
Camelia Groza [Wed, 3 Mar 2021 12:06:10 +0000 (14:06 +0200)]
powerpc/configs/sdk_dpaa: update targets to corenet_base.config for v5.5

The base config was renamed in upstream commit 58b12eb28e34
("powerpc/configs: Rename foo_basic_defconfig to foo_base.config").

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
3 years agoLF-3296-1 arm64:move elfcorehdr reservation early for crash dump kernel
Nikhil Gupta [Tue, 9 Mar 2021 04:07:46 +0000 (09:37 +0530)]
LF-3296-1 arm64:move elfcorehdr reservation early for crash dump kernel

elfcorehdr_addr is fixed address passed to 2nd kernel which may be conflicted
with potential reserved memory in 2nd kernel,so reserve_elfcorehdr() ahead of
early_init_fdt_scan_reserved_mem() can relieve this situation.

Signed-off-by: Nikhil Gupta <nikhil.gupta@nxp.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Aisheng Dong <aisheng.dong@nxp.com>
3 years agoLF-3296-2 watchdog: sbsa_gwdt: add shutdown hook to driver
Zhao Qiang [Mon, 24 Aug 2020 07:18:33 +0000 (15:18 +0800)]
LF-3296-2 watchdog: sbsa_gwdt: add shutdown hook to driver

Kexec maybe need more time than timeout of wdt(sbsa)
which will reset the system.
So it is necessary to add shutdown hook to disable the
wdt when run kexec.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoMLK-25508: dmaengine: imx-sdma: fix kernel dump in audio record
Robin Gong [Fri, 21 May 2021 17:17:49 +0000 (01:17 +0800)]
MLK-25508: dmaengine: imx-sdma: fix kernel dump in audio record

Check whether audiomix really off or not in runtime resume, if not, do
nothing at HW level including script load to avoid the below crash:

[   40.348730] kernel BUG at mm/vmalloc.c:2064!
[   40.353001] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
[   40.358486] Modules linked in:
[   40.361547] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.10.35-05035-g08680b128d38-dirty #490
[   40.369984] Hardware name: NXP i.MX8MPlus EVK board (DT)
[   40.375297] pstate: 00000005 (nzcv daif -PAN -UAO -TCO BTYPE=--)
[   40.381310] pc : __get_vm_area_node+0x164/0x188
[   40.385842] lr : vmap+0x84/0x100
[   40.389069] sp : ffff800011bdba80
[   40.392384] x29: ffff800011bdba80 x28: 0000000000000000
[   40.397700] x27: ffff0000c0447548 x26: ffff0000c69b80d4
[   40.403015] x25: 0000000000001000 x24: 006800000000070b
[   40.408333] x23: ffff0000c7399300 x22: 0000000000001000
[   40.413651] x21: 0000000000000010 x20: 0000000000000001
[   40.418972] x19: fffffdfffff01540 x18: 00000000000000c0
[   40.424290] x17: 0000000000000000 x16: 0000000000000000
[   40.429605] x15: fffffdfffff024c0 x14: fffffdfffff024c8
[   40.434921] x13: dead000000000122 x12: 0000000000001000
[   40.440236] x11: ffff00017f3fba08 x10: ffff80016dc2b000
[   40.445552] x9 : ffffffffffffffff x8 : 0000000000010001
[   40.450870] x7 : ffff8000100f51a0 x6 : 0000000000000cc0
[   40.456187] x5 : 00000000ffffffff x4 : fffffdffbfff0000
[   40.461505] x3 : ffff800010000000 x2 : 0000000000000010
[   40.466821] x1 : 0000000000000001 x0 : 0000000000001000
[   40.472137] Call trace:
[   40.474588]  __get_vm_area_node+0x164/0x188
[   40.478775]  dma_common_contiguous_remap+0xa8/0xe8
[   40.483568]  dma_direct_alloc+0x194/0x320
[   40.487581]  dma_alloc_attrs+0x7c/0xe0
[   40.491333]  sdma_load_script+0x64/0x170
[   40.495260]  sdma_runtime_resume+0x1cc/0x1e8
[   40.499533]  pm_generic_runtime_resume+0x28/0x40
[   40.504153]  __genpd_runtime_resume+0x2c/0xa0
[   40.508512]  genpd_runtime_resume+0x88/0x208
[   40.512784]  __rpm_callback+0xd4/0x148
[   40.516535]  rpm_callback+0x20/0x80
[   40.520025]  rpm_resume+0x39c/0x580
[   40.523515]  __pm_runtime_resume+0x38/0x80
[   40.527614]  sdma_int_handler+0x40/0x380
[   40.531539]  __handle_irq_event_percpu+0x4c/0x160
[   40.536243]  handle_irq_event_percpu+0x30/0x88
[   40.540686]  handle_irq_event+0x44/0xd8
[   40.544525]  handle_fasteoi_irq+0xb4/0x160
[   40.548621]  generic_handle_irq+0x2c/0x40
[   40.552632]  __handle_domain_irq+0x60/0xb8
[   40.556730]  gic_handle_irq+0x54/0x118
[   40.560482]  el1_irq+0xc0/0x180
[   40.563626]  cpuidle_enter_state+0x134/0x2e8
[   40.567898]  cpuidle_enter+0x34/0x48
[   40.571476]  call_cpuidle+0x18/0x38
[   40.574963]  do_idle+0x1f4/0x258
[   40.578190]  cpu_startup_entry+0x20/0x68
[   40.582116]  rest_init+0xd4/0xe0
[   40.585347]  arch_call_rest_init+0xc/0x14
[   40.589359]  start_kernel+0x470/0x4a4
[   40.593027] Code: aa1403e0 a94153f3 a8c67bfd d65f03c0 (d4210000)
[   40.599126] ---[ end trace 1207e0499c4741de ]---

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-1723: spi: lpspi: run transfer speed_hz sanity check
Clark Wang [Mon, 31 May 2021 02:34:49 +0000 (10:34 +0800)]
LF-1723: spi: lpspi: run transfer speed_hz sanity check

Coverity reports Division or modulo by zero potential issue(CWE-369)
about the provided transfer speed_hz. Run sanity check first to avoid this
problem.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agodpaa2-mac: workaround for zero advertising on the MAC
Ioana Ciornei [Wed, 2 Jun 2021 15:27:55 +0000 (18:27 +0300)]
dpaa2-mac: workaround for zero advertising on the MAC

It seems there are some circumstances in the latest MC firmware versions
where an empty advertising field is returned by the dpmac_get_link_cfg()
command. This will eventually lead to the link not going up.
Work around this issue by skipping PHY reconfiguration if this happens.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
3 years agodpaa2-eth: Set congestion group before the Rx queues become operational
Radu Bulie [Fri, 30 Apr 2021 00:59:35 +0000 (03:59 +0300)]
dpaa2-eth: Set congestion group before the Rx queues become operational

Setting  the CGID for the first time or dynamically changing it
with a different one  on a FQ that has been in service (has frames in it)
is not supported, the byte/frame counts in both the old and new CGRs may be
corrupted if this is done.

This patch adds the configuration of the CGR(congestion group record)
for the network interface RX queues, in the probe function before the queues
become operational,  to prevent the corruption of the aforementioned counter.

Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
3 years agodpaa2-console.c: free buffer before returning from dpaa2_console_read
Robert-Ionut Alexa [Fri, 23 Apr 2021 09:01:51 +0000 (12:01 +0300)]
dpaa2-console.c: free buffer before returning from dpaa2_console_read

Dpaa2_console_read function frees kbuf buffer before returning.
The variable no longer goes out of scope, leaking the storage it
points to.

Signed-off-by: Robert-Ionut Alexa <robert-ionut.alexa@nxp.com>
3 years agodpaa2-eth: fix a possible null pointer dereference
Robert-Ionut Alexa [Mon, 31 May 2021 10:30:04 +0000 (13:30 +0300)]
dpaa2-eth: fix a possible null pointer dereference

In case the FD that we are cleaning up on the Tx confirmation path
is corrupted (carries a wrong SWA type), there will be no skb
to work with.

Signed-off-by: Robert-Ionut Alexa <robert-ionut.alexa@nxp.com>
3 years agoLF-3799 dpaa2-switch: convert BR_STATE enum to DPSW_STP_STATE enum
Robert-Ionut Alexa [Fri, 21 May 2021 08:47:05 +0000 (11:47 +0300)]
LF-3799 dpaa2-switch: convert BR_STATE enum to DPSW_STP_STATE enum

Starting with mc 10.28.0, the firmware returns an error any time
an invalid STP state is configured.
An explicit function converts from BR_STATE_* kernel enums to
DPSW_STP_STATE_* mc enums.

Signed-off-by: Robert-Ionut Alexa <robert-ionut.alexa@nxp.com>
3 years agoLF-3798: dprc-driver.c: resource pools are no longer initialized
Robert-Ionut Alexa [Tue, 25 May 2021 09:12:03 +0000 (12:12 +0300)]
LF-3798: dprc-driver.c: resource pools are no longer initialized

dprc_scan_container() function is no longer called on a device
endpoint lookup, which, in turn, called fsl_mc_init_all_resource_pools.
Scanning for objects is done using the dprc_scan_objects()
function directly.

Signed-off-by: Robert-Ionut Alexa <robert-ionut.alexa@nxp.com>
3 years agoLF-3715-2 arm64: dts: imx8mp-evk: add "rtl821x,clkout-disable" property for PHY
Joakim Zhang [Thu, 27 May 2021 11:26:43 +0000 (19:26 +0800)]
LF-3715-2 arm64: dts: imx8mp-evk: add "rtl821x,clkout-disable" property for PHY

Add "rtl821x,clkout-disable" property to disable CLKOUT clock for
Ethernet PHY.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-3715-1 net: phy: realtek: change "rtl821x,clkout_en" to "rtl821x,clkout-disable"
Joakim Zhang [Thu, 27 May 2021 11:21:37 +0000 (19:21 +0800)]
LF-3715-1 net: phy: realtek: change "rtl821x,clkout_en" to "rtl821x,clkout-disable"

For PHY RTL8211FDI-CG, CLKOUT clock default is enabled by hardware, use
"rtl821x,clkout-disable" property to disable CLKOUT if user required. If
use "rtl821x,clkout_en" property to enable CLKOUT clock, it will block existing
cases which need this CLKOUT for MAC but doesn't add this property. It's
safe to change "rtl821x,clkout_en" to "rtl821x,clkout-disable", as to be
removed property("rtl821x,clkout_en") never been used in the kernel
tree.

Camelia Groza validated on LS1043ARDB.

Tested-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-3886 [#imx-2532] Coverity Issue:15625673 Uninitialized scalar variable
Nicușor Cîțu [Wed, 26 May 2021 09:57:24 +0000 (12:57 +0300)]
LF-3886 [#imx-2532] Coverity Issue:15625673 Uninitialized scalar variable

Signed-off-by: Nicușor Cîțu <nicusor.citu@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-3811 net: fec: fix TX Bandwidth Fluctuations
Joakim Zhang [Fri, 14 May 2021 08:52:44 +0000 (16:52 +0800)]
LF-3811 net: fec: fix TX Bandwidth Fluctuations

MAC-NET IP with AVB support, queue 0 for best-effor, and queue 1&2 for AVB.
The default bandwidth configured of queue 1&2 is 50% in the driver, which
leads to TX bandwidth fluctuations when selecting queue 1&2 for transmitting
packets. Select queue based on VLAN info when AVB enabled.

Commit da722186f654 ("net: fec: set GPR bit on suspend by DT configuration.")
refactor the fec_devtype, need adjust downstream code accordingly.

Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-3831 net: stmmac: fix system hang if change mac address after interface ifdown
Joakim Zhang [Thu, 20 May 2021 10:25:30 +0000 (18:25 +0800)]
LF-3831 net: stmmac: fix system hang if change mac address after interface ifdown

Fix system hang with below sequences:
~# ifconfig ethx down
~# ifconfig ethx hw ether xx:xx:xx:xx:xx:xx

After ethx down, stmmac all clocks gated off and then register access
causes system hang.

Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-3861 arm64: dts: imx8mm/n-evk: disable over current for usb1
Li Jun [Tue, 25 May 2021 08:24:36 +0000 (16:24 +0800)]
LF-3861 arm64: dts: imx8mm/n-evk: disable over current for usb1

Since imx8mm and imx8mn evk base board does not support over current
detection for usb1, so disable it.

Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-3803: drm: imx: mhdp: Move phy_power function to encoder_enable
Sandor Yu [Thu, 20 May 2021 05:48:49 +0000 (13:48 +0800)]
LF-3803: drm: imx: mhdp: Move phy_power function to encoder_enable

Split power up function to arc and phy only power up functions.
Move phy power up function to encoder_enable.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-3830 Revert "MLK-21499 arm: imx: put pads into OFF state before entering VLLS"
Jacky Bai [Fri, 21 May 2021 07:59:44 +0000 (15:59 +0800)]
LF-3830 Revert "MLK-21499 arm: imx: put pads into OFF state before entering VLLS"

This reverts commit 6bec1553aaf630b80c9239d8895d423843f31801.

Put all the pads into off mode have side effect if the pad used for
GPIO interrupt. system suspend/resume will be broken, We can not
add it in our generic release.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-3794: ASoC: fsl_xcvr: Fix hang issue after suspend with RX recording
Shengjiu Wang [Wed, 19 May 2021 10:26:14 +0000 (18:26 +0800)]
LF-3794: ASoC: fsl_xcvr: Fix hang issue after suspend with RX recording

There is a unhandled interrupt after suspend, which cause endless
interrupt when system resume, so system will hang.

Disable all interrupt in runtime suspend callback.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-3819: ASoC: fsl_spdif: Fix unexpected interrupt after suspend
Shengjiu Wang [Fri, 21 May 2021 04:57:17 +0000 (12:57 +0800)]
LF-3819: ASoC: fsl_spdif: Fix unexpected interrupt after suspend

When system enter suspend,  the machine driver suspend callback
function will be called, then the cpu driver trigger callback
(SNDRV_PCM_TRIGGER_SUSPEND) be called, the interrupt should be
disabled

But the machine driver suspend and cpu dai driver suspend order
maybe changed, the cpu dai driver's suspend callback is called before
machine driver's suppend callback, then the interrupt is not cleared
successfully in trigger callback.

So need to clear interrupts in cpu dai driver's suspend callback
to avoid such issue.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
3 years agoLF-3779 remoteproc: imx_rproc: fix earlyboot detection
Peng Fan [Fri, 14 May 2021 10:58:33 +0000 (18:58 +0800)]
LF-3779 remoteproc: imx_rproc: fix earlyboot detection

Here the earlyboot detection updated to use 0xB for the low four bits.
The previous detection not work, because with BIT0 set, BIT1 will
be automatically set, and BIT3 are also set by us.

So we detect BIT[3,1,0] here.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 years agoMLK-25413: fsl_xcvr: Fix channel swap issue with ARC
Shengjiu Wang [Thu, 13 May 2021 05:44:53 +0000 (13:44 +0800)]
MLK-25413: fsl_xcvr: Fix channel swap issue with ARC

With pause and resume test for ARC, there is occassionally
channel swap. Change the clearing dpath operation after
the dma enablement to fix this issue.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
3 years agoLF-3773 media: isi: m2m: only fill colorspace when userspace don't touch them
Guoniu.zhou [Thu, 13 May 2021 01:50:02 +0000 (09:50 +0800)]
LF-3773 media: isi: m2m: only fill colorspace when userspace don't touch them

Only fill colorspace, ycbcr_enc, xfer_func and quantization when userspace
don't touch them.

Signed-off-by: Bing Song <bing.song@nxp.com>
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
3 years agoLF-3774-3 ASoC: SOF: Fix sof_ipc_msg_data for compress streams
Daniel Baluta [Wed, 12 May 2021 17:17:31 +0000 (20:17 +0300)]
LF-3774-3 ASoC: SOF: Fix sof_ipc_msg_data for compress streams

sof_ipc_msg_data relies on sof_pcm_stream to retrieve the Host position
offset. This doesn't work for compress audio.

For compressed audio we need to retrieve position offset from
sof_compr_stream.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
3 years agoLF-3774-2 ASoC: SOF: imx: Use newly introduced generic IPC stream ops
Daniel Baluta [Tue, 11 May 2021 17:52:48 +0000 (20:52 +0300)]
LF-3774-2 ASoC: SOF: imx: Use newly introduced generic IPC stream ops

This makes IMX use the newly introduced generic IPC ops
instead of imx specific ones.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
3 years agoLF-3774-1 ASoC: sof: Make Intel IPC stream ops generic
Daniel Baluta [Tue, 11 May 2021 18:18:25 +0000 (21:18 +0300)]
LF-3774-1 ASoC: sof: Make Intel IPC stream ops generic

This operations should be generic as there is nothing Intel
specific.
This works well for NXP i.MX8 stream IPC ops.

We start by moving sof/intel/intel-ipc.c into sof/stream.c and
rename
the functions to be generic.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
3 years agoMLK-25489 arm64: imx8mx: vpu: correct width-stride for RGB formats
Shijie Qin [Thu, 13 May 2021 04:22:00 +0000 (12:22 +0800)]
MLK-25489 arm64: imx8mx: vpu: correct width-stride for RGB formats

For imx8mm(hantro h1 encoder), per width-stride need to align to 16.
RGB16: width-strde = bytesperline / 2
RGBX: width-stride = bytesperline / 4

Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: Hou Qi <qi.hou@nxp.com>
3 years agoMGS-6145 [#imx-2455] fix the QueryIdle fail when no weston
Jiyu Yang [Thu, 29 Apr 2021 08:47:03 +0000 (16:47 +0800)]
MGS-6145 [#imx-2455] fix the QueryIdle fail when no weston

When GPU hardware become idle, FE address will fall into
last wait-link loop, Wait-link has 2 instructions,
each instruction is 8 bytes, the valid offset is [0, 16],
Original programming is wrong to test FE not in idle
with last wait-link + 16.

Signed-off-by: Jiyu Yang <jiyu.yang@nxp.com>
3 years agoMLK-25468: seco_mu: hook v2x reset event
Frank Li [Tue, 20 Apr 2021 16:04:29 +0000 (11:04 -0500)]
MLK-25468: seco_mu: hook v2x reset event

after get v2x reset event, return error at read
v2x reset after system enter ks1.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
3 years agoMGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode
Nicușor Cîțu [Thu, 29 Apr 2021 13:47:32 +0000 (16:47 +0300)]
MGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode

Fixed the "vgHardware" case.

Signed-off-by: Nicușor Cîțu <nicusor.citu@nxp.com>
3 years agoMGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode
Nicușor Cîțu [Wed, 21 Apr 2021 14:59:27 +0000 (17:59 +0300)]
MGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode

Move the suspend semaphore inside the suspend/resume routines.

Signed-off-by: Nicușor Cîțu <nicusor.citu@nxp.com>
3 years agoMGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode
Nicușor Cîțu [Wed, 21 Apr 2021 07:54:20 +0000 (10:54 +0300)]
MGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode

The suspend will acquire the global semaphore, and a later gcvPOWER_ON_AUTO
determined by a new commit will wait for global semaphore until a GPU resume
(power ON) release the global semaphore, then the gcvPOWER_ON_AUTO will
continue to run. But during the stress test, the sequence might change.
For example:
1. GPU goes to suspend; if a new commit comes then gcvPOWER_ON_AUTO will
wait for global semaphore.
2. GPU goes to resume, a global power ON will release the global semaphore,
gcvPOWER_ON_AUTO acquire the global semaphore successfully but will release
it by itself because gcvPOWER_ON_AUTO is not a global state and it won't
occupy a global semaphore.
3. The next GPU suspend will also acquire the global semaphore successfully.
As the GPU suspend and gcvPOWER_ON_AUTO are in two threads, there is a certain
probability that suspend is executed first, then gcvPOWER_ON_AUTO, so that the
later GPU stall (from suspend) will occur at the same time with new
commit abd will cause the GPU hang.

Suggested-by: Zhe Pan <Zhe.Pan@verisilicon.com>
Signed-off-by: Nicușor Cîțu <nicusor.citu@nxp.com>
3 years agoMGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode
Nicușor Cîțu [Thu, 15 Apr 2021 06:59:26 +0000 (09:59 +0300)]
MGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode

Put GPU into suspend instead of idle. Suspend will also disable internal clocks.

Signed-off-by: Nicușor Cîțu <nicusor.citu@nxp.com>
3 years agoMGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode
Nicușor Cîțu [Wed, 14 Apr 2021 13:22:56 +0000 (16:22 +0300)]
MGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode

Remove the unneded hack, I never run into that code and see it really
works.

Signed-off-by: Nicușor Cîțu <nicusor.citu@nxp.com>
3 years agoMGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode
Nicușor Cîțu [Wed, 14 Apr 2021 13:15:02 +0000 (16:15 +0300)]
MGS-6197 [#imx-2532] GPU crash when changing gpu_govern mode

No need to power on during suspend.
1. If the GPU core is already on, then no change performed.
2. If the GPU core is already in idle/suspend/power_off it means the
   Stall has already been done.
   No need to power it on again and put into idle state again.
3. If the GPU core is in idle and we want to put into suspend or
   power_off, that will be handled inside the
   gckHARDWARE_SetPowerState().

Signed-off-by: Nicușor Cîțu <nicusor.citu@nxp.com>