Anson Huang [Wed, 21 Jun 2017 02:56:35 +0000 (10:56 +0800)]
MLK-15131-1 defconfig: enable SNVS RTC
Enable SNVS RTC for i.MX8MQ by default.
The change of CONFIG_I2C_MUX is introduced by
running savedefconfig.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang [Tue, 20 Jun 2017 15:12:58 +0000 (23:12 +0800)]
MLK-15128-7 clk: imx: add i.mx8mq clock driver support
Add i.MX8MQ clock driver support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Anson Huang [Tue, 20 Jun 2017 15:11:29 +0000 (23:11 +0800)]
MLK-15128-6 soc: imx: add psci gpc support for i.mx8mq
Add i.MX8MQ PSCI GPC virtual driver support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Anson Huang [Tue, 20 Jun 2017 15:10:41 +0000 (23:10 +0800)]
MLK-15128-5 ARM64: kconfig: enable i.mx8mq pinctrl driver
Enable i.MX8MQ pinctrl driver by default.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang [Tue, 20 Jun 2017 15:08:34 +0000 (23:08 +0800)]
MLK-15128-4 pinctrl: freescale: add i.mx8mq pinctrl driver support
Add i.MX8MQ pinctrl driver support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Anson Huang [Tue, 20 Jun 2017 15:05:52 +0000 (23:05 +0800)]
MLK-15128-3 pinctrl: freescale: support scu and memmap pinctrl together
As i.MX8MQ is a ARM64 SoC but it does NOT use SCU pinctrl, so
need to support both SCU and MEMMAP pinctrl together for ARM64
build.
use IMX8_USE_SCU flag to distinguish SCU and MEMMAP pinctrl
type.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Anson Huang [Tue, 20 Jun 2017 15:03:54 +0000 (23:03 +0800)]
MLK-15128-2 ARM64: dts: freescale: add i.mx8mq dtsi and evk dtb
Add i.MX8MQ dtsi and EVK board dtb.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Chenyan Feng <ella.feng@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Anson Huang [Tue, 20 Jun 2017 15:03:02 +0000 (23:03 +0800)]
MLK-15128-1 dt-bindings: imx8mq: add clock and pinctrl head file
Add i.MX8MQ clock and pinctrl file.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Radu Solea [Fri, 16 Jun 2017 11:02:50 +0000 (14:02 +0300)]
MLK-14765: Fix DCP Aes timeout issues when used with CTS
The DCP driver does not obey cryptlen, when doing CTS this results in
passing to hardware input stream lengths which are not multiple of
block size. This causes the hw to misbehave. Also not honoring
cryptlen makes CTS fail. A check was introduced to prevent future
erroneous stream lengths from reaching the hardware. Code which is
splitting the input stream in internal DCP pages was changed to obey
cryptlen.
Signed-off-by: Radu Solea <radu.solea@nxp.com>
Radu Solea [Wed, 7 Jun 2017 14:18:03 +0000 (17:18 +0300)]
MLK-14765: Fix DCP SHA null hashes and output length
On imx6sl and imx6ull DCP writes at least 32 bytes in the output
buffer instead of hash length as documented. Add intermediate buffer
to prevent write out of bounds.
When requested to produce null hashes DCP fails to produce valid
output. Add software workaround to bypass hardware and return valid output.
Signed-off-by: Radu Solea <radu.solea@nxp.com>
Xianzhong [Wed, 7 Jun 2017 09:27:35 +0000 (17:27 +0800)]
MGS-2949 [#ccc] revert power management workaround for imx8
SCFW crash is fixed, need drop the temporal workaround.
Date: Jun 07, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Xianzhong [Sun, 18 Jun 2017 03:28:23 +0000 (11:28 +0800)]
MGS-2970-2 [#imx-603] fix dual gpu hang with power management
gpu1 hang is reproducible when run es32 cts with power mangement.
there is the gpu1 power-off/up when commit gpu0 and gpu1 early or late,
then gpu0 will break the inter-semaphore & stall from gpu1, and end up,
when gpu1 execute its command, will stuck to wait for gpu0 infinitely.
prevent the unexpected power-off bofore command commit on dual cores.
Date: Jun 18, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Xianzhong [Fri, 9 Jun 2017 10:12:49 +0000 (18:12 +0800)]
MGS-2970-1 [#imx-603] fix dual gpu hang with power management
gpu mode is lost after power-off, hence gpu hang in dual mode,
this patch can configure gpu mode for each power-up properly.
Date: Jun 09, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Xianzhong [Tue, 6 Jun 2017 06:17:49 +0000 (14:17 +0800)]
MGS-2944 [#imx-290] enable GPIPE clock gating
revert the workaround which disable GPIPE clock gating.
Date: June 06, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Xianzhong [Wed, 7 Jun 2017 09:05:47 +0000 (17:05 +0800)]
MGS-2857-2 [#imx-530] cleanup spinlock debug code from gpu kernel
not make sense to use the different codes for spinlock debug
Date: Jun 07, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Daniel Baluta [Thu, 15 Jun 2017 15:48:22 +0000 (18:48 +0300)]
MLK-14663-2: ASoC: fsl: imx-wm8960: Kill warning for non-gpr boards
A side effect of commit
5555277e693a7 ("MLK-13574-1: ASoC: imx-wm8960:
remove the gpr dependency") is that a warning was printed for boards
without gpr. This can be confusing.
imx7d boards do not have a gpr setting, so use imx7d-evk-wm8960
compatible string to avoid printing the warning.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Daniel Baluta [Thu, 15 Jun 2017 15:41:58 +0000 (18:41 +0300)]
MLK-14663-1: ASoC: fsl: imx-wm8960: Refactor GPR parsing
Refactor GPR handling into a function for easier adding support
for non-gpr boards.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Sandor Yu [Tue, 20 Jun 2017 07:45:25 +0000 (15:45 +0800)]
MLK-15124-06: defconfig: Add mx8 image subsystem
Add mx8 image subsystem and v4l2 device.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Tue, 20 Jun 2017 07:40:31 +0000 (15:40 +0800)]
MLK-15124-05: dts: Add imx8qm image subsystem property
Add imx8qm image subsystem property.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Tue, 20 Jun 2017 07:37:16 +0000 (15:37 +0800)]
MLK-15124-04: image ss: Add mx8 image subsystem driver
Add mxc media device driver.
Add mx8 isi device driver.
Add mx8 mipi csi device driver.
Add max9286 sensor driver.
mxc isi driver support CSC and scaling function.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Tue, 20 Jun 2017 07:30:25 +0000 (15:30 +0800)]
MLK-15124-03: clk: Rename image subsystem clock name
Rename image subsystem power domain name.
Rename mipi csi LIS clock name.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Tue, 20 Jun 2017 07:27:53 +0000 (15:27 +0800)]
MLK-15124-02: clk: Add local interrupter clock
Add mipi csi local interrupter clock
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Sandor Yu [Tue, 20 Jun 2017 07:23:11 +0000 (15:23 +0800)]
MLK-15124-01: pm: Add image subsystem power domain name
Add imx8 image subsystem power domain name.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Fugang Duan [Tue, 20 Jun 2017 06:14:03 +0000 (14:14 +0800)]
MLK-15120 ARM: imx7d: clk: select uart3 clock parent and set rate
The clock driver may enable uart clock tree when earlycon/earlyprintk
kernel param is enabled, and the clock gate specify CLK_SET_RATE_GATE,
then .of_clk_set_defaults() set the dts node assigned-rate will be failed.
So set parent and set rate in clock driver is reasonable.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Shengjiu Wang [Mon, 19 Jun 2017 10:36:50 +0000 (18:36 +0800)]
MLK-15104: ASoC: imx-sii902: add constraint for channels
The maximum channel supported by sii902 is 2, but machine
driver use dummy codec, and there is no constraint list
from codec, so add constraint directly in machine driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit
037051e60f3b29fb09aae6f2c97a3532482dfc2a)
Shengjiu Wang [Mon, 19 Jun 2017 07:47:51 +0000 (15:47 +0800)]
MLK-15109-4: ARM64: dts: update esai compatible string
update esai compatible string in imx8qm.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Mon, 19 Jun 2017 03:28:42 +0000 (11:28 +0800)]
MLK-15109-3: ASoC: fsl_esai: add constraint for dma workaround
Use GPT dma event to instead of esai dma event can't totally
resolve/workaround the hardware issue, There is two GPT, one
GPT is to get the failing edge of dma event, then to trigger
EDMA copy data, another one is to get the raising edge, then to
clear the interrupt of both GPT, sometimes, the clear operation
may clear the failing edge event wrongly in race condition.
then the EDMA will stop.
In test result, the high sample rate and multi-channel is easy
to trigger this issue. so add constraint for them to make the
workaround stable
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Mon, 19 Jun 2017 03:28:42 +0000 (11:28 +0800)]
MLK-15109-2: ASoC: fsl_esai: add constrain_period_size
There is limitaion for EDMA, which can only accept the period bytes
that can be divided by maxburst with no remainder. Otherwise EDMA
will not copy the left data in the end, and it will cause noise.
so add constraint for these chips.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Mon, 19 Jun 2017 03:41:44 +0000 (11:41 +0800)]
MLK-15109-1: ASoC: fsl_esai: introduce SoC specific data
Introduce a SoC data struct which contains the differences between
the different SoCs this driver supports. This makes it easy to support
more differences without having to introduce a new switch/case each
time.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Mon, 19 Jun 2017 03:28:07 +0000 (11:28 +0800)]
MLK-15066-2: ASoC: imx-pcm-dma-v2: fix typo issue
fix typo issue
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Mon, 12 Jun 2017 08:27:14 +0000 (16:27 +0800)]
MLK-15066-1: ASoC: imx-pcm-dma-v2: fix noise issue with pulseaudio
Same as commit
c55075170214 ("MLK-14582: ASoC: imx-pcm-rpmsg: fix
audio noise issue with pulseaudio"), need to add a constraint for
SNDRV_PCM_HW_PARAM_PERIODS, which make the period number integer.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Bai Ping [Mon, 19 Jun 2017 09:01:23 +0000 (17:01 +0800)]
MLK-15075 thermal: imx: fix temp read failure on i.mx7d
On i.MX7D, if the system enter LPSR mode, the tempmon module
will be power down, so the regiter's value is lost, so we need
to save the registers before suspend and restore the register after
resume back.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Li Jun [Fri, 16 Jun 2017 16:51:18 +0000 (00:51 +0800)]
MLK-15074-11 ARM64: defconfig: enable CONFIG_BLK_DEV_INITRD
Enable CONFIG_BLK_DEV_INITRD for initramfs of MFG tool.
Signed-off-by: Li Jun <jun.li@nxp.com>
Li Jun [Fri, 16 Jun 2017 17:54:55 +0000 (01:54 +0800)]
MLK-15074-10 usb: gadget: utp: correct the set_fs condition
set_fs() should be done in case:
1. CONFIG_FSL_UTP is not enabled.
2. CONFIG_FSL_UTP is enabled but is_utp_device is false.
Signed-off-by: Li Jun <jun.li@nxp.com>
Li Jun [Fri, 16 Jun 2017 16:49:49 +0000 (00:49 +0800)]
MLK-15074-9 usb: gadget: utp: fix wrong fsg parameter
As common->fsg maybe have not been set correctly while enumration, so
use the correct pointer fsg for utp device check.
Signed-off-by: Li Jun <jun.li@nxp.com>
Li Jun [Fri, 16 Jun 2017 17:40:37 +0000 (01:40 +0800)]
MLK-15074-8 ARM: imx_v7_defconfig: enable CONFIG_FSL_UTP
CONFIG_FSL_UTP is missing for MFG tool, add it.
Signed-off-by: Li Jun <jun.li@nxp.com>
Richard Zhu [Mon, 19 Jun 2017 09:30:12 +0000 (17:30 +0800)]
MLK-15119 PCI: imx: remove the wrong rebased codes
Some codes are wrong rebase back into mainline in
one git pull rebase confliction.
Remove them.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Fugang Duan [Mon, 19 Jun 2017 09:10:09 +0000 (17:10 +0800)]
MLK-15117 ARM64: dts: imx8qxp-lpddr4-arm2: add extended dts for enet2 port
Since lpddr4 arm2 baord enet2 has pin conflict with esai0,
so add extended dts for enet2 port.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Fugang Duan [Mon, 19 Jun 2017 09:05:01 +0000 (17:05 +0800)]
MLK-15118 ARM64: dts: imx8qxp: enable lpuart1/2 and eDMA0
Add lpuart1, lpuart2 and eDMA0 support for imx8qxp.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Richard Zhu [Tue, 13 Jun 2017 06:02:40 +0000 (14:02 +0800)]
MLK-15064-4 PCI: imx: enable pcie support
- add the cpu addr offset
Bit[31:24]
pciea 60 - 6f ---> 40 - 4f
pcieb 70 - 7f ---> 80 - 8f
- internal pll is verified on imx8qxp arm2 board
- use the dma_alloc_coherent to alloc the msi region,
because that imx8 pcie only supports up to 32bit
msi address.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
Richard Zhu [Tue, 13 Jun 2017 05:59:39 +0000 (13:59 +0800)]
MLK-15064-3 clk: imx: enable pcie support
correct the pd definitions of the pcie clks
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
Richard Zhu [Mon, 19 Sep 2016 08:39:44 +0000 (16:39 +0800)]
MLK-15064-2 ARM64: DMA: limit the dma mask to be 32bit
Limit the dma mask to be 32bit, because that
the imx8 doesn't have the 64bit dma capapbility
although it is 64bit soc.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
Richard Zhu [Fri, 26 May 2017 08:41:46 +0000 (16:41 +0800)]
MLK-15064-1 ARM: imx: pcie: enable imx8 pcie
- use one standalone hsio node to share the region to
pciea, pcieb and sata.
- axi master slave and dbi clks and pipe_clk are required
- enable pcieb
change the pd of the pcieb, otherwise, clk is failed to enable
- add the cpu addr offset
Bit[31:24]
pciea 60 - 6f ---> 40 - 4f
pcieb 70 - 7f ---> 80 - 8f
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
Guoniu.Zhou [Mon, 5 Jun 2017 02:05:20 +0000 (10:05 +0800)]
MLK-15041: PXP-V3: enable stroe engine block mode and fill function
1. When pxp do rotation, fetch and store engine need block mode.
2. When use pxp store engine fill function, not only need config
store engine, but also need config fetch engine, otherwise, it
will not work.
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
Liu Ying [Mon, 12 Jun 2017 05:58:09 +0000 (13:58 +0800)]
MLK-15001-42 arm64: dts: fsl-imx8qxp-lpddr4-arm2-it6263: Add it6263 support
This patch adds it6263 LVDS to HDMI transmitter display support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Thu, 8 Jun 2017 02:16:25 +0000 (10:16 +0800)]
MLK-15001-41 arm64: dtsi: fsl-imx8qxp-ldb: Add LDB support
This patch adds LDB support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Thu, 8 Jun 2017 02:11:53 +0000 (10:11 +0800)]
MLK-15001-40 arm64: dtsi: fsl-imx8qxp: Add i2c0_mipi_lvds0/1 support
This patch adds i2c0_mipi_lvds0/1 support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Thu, 8 Jun 2017 01:58:55 +0000 (09:58 +0800)]
MLK-15001-39 arm64: dtsi: fsl-imx8qxp: Add Mixel LVDS combo PHY support
This patch adds Mixel LVDS combo PHY support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Wed, 7 Jun 2017 09:55:34 +0000 (17:55 +0800)]
MLK-15001-38 arm64: dtsi: fsl-imx8qxp: MIPI DSI PD should be contained by DC PD
The MIPI DSI power domains are the child power domains of DC power domain.
So, let's wrap the MIPI DSI power domains by DC power domain.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Wed, 24 May 2017 09:05:52 +0000 (17:05 +0800)]
MLK-15001-37 arm64: dtsi: fsl-imx8qxp: Add pd_mipi_dsi1 support
This patch adds pd_mipi_dsi1 support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Wed, 24 May 2017 09:01:09 +0000 (17:01 +0800)]
MLK-15001-36 arm64: dtsi: fsl-imx8qxp: Set the 1st instance num for pd_mipi_dsi
This patch sets the first instance number for pd_mipi_dsi.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Jun 2017 03:44:11 +0000 (11:44 +0800)]
MLK-15001-35 arm64: dtsi: fsl-imx8qxp: Add display subsystem
This patch adds display subsystem support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Tue, 6 Jun 2017 03:06:27 +0000 (11:06 +0800)]
MLK-15001-34 arm64: dts: fsl-imx8qxp-lpddr4-arm2: Enable dpu
This patch enables dpu.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Jun 2017 03:40:23 +0000 (11:40 +0800)]
MLK-15001-33 arm64: dtsi: fsl-imx8qxp: Add basic dpu node
This patch adds basic dpu node support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Jun 2017 02:58:40 +0000 (10:58 +0800)]
MLK-15001-32 arm64: dts: fsl-imx8qm-lpddr4-arm2-it6263: Add it6263 support
This patch adds it6263 LVDS to HDMI transmitter display support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Jun 2017 02:53:07 +0000 (10:53 +0800)]
MLK-15001-31 arm64: dtsi: fsl-imx8qm: Add LDB support
This patch adds LDB support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Jun 2017 02:49:06 +0000 (10:49 +0800)]
MLK-15001-30 arm64: dtsi: fsl-imx8qm: Add Mixel LVDS PHY support
This patch adds Mixel LVDS PHY support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Jun 2017 02:46:17 +0000 (10:46 +0800)]
MLK-15001-29 arm64: dtsi: fsl-imx8qm: Add display subsystem
This patch adds display subsystem support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Jun 2017 02:44:08 +0000 (10:44 +0800)]
MLK-15001-28 arm64: dts: fsl-imx8qm-lpddr2-arm2: Enable dpu1 and dpu2
This patch enables dpu1 and dpu2.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Jun 2017 02:37:13 +0000 (10:37 +0800)]
MLK-15001-27 arm64: dtsi: fsl-imx8qm: Add basic dpu nodes
This patch adds basic dpu nodes support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Jun 2017 02:10:09 +0000 (10:10 +0800)]
MLK-15001-26 arm64: defconfig: Add ITE IT6263 LVDS to HDMI transmitter support
This patch adds ITE IT6263 LVDS to HDMI transmitter support in arm64 kernel
defconfig.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 27 Mar 2017 09:26:59 +0000 (17:26 +0800)]
MLK-15001-25 drm/bridge: Add ITE IT6263 LVDS to HDMI transmitter support
This patch adds IT6263 video support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 27 Mar 2017 03:31:45 +0000 (11:31 +0800)]
MLK-15001-24 dt-bindings: Add ITE vendor prefix
Add vendor prefix for ITE Tech Inc. http://ite.com.tw/en
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 12 Jun 2017 05:34:26 +0000 (13:34 +0800)]
MLK-15001-23 drm/imx: ldb: Add i.MX8qxp LDB support
This patch adds i.MX8qxp LDB support.
Logics are added to make i.MX8qxp LDB cope with Mixel LVDS combo PHY.
Also, logics are added to handle pixel link quirks for i.MX8qxp LDB.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Tue, 23 May 2017 06:55:17 +0000 (14:55 +0800)]
MLK-15001-22 phy: Add Mixel LVDS combo PHY support
This patch adds Mixel LVDS combo PHY support(MIPI DSI and LVDS combo).
This LVDS PHY supports one LVDS channel in single mode and two channels in
dual mode.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Fri, 2 Jun 2017 09:46:12 +0000 (17:46 +0800)]
MLK-15001-21 drm/imx: ldb: Add i.MX8qm LDB support
This patch adds i.MX8qm LDB support.
Logics are added to make i.MX8qm LDB cope with Mixel LVDS PHY.
Also, logics are added to handle pixel link padding quirks for i.MX8qm LDB.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 24 Apr 2017 05:59:40 +0000 (13:59 +0800)]
MLK-15001-20 phy: Add Mixel LVDS PHY support
This patch adds Mixel LVDS PHY support.
This PHY supports two LVDS channels.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 24 Apr 2017 05:57:11 +0000 (13:57 +0800)]
MLK-15001-19 dt-bindings: Add Mixel vendor prefix
Add vendor prefix for Mixel, Inc. http://mixel.com
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Fri, 2 Jun 2017 09:39:45 +0000 (17:39 +0800)]
MLK-15001-18 drm/imx: ldb: Revert an out-of-tree commit
To follow the upstreaming implementation:
Revert commit
de361832a52a ("MLK-12184 drm/imx: imx-ldb: add mux id check").
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Fri, 2 Jun 2017 09:37:04 +0000 (17:37 +0800)]
MLK-15001-17 arm64: defconfig: Enable i.MX DRM/KMS support
This patch enables i.MX DRM/KMS support in arm64 kernel defconfig.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Sun, 22 Jan 2017 06:23:16 +0000 (14:23 +0800)]
MLK-15001-16 drm/imx: Add DPU KMS support
This patch adds i.MX DPU KMS support.
Currently, only the DPU fetchdecodes are supported as DRM planes.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Thu, 12 Jan 2017 07:07:51 +0000 (15:07 +0800)]
MLK-15001-15 drm/imx: ipuv3-kms: Move to a new ipuv3 folder
Since we want to add i.MX DPU support into imx-drm, the IPUv3 KMS driver
can be put into the ipuv3 folder to organize the driver code better.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Thu, 12 Jan 2017 07:00:37 +0000 (15:00 +0800)]
MLK-15001-14 drm/imx: ipuv3-crtc: Rename some IPUv3 specific functions
Since we want to add i.MX DPU support into imx-drm, the IPUv3 specific
KMS function names should be no more too generic with the prefix 'imx_drm'.
Let's rename them to be prefixed with 'ipu'.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Thu, 8 Jun 2017 02:47:08 +0000 (10:47 +0800)]
MLK-15001-13 drm/imx: Extract IPUv3 specific KMS functions to ipuv3-kms.c
Since we want to add i.MX DPU support into imx-drm, the imx-drm core
driver should be no more IPUv3 specific. Let's make imx-drm more generic
and extract IPUv3 specific KMS functions to ipuv3-kms.c.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Fri, 2 Jun 2017 09:27:44 +0000 (17:27 +0800)]
MLK-15001-12 arm64: defconfig: Enable i.MX DPU core support
This patch enables i.MX DPU core support in the arm64 kernel defconfig.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Wed, 12 Apr 2017 08:30:34 +0000 (16:30 +0800)]
MLK-15001-11 gpu: Move ipuv3 and dpu to imx folder
IPUv3 and DPU are both i.MX display processing units.
To organize the driver code better, let's introduce the imx folder for them.
Later, we may put more drivers into this folder, e.g., the prefetch engines.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Dec 2016 05:38:22 +0000 (13:38 +0800)]
MLK-15001-10 gpu: Add dpu base driver
DPU is the display processing unit embedded in i.MX8qm and i.MX8qxp.
It was originally designed by Fujitsu.
The first revision has capture controller, display controller and blit engine.
The second revision is a lite one and has display controller and blit engine.
This patch adds a base driver for DPU, which provides a thin register wrapper,
interrurpt support and client platform device register for the upper layer to
use. Currently, the driver only supports the display controller at the pixel
processing level and only the fetchdecodes are supported/tested as the fetch
units.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Tue, 9 May 2017 09:39:41 +0000 (17:39 +0800)]
MLK-15001-9 media: bus format: Add RGB101010_1X7X5_SPWG/JEIDA support
This patch adds 30bit RGB101010 LVDS pixel formats support for
the SPWG and JEIDA LVDS mapping standards. Each pixel is transferred
on 5 lanes with 7bit respectively.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Tue, 9 May 2017 09:38:37 +0000 (17:38 +0800)]
MLK-15001-8 media: bus format: Add RGB666_1X30_PADLO support
This patch adds 30bit RGB666 with low padding support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Tue, 9 May 2017 09:16:27 +0000 (17:16 +0800)]
MLK-15001-7 media: bus format: Add RGB888_1X30_PADLO support
This patch adds 30bit RGB888 with low padding support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Wed, 22 Mar 2017 03:50:06 +0000 (11:50 +0800)]
MLK-15001-6 media: bus format: Add RGB101010_1X30 support
This patch adds 30bit RGB101010 pixel format support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Wed, 31 May 2017 02:58:46 +0000 (10:58 +0800)]
MLK-15001-5 clk: imx8qxp: Add some clocks support for DC and MIPI-LVDS SSs
This patch adds some clocks support for DC and MIPI-LVDS subsystems.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Mon, 5 Jun 2017 03:21:01 +0000 (11:21 +0800)]
MLK-15001-4 arm64: dts: fsl-imx8qm-lpddr4-arm2: Remove it6263 support
No driver works with the it6263 nodes, so let's remove them.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Fri, 2 Jun 2017 08:27:14 +0000 (16:27 +0800)]
MLK-15001-3 arm64: fsl-imx8qm.dtsi: Remove lvds nodes
No driver works with the lvds nodes, so let's remove them.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Fri, 2 Jun 2017 08:24:34 +0000 (16:24 +0800)]
MLK-15001-2 arm64: fsl-imx8qm.dtsi: Remove imxdpu nodes
No driver works with the imxdpu nodes, so let's remove them.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying [Fri, 2 Jun 2017 08:18:27 +0000 (16:18 +0800)]
MLK-15001-1 arm64: fsl-imx8qm.dtsi: Remove framebuffer nodes
No driver works with the framebuffer nodes, so let's remove them.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Richard Zhu [Thu, 15 Jun 2017 03:41:34 +0000 (11:41 +0800)]
MLK-15080 PCI: imx: pcie ep can't be probed properly
iMX7D Sabre SD board implement the GPIO expander
connected to a peripheral bus.
Probe deferral would be triggered when try to request
the expanded GPIO at the first time.
pcie ep can't be probed properly at the second probe,
because of the duplicated registration of the sysfs.
Change the registeration point of the sysfs to fix
this issue.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Han Xu [Thu, 15 Jun 2017 20:39:50 +0000 (15:39 -0500)]
MLK-15076: arm: dts: insulate ULP kernel boot from M4 boot
i.MX7ULP QSPI dtb was used to update the M4 images, it should not able
to boot the kernel even without the M4 image in QSPI.
Also fixed the typo in dtsi to correct the QSPI register address
mapping range.
Signed-off-by: Han Xu <han.xu@nxp.com>
Adrian Alonso [Thu, 15 Jun 2017 17:12:49 +0000 (12:12 -0500)]
MLK-15098: ASoC: fsl: fix imx-pcm build error when no dma
Fix build error when SOC_IMX_PCM_DMA is not enabled
error: expected identifier or ‘(’ before ‘{’ token})
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Mihai Serban [Wed, 14 Jun 2017 12:40:32 +0000 (15:40 +0300)]
MLK-15053: ASoC: fsl: imx-cs42888: Reject unsupported sampling rates
Dynamic constraints for supported sampling rates cannot prevent aplay to
play audio files with higher rates. So we remove the constraints and hard
reject the unsupported samples.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Fugang Duan [Thu, 15 Jun 2017 09:33:46 +0000 (17:33 +0800)]
MLK-15096 arm64: dts: imx8qm/imx8qxp: enable enet2 port
Since the enet clock issue is fixed at SCU code by commit
07dcb2d71dd1
("Fix bug clock enable code. Ensure that the appropriate parent PLL is
enabled/disabled.") in scu mainline branch, then enable enet2 port for
imx8qm and imx8qxp lpddr4 arm2 boards.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Fugang Duan [Thu, 15 Jun 2017 10:04:09 +0000 (18:04 +0800)]
MLK-15095-02 ARM64: defconfig: add Bluetooth support
Enable Bluetooth stack, driver and HCI interface config for
Bluetooth support.
Run "make savedefconfig" to change the defconfig.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Fugang Duan [Thu, 15 Jun 2017 09:04:15 +0000 (17:04 +0800)]
MLK-15095-01 arm64: dts: imx8qm: add modem reset for Murata 1FD BT on lpddr4 arm2 board
i.MX8QM lpddr4-arm2 support Murata 1FD BT module that need some reset
timing. Add modem reset to support the BT device.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Fugang Duan [Thu, 15 Jun 2017 08:48:31 +0000 (16:48 +0800)]
MLK-15094 tty: serial: fsl_lpuart: check dma_tx_in_progress in callback
There have a corner case that tx DMA .callback() is comming after
.flush_buffer(), then .callback() should check dma_tx_in_progress
flag and return in directly.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Fugang Duan [Mon, 12 Jun 2017 08:56:43 +0000 (16:56 +0800)]
MLK-15093 tty: serial: imx: enable bit TDMAEN in each DMA transfer
In below case:
write() -> flush() -> write() -> flush() ...
.imx_flush_buffer() _MAY_ clear UCR1_TDMAEN bit if the callback is not
comming or DMA transfer is not completed, to ensure DMA trigger is enabled
for the new DMA prep_sg, enable the UCR1_TDMAEN bit in .dma_tx_work().
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: David Wolfe <david.wolfe@nxp.com>
Fugang Duan [Thu, 15 Jun 2017 08:45:29 +0000 (16:45 +0800)]
MLK-15092 reset: gpio-reset: add post reset delay
Some devices need to wait for some milliseconds after reset, so add
post reset delay in the gpio-reset chip.
The post reset delay is optional.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Shengjiu Wang [Thu, 15 Jun 2017 07:32:17 +0000 (15:32 +0800)]
MLK-15042: ASoC: fsl_asrc: update supported format
The ASRC support 24 bit input width, but for S20_3LE the input width
is 20 bit, asrc will treat it as 24bit, which like a 24bit data shift
4 bit right, the result is the volume is lower than expected.
ASRC can't shift the 20bit data left 4 bit internally, so remove the
S20_3LE in supported list, add S24_3LE in supported list.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit
e65a014efe0a69c2db9de422fb780f0ba9c41dba)
Shengjiu Wang [Thu, 15 Jun 2017 05:19:34 +0000 (13:19 +0800)]
MLK-15063: ASoC: fsl: add dpcm_merged_chan for machine driver
Same as commit
cfe36e2e7fce ("MLK-15043-2: ASoC: imx-cs42888: fix
noise issue with FE-BE case"). need to add same configuration
for imx-wm8960, imx-wm8962, imx-mqs.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit
7195ad8ff56857028a6990296cc06e1c08a4e48e)
Shengjiu Wang [Thu, 15 Jun 2017 05:07:20 +0000 (13:07 +0800)]
MLK-15068: ASoC: fsl_ssi: fix the noise issue with S20_3LE Mono bitsream
In master mode, clock of S20_3LE mono bistream is calculated by formula
"2 * params_width * params_rate", and this clock can't be divided from
clock soure, so switch to use the "2 * params_physical_width * params_rate"
formula to fix this issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit
52a91e870b8cc95cbceeda205761134e25626863)
Li Jun [Wed, 14 Jun 2017 15:16:30 +0000 (23:16 +0800)]
MLK-15081 usb: gadget: utp: fix build warning with aarch64 compiler
Compiler will generate below complain if using %d to print size_t, fix it
by using %zd.
drivers/usb/gadget/function/fsl_updater.c: In function ‘utp_do_read’:
./include/linux/kern_levels.h:4:18: warning: format ‘%d’ expects argument of type ‘int’, but argument 4 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
#define KERN_SOH "\001" /* ASCII Start Of Header */
^
./include/linux/kern_levels.h:13:19: note: in expansion of macro ‘KERN_SOH’
#define KERN_INFO KERN_SOH "6" /* informational */
^~~~~~~~
./include/linux/printk.h:284:9: note: in expansion of macro ‘KERN_INFO’
printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__)
^~~~~~~~~
drivers/usb/gadget/function/fsl_updater.c:245:3: note: in expansion of macro ‘pr_info’
pr_info("Copied to %p, %d bytes started from %d\n",
^~~~~~~
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>