linux.git
7 years agoMLK-13996: lcdif: Use DE polarity specified in DTS
Robert Chiras [Fri, 17 Feb 2017 12:16:52 +0000 (14:16 +0200)]
MLK-13996: lcdif: Use DE polarity specified in DTS

Currently, the LCDIF driver (mxsfb.c) is overriding the DE polarity
specified in DTS with the one specified in fb_videomode (sync member) by
the panel driver.
Initially, the panel driver found in
drivers/video/fbdev/mxc/mxcfb_hx8363_wvga.c specified the sync in
fb_videomode as FB_SYNC_OE_LOW_ACT.

But this patch, changed it to 0x0:

commit 4deb430fd05a ("MLK-13607-8 video: mipi-panel: hx8363: change DE
polarity to active high")
Author: Fancy Fang <chen.fang@nxp.com>
Date:   Wed Dec 14 16:21:51 2016 +0800

    The NorthWest Logic MIPI DSI only support active low data enable
    signal on imx7ulp-evk board.

The problem is that, the hx8363 panel was working with active low on
imx7d-sdb, but with active high on imx7ulp-evk. The above patch broke
hx8363 panel on imx7d-sdb board.

So, instead of using a hard-coded polarity in panel driver, better use
the one defined in device-tree.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
7 years agoMLK-14283: mxsfb: fix clock definitions for lcdif
Robert Chiras [Mon, 27 Feb 2017 13:19:50 +0000 (15:19 +0200)]
MLK-14283: mxsfb: fix clock definitions for lcdif

The mxsfb framebuffer driver uses three clock definitions, but only two
are defined in DTS for imx7s (also used by imx7d); because of this,
driver fails in probe. Since iMX7D uses only one clock, add the third clock
and make two of them dummy.
Also, add additional error messages for better identification of a
failing probe.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
7 years agoMLK-14276-2 mmc: sdhci: remove IS_ERR_VALUE abuses
Haibo Chen [Tue, 28 Feb 2017 11:12:14 +0000 (19:12 +0800)]
MLK-14276-2 mmc: sdhci: remove IS_ERR_VALUE abuses

It is wrong to pass 'int' to IS_ERR_VALUE(), Linus's commit
aa00edc1 point out this abuse.

This patch use operator instead.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
7 years agoMLK-14276-1 mmc: sdio: remove compile warning
Haibo Chen [Mon, 27 Feb 2017 09:07:28 +0000 (17:07 +0800)]
MLK-14276-1 mmc: sdio: remove compile warning

Remove the TI wifi from defconfig and include the head file host.h
which contain the definition of struct mmc_host to avoid the following
compile warning:

In file included from drivers/net/wireless/ti/wlcore/sdio.c:28:0:
./include/linux/mmc/sdio.h:193:35: warning: 'struct mmc_host' declared inside parameter list
 void mmc_sdio_force_remove(struct mmc_host *host);
                                    ^
./include/linux/mmc/sdio.h:193:35: warning: its scope is only this definition or declaration, which is probably not what you want

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
7 years agoMLK-14271 ARM64: configs: defconfig: remove unused configs to fix build warnings
Anson Huang [Mon, 27 Feb 2017 10:06:11 +0000 (18:06 +0800)]
MLK-14271 ARM64: configs: defconfig: remove unused configs to fix build warnings

Remove unused configs to fix below build warnings:

  CC      drivers/pci/host/pci-layerscape.o
drivers/pci/host/pci-layerscape.c:182:2: warning: initialization from incompatible pointer type
  .host_init = ls1021_pcie_host_init,
  ^
drivers/pci/host/pci-layerscape.c:182:2: warning: (near initialization for ‘ls1021_pcie_host_ops.host_init’)
drivers/pci/host/pci-layerscape.c:188:2: warning: initialization from incompatible pointer type
  .host_init = ls_pcie_host_init,
  ^
drivers/pci/host/pci-layerscape.c:188:2: warning: (near initialization for ‘ls_pcie_host_ops.host_init’)
  CC      drivers/pci/host/pcie-qcom.o
drivers/pci/host/pcie-qcom.c:482:2: warning: initialization from incompatible pointer type
  .host_init = qcom_pcie_host_init,
  ^
drivers/pci/host/pcie-qcom.c:482:2: warning: (near initialization for ‘qcom_pcie_dw_ops.host_init’)
  CC      drivers/pci/host/pcie-armada8k.o
drivers/pci/host/pcie-armada8k.c:164:2: warning: initialization from incompatible pointer type
  .host_init = armada8k_pcie_host_init,
  ^
drivers/pci/host/pcie-armada8k.c:164:2: warning: (near initialization for ‘armada8k_pcie_host_ops.host_init’)
  LD      drivers/pci/host/built-in.o
  LD      drivers/pci/built-in.o

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
7 years agoMLK-14241-5: ARM: imx: pm-rpmsg: add heartbeat_off support in bootargs
Robin Gong [Thu, 23 Feb 2017 10:07:56 +0000 (18:07 +0800)]
MLK-14241-5: ARM: imx: pm-rpmsg: add heartbeat_off support in bootargs

If bootargs with 'heartbeat_off' setting, will remove heartbeat feature
in kernel and M4 will not reset A7 even A7 hang. It's useful for debug
in A7 if you want to connect debugger, otherwise M4 will reset A7 core
if A7 core halt more than 30s.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-14241-4 ARM: imx: pm-rpmsg: fix 'rpmsg_send timeout' during bootup
Robin Gong [Wed, 22 Feb 2017 09:34:42 +0000 (17:34 +0800)]
MLK-14241-4 ARM: imx: pm-rpmsg: fix 'rpmsg_send timeout' during bootup

The rpmsg driver probe function such as pm_rpmsg_probe is called by rpmsg
rx callback, so we can't wait in pm_rpmsg_probe for any completion which
issued by callback itself, otherwise, timeout triggered definitily, because
your last callback no chance to reurn to handle the next callback unless
timeout happened. This patch move the rpmsg send code from pm_rpmsg_probe
to delay work.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-14241-3 ARM: imx: pm-rpmsg: cancel heartbeat workqueue before suspend
Robin Gong [Wed, 22 Feb 2017 08:52:51 +0000 (16:52 +0800)]
MLK-14241-3 ARM: imx: pm-rpmsg: cancel heartbeat workqueue before suspend

cancel heartbeat workqueue to make sure no any heartbeat message will
be sent to M4 after M4 thought A7 core enter VLLS mode.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-14241-2 ARM: imx: pm-rpmsg: add mutex protect for pm_send_message
Robin Gong [Mon, 20 Feb 2017 00:58:30 +0000 (08:58 +0800)]
MLK-14241-2 ARM: imx: pm-rpmsg: add mutex protect for pm_send_message

Heatbeat workqueue and suspend/resume may call pm_send_message at the same
time as pf1550-regulator-rpmsg driver, so add mutex to avoid the potential
pm_qpos_* reentry issue.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-14241-1 regulator: pf1550-regulator-rpmsg: add mutex for pm_qos_add_request reentry
Robin Gong [Sun, 19 Feb 2017 07:50:56 +0000 (15:50 +0800)]
MLK-14241-1 regulator: pf1550-regulator-rpmsg: add mutex for pm_qos_add_request reentry

Multi drivers(mmc, cpufreq..) may access pf1550 regulator rpmsg driver at
the same time, so we have to add mutex for this multi-entry case. Otherwise
the below kernel warning maybe triggered:

------------[ cut here ]------------
WARNING: CPU: 0 PID: 19 at kernel/power/qos.c:453 pf1550_send_message+0x4c/0xf8()
pm_qos_add_request() called for already added request
Modules linked in:
CPU: 0 PID: 19 Comm: kworker/0:1 Not tainted 4.1.33-02293-g80b8c19 #636
Hardware name: Freescale i.MX7ULP (Device Tree)
Workqueue: events od_dbs_timer
[<80015d78>] (unwind_backtrace) from [<8001271c>] (show_stack+0x10/0x14)
[<8001271c>] (show_stack) from [<8082ba50>] (dump_stack+0x88/0x9c)
[<8082ba50>] (dump_stack) from [<800387c8>] (warn_slowpath_common+0x80/0xb0)
[<800387c8>] (warn_slowpath_common) from [<80038828>] (warn_slowpath_fmt+0x30/0x40)
[<80038828>] (warn_slowpath_fmt) from [<80341180>] (pf1550_send_message+0x4c/0xf8)
[<80341180>] (pf1550_send_message) from [<80341504>] (pf1550_get_voltage+0x48/0x5c)
[<80341504>] (pf1550_get_voltage) from [<803370a0>] (_regulator_get_voltage+0x68/0xb4)
[<803370a0>] (_regulator_get_voltage) from [<8033936c>] (_regulator_do_set_voltage+0x5c/0x3e4)
[<8033936c>] (_regulator_do_set_voltage) from [<803397a4>] (regulator_set_voltage+0xb0/0x14c)
[<803397a4>] (regulator_set_voltage) from [<8058dae8>] (imx7ulp_set_target+0x178/0x238)
[<8058dae8>] (imx7ulp_set_target) from [<80584d14>] (__cpufreq_driver_target+0x164/0x294)
[<80584d14>] (__cpufreq_driver_target) from [<8058bb08>] (dbs_check_cpu+0x1a0/0x1e0)
[<8058bb08>] (dbs_check_cpu) from [<805888e8>] (od_dbs_timer+0x80/0x138)
[<805888e8>] (od_dbs_timer) from [<8004bbbc>] (process_one_work+0x118/0x3e4)
[<8004bbbc>] (process_one_work) from [<8004bed4>] (worker_thread+0x4c/0x4f4)
[<8004bed4>] (worker_thread) from [<80050e4c>] (kthread+0xdc/0xf4)
[<80050e4c>] (kthread) from [<8000f528>] (ret_from_fork+0x14/0x2c)
---[ end trace f8281ecde7a0b4ce ]---
------------[ cut here ]------------

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-14252-2 video: mipi_dsi_northwest: reset dsi domains when dsi disabled.
Fancy Fang [Thu, 23 Feb 2017 08:31:37 +0000 (16:31 +0800)]
MLK-14252-2 video: mipi_dsi_northwest: reset dsi domains when dsi disabled.

Put the three dsi domains into reset state when dsi is disabled
to avoid dsi being an unstable state before next time enabled.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-14252-1 video: mipi_dsi_northwest: reset dsi domains when shutdown.
Fancy Fang [Thu, 23 Feb 2017 06:17:45 +0000 (14:17 +0800)]
MLK-14252-1 video: mipi_dsi_northwest: reset dsi domains when shutdown.

Put the three dsi domains into reset state before dsi is
shutdown to avoid dsi being a unstable state.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-14237 video: mxsfb: fb1 maybe access when fb0 in blank state
Fancy Fang [Thu, 23 Feb 2017 01:36:26 +0000 (09:36 +0800)]
MLK-14237 video: mxsfb: fb1 maybe access when fb0 in blank state

The overlay framebuffer fb1 access maybe accessed when fb0
is in the blank state in which all the lcd clocks have been
disabled.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-13362-2 ARM: imx: fix audio bus mode hang for imx6dq lpddr2
Juan Gutierrez [Tue, 21 Feb 2017 01:24:25 +0000 (19:24 -0600)]
MLK-13362-2 ARM: imx: fix audio bus mode hang for imx6dq lpddr2

The double MU count operations should be only done when changing the
MMDC frequency from 400MHz to a low frequency(100MHz or 24MHz).
Otherwise, the MU count may overflow and lead to system hang/panic issue.

This is basically a porting of 4d09bf110b878a6f720ee9d19c8b64ceace95fbe
to imx6dq lppdr2.

Also a member "freq" has been added to the mmdc_settings_info structure
to store the current ddr frequency on iram settings to be able to execute
the double MU count, only on 400MHz mode and bypass the operation
otherwise within the update freq routine.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
7 years agoMLK-14240 video: mipi_dsi_northwest: fix access dsi register when clock disabled.
Fancy Fang [Wed, 22 Feb 2017 07:16:23 +0000 (15:16 +0800)]
MLK-14240 video: mipi_dsi_northwest: fix access dsi register when clock disabled.

In the mipi_dsi_shutdown() function, it accesses some dsi registers.
But in some cases, the esc_clk may be disabled at this moment. So
first enable this clock then do other shutdown works. Otherwise,
it may cause kernel panic dump as belows when rebooting system:

Unhandled fault: imprecise external abort (0x1c06) at 0x0033802c
pgd = b0a24000
[0033802c] *pgd=908f1831, *pte=6320775f, *ppte=63207c7f
Internal error: : 1c06 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1059 Comm: reboot Not tainted 4.1.33-02248-g22f8d64-dirty #513
Hardware name: Freescale i.MX7ULP (Device Tree)
task: b0f56600 ti: b08e8000 task.ti: b08e8000
PC is at mipi_dsi_pkt_write+0x38/0x1b0
LR is at mipi_dsi_wr_tx_header.constprop.2+0x6c/0x94
pc : [<802fda08>]    lr : [<802fd8b8>]    psr: 60070013
sp : b08e9c00  ip : 00000001  fp : 00000000
r10: 00000000  r9 : b024a810  r8 : b00c5044
r7 : 80cac4d8  r6 : 80bd2504  r5 : b024a810  r4 : b024a810
r3 : c0920000  r2 : 00000000  r1 : 60070013  r0 : 00000023
Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
Control: 10c53c7d  Table: 90a2406a  DAC: 00000015
Process reboot (pid: 1059, stack limit = 0xb08e8210)
Stack: (0xb08e9c00 to 0xb08ea000)
9c00: 00000000 80066e30 00000000 b00c5000 20070113 b024a810 b024a810 b00c5010
9c20: 80cac4d8 b00c5044 80c54020 00000000 00000000 802fdba4 00000028 00000000
9c40: bf672edc 00000001 80bdff40 8007ad7c 8004993c 8082eb30 00000000 80be0140
9c60: 80bcddc0 80832cd8 80c517f1 80bcddc0 b08e9c70 80bdfb40 b0004c60 00000000
9c80: 00000009 00000000 00000009 00000000 80c576c0 00000000 80bd20a8 8003b9d8
9ca0: 00000000 b08e9d68 b08e9ca0 80c576c0 0000000a ffffb7c1 80bd2100 80bcbbe8
9cc0: 00000000 80bcd800 b0f56600 bf672800 b0f56648 b00fab08 b00fab10 8005fc30
9ce0: 00000017 00000000 00000000 8006ff84 c080200c 00000026 80bd2838 b08e9d28
9d00: 80361f04 80c586d6 80c586d6 8035b2a8 80361f04 b02b3610 80bd2504 001c0700
9d20: 003c0700 8036212c 80bff3b0 80c58198 80bdf8a0 20070093 00000199 8082e868
9d40: 00000000 80bdf8a0 80c58198 00000000 00000199 8082eadc 80c58198 8006e8b0
9d60: 00000400 80c5f48c 00000029 80c98ac8 80c58198 80c98098 60070013 00000000
9d80: 80bdf880 00000001 00000000 80c58198 00000000 00000029 00000001 80c58198
9da0: 00000029 00000001 00000000 8006e654 00000000 8006ee2c 00000000 00000000
9dc0: 00000000 00000000 80c98ae6 00000029 00000000 00000000 00000000 60070013
9de0: 00000000 00000000 00000000 8006f214 b024a810 b00c5010 80cac4d8 b00c5044
9e00: 80c54020 00000000 00000000 8006f238 80a580f0 b08e9e34 00000000 80824414
9e20: 80a58148 b08e9e34 b024a810 802fdc6c 80a580f0 80872338 00000000 802fdc80
9e40: 60070013 b024a810 b00c1a10 802fdd10 802fdcf0 b00c5010 b00c1a10 8038e8a8
9e60: b00c501c 8038b3cc 01234567 00000000 80bdee38 00000000 fee1dead 8000f644
9e80: b08e8000 800529cc 00000000 80052c24 bf699000 00000001 00000000 800b3498
9ea0: 00000000 bfca9160 bf699000 80bd04b8 bfca9160 00000000 80c50880 800b5460
9ec0: b08e9ed4 00000000 b08e9ec8 00000000 b074ad10 00000000 00359000 b074a7e8
9ee0: b08e9f20 b074ad10 b0a56e00 00351000 b074ad10 800d3cb8 b0a56e00 00000000
9f00: b074ad10 00351000 00000001 00000001 b08e9f24 b0001680 00000001 00000001
9f20: b08e9f34 bf672e00 b086a240 bf672e00 ae13f550 ae13f5a0 00080040 00000001
9f40: b086a240 ae1533f0 00000000 b07e1d90 ae13f550 40000010 b086a240 800ed1b0
9f60: 00000020 00000000 b0f569f8 00000000 b0f569f8 00000000 80c57c28 b0f56600
9f80: 00000000 8004f358 b086a240 b08e8000 8000f644 7eec5e14 00000003 00000000
9fa0: 00000058 8000f4c0 7eec5e14 00000003 fee1dead 28121969 01234567 00000000
9fc0: 7eec5e14 00000003 00000000 00000058 00000000 00000000 00000000 00000000
9fe0: 76f3ec10 7eec5c7c 00010fc8 76f3ec30 60070010 fee1dead 00000000 00000000
[<802fda08>] (mipi_dsi_pkt_write) from [<802fdba4>] (mipi_dsi_dcs_cmd.part.0+0x24/0x2c)
[<802fdba4>] (mipi_dsi_dcs_cmd.part.0) from [<802fdc80>] (mipi_display_enter_sleep+0x30/0xa0)
[<802fdc80>] (mipi_display_enter_sleep) from [<802fdd10>] (mipi_dsi_shutdown+0x20/0x9c)
[<802fdd10>] (mipi_dsi_shutdown) from [<8038e8a8>] (platform_drv_shutdown+0x18/0x28)
[<8038e8a8>] (platform_drv_shutdown) from [<8038b3cc>] (device_shutdown+0xdc/0x1e4)
[<8038b3cc>] (device_shutdown) from [<800529cc>] (kernel_restart+0xc/0x50)
[<800529cc>] (kernel_restart) from [<80052c24>] (SyS_reboot+0xc8/0x1b8)
[<80052c24>] (SyS_reboot) from [<8000f4c0>] (ret_fast_syscall+0x0/0x3c)
Code: e34860bd e58da000 e1a0200c ebffff90 (f57ff04e)
---[ end trace 9f61c48a242457f2 ]---

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMGS-2664-7 [#imx-403] request "gpu2d" and "gpuvg" resets as shared
Prabhu Sundararaj [Fri, 17 Feb 2017 20:22:43 +0000 (14:22 -0600)]
MGS-2664-7 [#imx-403] request "gpu2d" and "gpuvg" resets as shared

These resets are shared at least on im6q, so request them as shared to
avoid devm_reset_control_get() failures since Linux 4.9 upstream has modified it
to assume exclusive usage.

Date: Feb 17, 2016
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@nxp.com>
7 years agoMLK-13281-2 ARM: imx: missing brackets on phy checking for 6sx
Juan Gutierrez [Thu, 16 Feb 2017 21:01:48 +0000 (15:01 -0600)]
MLK-13281-2 ARM: imx: missing brackets on phy checking for 6sx

Adding the corresponding brackets were missing when introducing
a new phy fixup function. This patch fix it.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
7 years agoMLK-14007: ASoC: fsl_rpmsg_i2s: remove mono for M4 don't support it
Shengjiu Wang [Mon, 20 Feb 2017 07:44:40 +0000 (15:44 +0800)]
MLK-14007: ASoC: fsl_rpmsg_i2s: remove mono for M4 don't support it

Currently the M4 audio driver don't support mono channel, so remove it.
After mono channel is supported in M4 os, this commit should be reverted.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
7 years agoMLK-13997: ARM: dts: disable rpmsg-audio in wm8960 dts for conflict
Shengjiu Wang [Mon, 20 Feb 2017 03:43:26 +0000 (11:43 +0800)]
MLK-13997: ARM: dts: disable rpmsg-audio in wm8960 dts for conflict

The rpmsg-audio and wm8960-audio use same device in two way, there is
conflict when enabled together.
imx7ulp-evk-wm8960.dts is for demo usage, there is a hardware issue
(TKT320235) that EDMA interrupt can't wake up the A7 core, so there
is glitch noise occassionally.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
7 years agoMGS-2664-5 [#imx-403] update GPU platform config with i.MX8QM
Xianzhong [Thu, 16 Feb 2017 08:16:07 +0000 (16:16 +0800)]
MGS-2664-5 [#imx-403] update GPU platform config with i.MX8QM

Update GPU platform config with i.MX8QM.

Date: Feb 16, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
7 years agoMGS-2664-4 [#imx-403] fix __dma_flush_range wht 4.9 kernel
Xianzhong [Thu, 16 Feb 2017 08:08:58 +0000 (16:08 +0800)]
MGS-2664-4 [#imx-403] fix __dma_flush_range wht 4.9 kernel

__dma_flush_range interface is removed in 4.9 kernel version,
should use the replaceable function with __dma_flush_area instead.

Date: Feb 16, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
7 years agoMGS-2664-2 [#imx-403] fix gpu build failure with get_user_pages
Xianzhong [Thu, 16 Feb 2017 08:03:48 +0000 (16:03 +0800)]
MGS-2664-2 [#imx-403] fix gpu build failure with get_user_pages

get_user_pages function has interface change in 4.9 kernel,
update the gpu driver to fix the build problem.

Date: Feb 16, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
7 years agoMLK-13994-1: ARM: imx7ulp: add acknowledgement for vlls message notification
Robin Gong [Fri, 17 Feb 2017 07:48:56 +0000 (15:48 +0800)]
MLK-13994-1: ARM: imx7ulp: add acknowledgement for vlls message notification

Now, M4 rpmsg add free buffer feature that free the reciever buffer and update
some rpmsg structure data in share memory(DDR) once M4 receive the message from
A7 side, that means M4 will access DDR after it receive the vlls message(A7 enter
VLLS mode quickly), thus M4 hang because DDR in slef-refresh...
This patch move the vlls message notification ahead to driver suspend and add
acknowledgement to make sure no any DDR access comes from M4 side after A7 enter
suspend.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13994-2 ARM: dts: imx7ulp: add heartbeat device node
Robin Gong [Fri, 17 Feb 2017 07:59:25 +0000 (15:59 +0800)]
MLK-13994-2 ARM: dts: imx7ulp: add heartbeat device node

add heartbeat device node to add suspend/resume in
arch/arm/mach-imx/pm-rpmsg.c

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13992: ASoC: fsl_rpmsg_i2s: add flush workqueue
Shengjiu Wang [Fri, 17 Feb 2017 02:09:31 +0000 (10:09 +0800)]
MLK-13992: ASoC: fsl_rpmsg_i2s: add flush workqueue

some cmd is sent by workqueue, others are sent by call send message
function directly, for workqueue may have delay, so there is occasion
that cmd is not sent in order.
Add flush_workqueue before the CLOSE and SUSPEND to make sure previous
cmd is finished in that time.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
7 years agoMLK-13991: ASoC: fsl_rpmsg_i2s: remove unsupported rate
Shengjiu Wang [Fri, 17 Feb 2017 02:11:35 +0000 (10:11 +0800)]
MLK-13991: ASoC: fsl_rpmsg_i2s: remove unsupported rate

The M4 audio driver only support 8k/16k/32k/44k/48kHz sample rate.
so remove other rate in supported list.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
7 years agoMLK-13993: video: Distinguish fb0 and fb1 in userspace.
Guoniu.Zhou [Fri, 17 Feb 2017 04:54:11 +0000 (12:54 +0800)]
MLK-13993: video: Distinguish fb0 and fb1 in userspace.

In userspace, user can not distinguish fb0 and fb1, so add fb1/name property to
distinguish them.

Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
7 years agoMLK-13914-06 ARM: config: imx: Enbale cpufreq support for i.mx7ulp
Bai Ping [Mon, 13 Feb 2017 08:54:25 +0000 (16:54 +0800)]
MLK-13914-06 ARM: config: imx: Enbale cpufreq support for i.mx7ulp

Enbale cpufreq support for i.MX7ULP in defconfig.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-13914-05 ARM: imx: Add cpufreq device on i.mx7ulp
Bai Ping [Mon, 13 Feb 2017 08:53:31 +0000 (16:53 +0800)]
MLK-13914-05 ARM: imx: Add cpufreq device on i.mx7ulp

Add cpufreq device on i.MX7ULP.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-13914-04 cpufreq: imx7ulp: Add cpufreq driver on i.mx7ulp
Bai Ping [Mon, 13 Feb 2017 08:30:08 +0000 (16:30 +0800)]
MLK-13914-04 cpufreq: imx7ulp: Add cpufreq driver on i.mx7ulp

According to the i.MX7ULP RM & datasheet, when A7 is in RUN mode,
the max CPU frequency it can run at is 500MHz, if we want to increase
the A7 CPU frequency to 800MHz, we need to change the A7 from RUN mode
to HSRUN mode. And only when A7 is in RUN mode, we can enter STOP mode
and VLLS mode.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-13914-03 ARM: dts: Add cpu setpoints and clocks properties on i.mx7ulp
Bai Ping [Mon, 13 Feb 2017 08:24:36 +0000 (16:24 +0800)]
MLK-13914-03 ARM: dts: Add cpu setpoints and clocks properties on i.mx7ulp

Add CPU setpoints property on i.MX7ULP A0 part, the setpoints table is a preliminary
one, will update it according to the datasheet when the final one is available.

The setpoints we can currently used is as below:
416072 KHz/0.925V,
531648 KHz/1.025V;

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-13914-02 ARM: imx: clk: Add hsrun clock on i.mx7ulp
Bai Ping [Mon, 13 Feb 2017 08:21:43 +0000 (16:21 +0800)]
MLK-13914-02 ARM: imx: clk: Add hsrun clock on i.mx7ulp

Add HSRUN mode clocks on i.MX7ULP. we also add a fake clock mux ARM
to make the clock tree more easy to handle in cpufreq.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-13914-01 ARM: imx: enable hsrun mode on i.mx7ulp
Bai Ping [Mon, 13 Feb 2017 08:19:59 +0000 (16:19 +0800)]
MLK-13914-01 ARM: imx: enable hsrun mode on i.mx7ulp

Enable HSRUN mode on i.MX7ULP.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-13801-02 ARM: dts: Correct the gpt timer clock source on imx6ul/ull/sll
Bai Ping [Fri, 20 Jan 2017 09:41:25 +0000 (17:41 +0800)]
MLK-13801-02 ARM: dts: Correct the gpt timer clock source on imx6ul/ull/sll

The GPT timer counter clock should be sourced from GPT_3M clock to avoid
counter clock frequency changed due to system bus clock changes.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-13801-01 ARM: imx: add gpt_3m clock on imx6sll
Bai Ping [Fri, 20 Jan 2017 09:40:02 +0000 (17:40 +0800)]
MLK-13801-01 ARM: imx: add gpt_3m clock on imx6sll

Add gpt_3m clock source on i.MX6SLL.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-13980: ASoC: fsl_rpmsg_i2s: fix wrong cmd sent to M4 in suspend
Shengjiu Wang [Thu, 16 Feb 2017 03:51:06 +0000 (11:51 +0800)]
MLK-13980: ASoC: fsl_rpmsg_i2s: fix wrong cmd sent to M4 in suspend

This typo issue will cause that wrong cmd send to M4 side.

Fixes: 3e13a631aee0 ("MLK-13904-1: ASoC: fsl: add audio cpu dai driver base on rpmsg")

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
7 years agoMLK-13981-2 rpmsg: imx: enable rpmsg virt tty
Richard Zhu [Wed, 15 Feb 2017 08:46:29 +0000 (16:46 +0800)]
MLK-13981-2 rpmsg: imx: enable rpmsg virt tty

Message can be transferred between remote
device and iMX7ULP M4.
Then the message can be transferred between A7
and M4 by rpmsg channel.
demo howto:
- insmode the imx_rpmsg_tty.ko module after
login A7/Linux.
- Receive messages. Used the following command
to dump out the msg from the virtual tty.
./unit_tests/mxc_mcc_tty_test.out /dev/ttyRPMSG 115200 R 100 1000 &
- Send: use the following command to send the
message to M4.
echo <your string message> /dev/ttyRPMSG

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
7 years agoMLK-13981-1 ARM: imx: add the virtual tty rpmsg channel
Richard Zhu [Wed, 15 Feb 2017 08:45:07 +0000 (16:45 +0800)]
MLK-13981-1 ARM: imx: add the virtual tty rpmsg channel

add the virtual tty rpmsg channel, thus the message can
be transferred between A core and M core by rpmsg

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
7 years agoMGS-2485 [#imx-309] fix gpu base address for new mmu version
Xianzhong [Thu, 16 Feb 2017 03:16:43 +0000 (11:16 +0800)]
MGS-2485 [#imx-309] fix gpu base address for new mmu version

The new gpu mmu has no base address feature and need set zero,
But hardware mmu version is not initialized before set baseaddress,

Hence kernel will get the wrong base address and pass to user driver,
This fix will add mmu version initialization before version check.

Date: Feb 15, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
7 years agoMLK-13904-5: ARM: defconfig: enable rpmsg audio driver in defconfig
Shengjiu Wang [Wed, 15 Feb 2017 03:24:16 +0000 (11:24 +0800)]
MLK-13904-5: ARM: defconfig: enable rpmsg audio driver in  defconfig

built in rpmsg audio driver

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13904-4: ARM: dts: add rpmsg audio sound card device note
Shengjiu Wang [Wed, 15 Feb 2017 03:24:05 +0000 (11:24 +0800)]
MLK-13904-4: ARM: dts: add rpmsg audio sound card device note

audio will use the fourth slot in rpmsg address space.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13904-3: ASoC: fsl: add audio machine driver base on rpmsg
Shengjiu Wang [Wed, 15 Feb 2017 03:23:45 +0000 (11:23 +0800)]
MLK-13904-3: ASoC: fsl: add audio machine driver base on rpmsg

Add machine driver, which is using the dummy codec.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13904-2: ASoC: fsl: add audio platform driver base on rpmsg
Shengjiu Wang [Wed, 15 Feb 2017 03:28:26 +0000 (11:28 +0800)]
MLK-13904-2: ASoC: fsl: add audio platform driver base on rpmsg

Add platform driver, each step like set hw param, trigger start
trigger stop, and so on, will call the rpmsg api.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13904-1: ASoC: fsl: add audio cpu dai driver base on rpmsg
Shengjiu Wang [Wed, 15 Feb 2017 03:28:36 +0000 (11:28 +0800)]
MLK-13904-1: ASoC: fsl: add audio cpu dai driver base on rpmsg

Add the cpu dai driver, as the rpmsg_send api can't be used in
atomic context, so using the workqueue instead of calling
rpmsg_send() directly.
The detail communication stack is defined in header file.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13912-2 gpio: gpio-vf610: mask interrupt on suspend for imx7ulp
Peter Chen [Mon, 13 Feb 2017 07:14:17 +0000 (15:14 +0800)]
MLK-13912-2 gpio: gpio-vf610: mask interrupt on suspend for imx7ulp

At imx7ulp, any interrupts can wake system up from suspend at "standby"
mode, so we mask interrupt for gpio by default. The user can still
enable wakeup through /sys entry.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-13912-1 extcon: ext-usb-gpio: do not enable wakeup by default
Peter Chen [Mon, 13 Feb 2017 06:56:37 +0000 (14:56 +0800)]
MLK-13912-1 extcon: ext-usb-gpio: do not enable wakeup by default

The wakeup on USB port should be determined by user, but not enabled
by default.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-13917 pxp: fix build error for pxp library in user space
Robby Cai [Mon, 13 Feb 2017 10:01:25 +0000 (18:01 +0800)]
MLK-13917 pxp: fix build error for pxp library in user space

Fix following build error by changing type to '__u64'.

include/uapi/linux/pxp_dma.h:230:2: error: unknown type name 'u64'
   u64 lut_sels;
   ^~~

Signed-off-by: Robby Cai <robby.cai@nxp.com>
7 years agoMLK-13765 ARM: dts: imx7ulp-evk-sd1: remove property out for sd1 slot
Haibo Chen [Mon, 13 Feb 2017 09:35:30 +0000 (17:35 +0800)]
MLK-13765 ARM: dts: imx7ulp-evk-sd1: remove property out for sd1 slot

The two properties pm-ignore-notify and keep-power-in-suspend need
to remove for the sd slot on base board(sd1 slot).

If not, after system suspend, once remove the card from sd1 slot,
then system can't resume successfully, resume process hung due to
dead lock.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
7 years agoMLK-13913: ARM: imx: rpmsg: add reboot handler to support reboot
Robin Gong [Mon, 13 Feb 2017 06:58:55 +0000 (14:58 +0800)]
MLK-13913: ARM: imx: rpmsg: add reboot handler to support reboot

Add reboot handler to send reboot message by rpmsg to M4 side, then
M4 will reboot A7 core. Meanwhile, remove shutdown interface at rpmsg
level, since M4 prefer to clear reboot and shutdown interface instead
of shutdown interface at rpmsg level.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13905: ARM: imx: pm-rpmsg: fix kernel warning while resume back
Robin Gong [Fri, 10 Feb 2017 09:23:38 +0000 (17:23 +0800)]
MLK-13905: ARM: imx: pm-rpmsg: fix kernel warning while resume back

On i.mx7ulp, kernel need notify m4 side power mode message before enter VLLS
and resume back, but pm_qos_remove_request will enable local irq that cause
the below kernel warning since kernel assum local irq disalbed in syscore_resume.
In this case, just ignore touch pm_qos_* since cpu0 never enter idle at that
suspend time.

WARNING: CPU: 0 PID: 629 at drivers/base/syscore.c:99 syscore_resume+0xcc/0xec()
Interrupts enabled before system core resume.
Modules linked in:
CPU: 0 PID: 629 Comm: sh Not tainted 4.1.33-02249-g69520ab-dirty #259
Hardware name: Freescale i.MX7ULP (Device Tree)
[<80015ddc>] (unwind_backtrace) from [<8001274c>] (show_stack+0x10/0x14)
[<8001274c>] (show_stack) from [<807c97f0>] (dump_stack+0x88/0x9c)
[<807c97f0>] (dump_stack) from [<800386e4>] (warn_slowpath_common+0x84/0xb4)
[<800386e4>] (warn_slowpath_common) from [<80038744>] (warn_slowpath_fmt+0x30/0x40)
[<80038744>] (warn_slowpath_fmt) from [<8038d3d0>] (syscore_resume+0xcc/0xec)
[<8038d3d0>] (syscore_resume) from [<8006c1c4>] (suspend_devices_and_enter+0x3c4/0x500)
[<8006c1c4>] (suspend_devices_and_enter) from [<8006c580>] (pm_suspend+0x280/0x2fc

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13910: ARM: imx7d: clk: correct enet clock CCGR register offset
Andy Duan [Fri, 10 Feb 2017 08:25:14 +0000 (16:25 +0800)]
MLK-13910: ARM: imx7d: clk: correct enet clock CCGR register offset

Correct enet clock CCGR register offset.

CCGR6: IMX7D_ENET_AXI_ROOT_CLK (enet1 enet2 bus clocks)
CCGR112: IMX7D_ENET1_TIME_ROOT_CLK, IMX7D_ENET1_IPG_ROOT_CLK
CCGR113: IMX7D_ENET2_TIME_ROOT_CLK, IMX7D_ENET2_IPG_ROOT_CLK

IMX7D_ENET_PHY_REF_ROOT_DIV supply clock for PHY, no gate after the clock, its parent
clcok root has gate.
IMX7D_ENET1_REF_ROOT_DIV/IMX7D_ENET2_REF_ROOT_DIV supply clocks for enet IPG_CLK_RMII,
no gate after the clock, its parent clock root has gate.

IMX7D_PLL_ENET_MAIN_125M_CLK (anatop pll) supply clock for enet RGMII tx_clk.

Update copyright information.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
7 years agoMLK-13840 fbdev: mxsfb: Fix explicit null dereference
Cristina Ciocan [Mon, 30 Jan 2017 09:31:21 +0000 (11:31 +0200)]
MLK-13840 fbdev: mxsfb: Fix explicit null dereference

In mxsfb driver, function overlayfb_check_var, a null pointer dereference
occurs if fourcc pixel format is one not considered explicitly.

This case should not occur, since the pixel format is verified against
supported values before getting to this null dereference code, but this may
change if overlay_fmt_support() or overlayfb_check_var() changes and they
are not kept in sync.

Signed-off-by: Cristina Ciocan <cristina-mihaela.ciocan@nxp.com>
7 years agoMLK-13839 fbdev: mxsfb: Fix null pointer dereference
Cristina Ciocan [Fri, 3 Feb 2017 17:32:44 +0000 (19:32 +0200)]
MLK-13839 fbdev: mxsfb: Fix null pointer dereference

In function mxsfb_check_var an explicit null pointer dereference occurs
when input frame is 32 bpp (var->bits_per_pixel) and the output frame is
different from 8/16/18/24 (host->ld_intf_width).

Even though a 32bpp output is possible under certain conditions, this is
currently not implemented, so any other output bpp value is not valid.

Signed-off-by: Cristina Ciocan <cristina-mihaela.ciocan@nxp.com>
7 years agoMLK-13906: ARM: dts: new dtb for mfgtool to burn both BSP and M4 to eMMC
Han Xu [Fri, 10 Feb 2017 17:03:30 +0000 (11:03 -0600)]
MLK-13906: ARM: dts: new dtb for mfgtool to burn both BSP and M4 to eMMC

Add one more dtb file for mfgtool purpose only, it enabled both eMMC and
QSPI to burn both BSP and M4 images in one process.

Kernel still uses the original eMMC dtb so the QSPI, which belongs to
M4 domain won't be exposed in A7 domain.

Signed-off-by: Han Xu <han.xu@nxp.com>
7 years agoMLK-13862-2 epdc/pxp: imx6ull/imx6sll: enhance the LUT cleanup flow to avoid stalling...
Robby Cai [Wed, 25 Jan 2017 09:14:34 +0000 (17:14 +0800)]
MLK-13862-2 epdc/pxp: imx6ull/imx6sll: enhance the LUT cleanup flow to avoid stalling display

- change setting for wfe_b to support new flow
  (note there's no wfe_a on i.mx6ull/i.mx6sll, while on i.mx7d wfe_a is used
  for this purpose)
- the underlying design policy change as follows (similar to i.mx7d).
  in previous flow, when all LUTs are used, the LUT cleanup operation
  need to wait for all the LUT to finish, it will not happen util last LUT
  is done. while in new flow, the cleanup operation does not need to wait
  for all LUTs to finish, instead it can start when there's LUT's done.
  The saved time is multiple LUT operation time.

Signed-off-by: Robby Cai <robby.cai@nxp.com>
7 years agoMLK-13862-1 epdc/pxp: imx7d: enhance the LUT cleanup flow to avoid stalling display
Robby Cai [Thu, 1 Dec 2016 01:47:31 +0000 (09:47 +0800)]
MLK-13862-1 epdc/pxp: imx7d: enhance the LUT cleanup flow to avoid stalling display

- change from wfe_b to wfe_a, and modifiy register settings to support new flow
- the underlying design policy change as follows.
  in previous flow, when all LUTs are used, the LUT cleanup operation
  need to wait for all the LUT to finish, it will not happen util last LUT
  is done. while in new flow, the cleanup operation does not need to wait
  for all LUTs to finish, instead it can start when there's LUT's done.
  The saved time is multiple LUT operation time.

Signed-off-by: Robby Cai <robby.cai@nxp.com>
7 years agoMLK-13893 net: fec: do defer probe when mii bus not registered
Andy Duan [Tue, 7 Feb 2017 06:10:54 +0000 (14:10 +0800)]
MLK-13893 net: fec: do defer probe when mii bus not registered

When two MACs share one mii bus, MAC driver should do defer probe
when the mii bus not registered.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
7 years agoMGS-2092 [#imx-101] apply errata workaround to fix mmu exception
Xianzhong [Fri, 10 Feb 2017 06:11:09 +0000 (14:11 +0800)]
MGS-2092 [#imx-101] apply errata workaround to fix mmu exception

fixed gc7000xsvx mmu exception with hardware problems:
  - Texture border clamps to wrong max value (HBN1839)
  - MMU exception created when Image Load reads pixel data at end of
    buffer(HBN1847)

only apply errata workaround for the texture with GL_CLAMP_TO_BORDER.

Date: Jan 16, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
7 years agoMGS-2133-4 [#imx-199] fix gpu hang with power management
Xianzhong [Mon, 6 Feb 2017 06:42:35 +0000 (14:42 +0800)]
MGS-2133-4 [#imx-199] fix gpu hang with power management

power management is only disabled for GPU0, but NOT disabled for GPU1,
need apply this patch to configure power management for all GPU cores.

also configure fast clear and gpu profiler for all GPU cores.

Date: Feb 06, 2017
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
7 years agoMXSCM-240-4 arm: imx: add missing brackets to mmdc_clk check
Juan Gutierrez [Wed, 8 Feb 2017 01:05:37 +0000 (19:05 -0600)]
MXSCM-240-4 arm: imx: add missing brackets to mmdc_clk check

Even though is not affecting the behaviour, the brackets are missing
to limit this check for imx6q as was intended in first place

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
7 years agoMLK-13895 ARM: dts: imx7ulp: correct the device node name of lpi2c5
Fancy Fang [Wed, 8 Feb 2017 09:23:43 +0000 (17:23 +0800)]
MLK-13895 ARM: dts: imx7ulp: correct the device node name of lpi2c5

Correct this spelling mistake error for lpi2c5 node.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
7 years agoMLK-13894 ARM: imx: Add low power run voltage change support on i.mx6ull
Bai Ping [Wed, 8 Feb 2017 09:22:58 +0000 (17:22 +0800)]
MLK-13894 ARM: imx: Add low power run voltage change support on i.mx6ull

Drop the VDD_SOC and VDD_ARM voltage to 0.9V when system runs at low
power run mode.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-13887: rpmsg: virtio_rpmsg_bus: fix high memory case
Robin Gong [Tue, 7 Feb 2017 05:43:41 +0000 (13:43 +0800)]
MLK-13887: rpmsg: virtio_rpmsg_bus: fix high memory case

rpmsg core didn't take care of high memory case which may be triggered
in 1:3 kernel/userspace memory split. Get correct page by vmalloc_to_page
instead of virt_to_page.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13733-5 ARM: imx: imx_rpmsg: add shutdown for rpmsg
Robin Gong [Mon, 6 Feb 2017 05:33:42 +0000 (13:33 +0800)]
MLK-13733-5 ARM: imx: imx_rpmsg: add shutdown for rpmsg

Add shutdown message to notify m4 side so that rpmsg can work
after A7 boot again.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13733-4 ARM: imx: pm-rpmsg: allign header format as M4 defined
Robin Gong [Fri, 20 Jan 2017 04:53:52 +0000 (12:53 +0800)]
MLK-13733-4 ARM: imx: pm-rpmsg: allign header format as M4 defined

Alllign header format as M4 defined, no need revert order. Correct
the data to u8 instead of u32 as M4 defined. Call the header define
in imx_rpmsg.h derectly.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13733-3 regulator: pf1550-regulator-rpmsg: update pf1550-rpmsg interface
Robin Gong [Wed, 18 Jan 2017 06:58:18 +0000 (14:58 +0800)]
MLK-13733-3 regulator: pf1550-regulator-rpmsg: update pf1550-rpmsg interface

update driver since m4 side refine the header structure.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13733-2 ARM: imx: add pm rpmsg for i.mx7ulp
Anson Huang [Mon, 9 Jan 2017 09:34:29 +0000 (17:34 +0800)]
MLK-13733-2 ARM: imx: add pm rpmsg for i.mx7ulp

Add PM RPMSG for i.MX7ULP power management, currently
it handles heart beat function which will notify M4
that linux is alive every 30 seconds, and when system
enters/exit VLLS mode, it will notify M4 for proper
power management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
7 years agoMLK-13733-1 ARM: dts: imx7ulp: add rpmsg instance for power management
Anson Huang [Mon, 9 Jan 2017 09:49:25 +0000 (17:49 +0800)]
MLK-13733-1 ARM: dts: imx7ulp: add rpmsg instance for power management

On i.MX7ULP, add a new RPMSG instance for power management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
7 years agoMLK-13851-1 usb: chipidea: otg: delete the workaround code
Peter Chen [Fri, 3 Feb 2017 03:16:21 +0000 (11:16 +0800)]
MLK-13851-1 usb: chipidea: otg: delete the workaround code

After commit 49670184289e ("usb: chipidea: otg: change workqueue
ci_otg as freezable"), we have fixed the bug that ID removed
wakeup (ID: 0->1) will lock up system resume, we delete the
workaround code in this commit.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMXSCM-243-2 arm: imx6q: mmdc handshake for lpddr2 2ch-mode on low-power
Juan Gutierrez [Mon, 16 Jan 2017 19:52:40 +0000 (13:52 -0600)]
MXSCM-243-2 arm: imx6q: mmdc handshake for lpddr2 2ch-mode on low-power

For i.mx6q systems the mmdc handshake on channel 0 is kept enabled (while
channel 1 is bypassed). This is ok for lpddr2 systems operating on 1ch-mode,
but not true for 2ch-mode. On this case the handshake needs to be set for
both channels, otherwise a kernel panic or Oops error might be observed
after resuming from suspend.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
7 years agoMXSCM-243-1 arm: imx: get the mmdc 2ch-mode api for lpddr2
Juan Gutierrez [Tue, 31 Jan 2017 16:32:19 +0000 (10:32 -0600)]
MXSCM-243-1 arm: imx: get the mmdc 2ch-mode api for lpddr2

To configure the suspend settings for lpddr2 systems is necessary
to know if mmdc is operating on 1ch-mode or 2ch-mode.
Here, the imx_get_lpddr2_2ch_mode api is introduced to get this info
when needed and decide accordingly.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
7 years agoMXSCM-240-3 arm: imx: set CLK_GET_RATE_NOCACHE flag for clock dividers
Juan Gutierrez [Thu, 26 Jan 2017 20:44:12 +0000 (14:44 -0600)]
MXSCM-240-3 arm: imx: set CLK_GET_RATE_NOCACHE flag for clock dividers

Using the CLK_GET_RATE_NOCACHE flag on the clock dividers will allow
the recalculation of the rate instead of just caching its value.

For instance, this allows the mmdc clock to be properly updated,
after being modified by the busfreq driver, within an iram routine
by calling the clk_get_rate api. Using this flag allows to call only
to the .recalc_rate functions instead of additionally call the
.set_rate ones.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
7 years agoMXSCM-240-2 arm: dts: imx: make mmdc clk accessible from the busfreq driver
Juan Gutierrez [Tue, 24 Jan 2017 16:30:34 +0000 (10:30 -0600)]
MXSCM-240-2 arm: dts: imx: make mmdc clk accessible from the busfreq driver

The mmdc clk rate needs to be explicitly updated when moving to
high audio rate by the busfreq module for the i.mx6q lpddr2 systems.
In order to make the mmdc_ch0_axi clk visible by this driver, it
needs to be included on the clocks/clock-names list.

For the imx6dqscm-1gb-evb systems the clocks list for the busfreq
module is originally inherited from imx6q.dtsi. To include the mmdc
clk, the full clocks list plus the mmdc clk needs to be overwriten
on the individual dts files.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
7 years agoMXSCM-240-1 arm: imx: set mmdc clk rate on high audio freq on i.mx6q lpddr2
Juan Gutierrez [Tue, 24 Jan 2017 15:59:22 +0000 (09:59 -0600)]
MXSCM-240-1 arm: imx: set mmdc clk rate on high audio freq on i.mx6q lpddr2

As periph_pre_clk's parent is not changed when going to high audio frequency,
the clk framework will not update its children's frequency. This cause
the the mmdc_ch0_axi clk_rate does not reflect the right frequency when
reading it from userspace like:

cat /sys/kernel/debug/clk/mmdc_ch0_axi/clk_rate

Since the mmdc_ch0_axi_podf is changed in the asm busfreq routine, then the
mmdc rate needs to be updated to make sure clk tree is right, although it
will not do any change to hardware.

To do this the clk_get_rate api is used to update the mmdc_clk which
needs to be dereferenced from the device tree. Since for other cases like
ddr3, the update of the rate of the mmdc clk is not needed, the absense of
this parameter (on the device tree) don't make throw an error, instead, NULL
checks are used to check if the mmdc clk needs to be updated or not.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
7 years agoMXSCM-241-2 arm: imx: coherency issues after updating lpddr2 busfreq
Juan Gutierrez [Tue, 17 Jan 2017 15:49:38 +0000 (09:49 -0600)]
MXSCM-241-2 arm: imx: coherency issues after updating lpddr2 busfreq

After a frequency transition, like 400MHz to 24Mhz, on i.mx6DQ SCM
systems (which use lpddr2), the curr_ddr_rate variable retains its
previous cached value causing the next frequency update transition
to fail by following a wrong flow which results in a complete hang
of the system.

Issuing an L1 cache flush during the freq update routine (as in in
MXSCM-241-1) and moving up the curr_ddr_rate variable before calling
tge freq update alleviates the problem.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
7 years agoMXSCM-242-1 arm: imx6q: flush and disable L1 before L2 on lpddr2 for i.mx6q
Juan Gutierrez [Wed, 18 Jan 2017 18:01:08 +0000 (12:01 -0600)]
MXSCM-242-1 arm: imx6q: flush and disable L1 before L2 on lpddr2 for i.mx6q

Flush and disable L1 before disabling L2, to let data to be coherent.
Flushing L1 pushes everyhting to L2. L2 is sync later, but it can still
have dirty lines.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
7 years agoMLK-13760 ARM: dts: imx7ulp-evk: update tx-d-cal according to certification results
Peter Chen [Sun, 22 Jan 2017 02:50:09 +0000 (10:50 +0800)]
MLK-13760 ARM: dts: imx7ulp-evk: update tx-d-cal according to certification results

Changing tx-d-cal according to USB certification test results.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
7 years agoMLK-12672 ARM: dts: imx6ul-9x9-evk: correct the xnur pad setting
Haibo Chen [Fri, 20 Jan 2017 02:36:16 +0000 (10:36 +0800)]
MLK-12672 ARM: dts: imx6ul-9x9-evk: correct the xnur pad setting

Setting the xnur-gpio to GPIO_ACTIVE_LOW, otherwise touch calibration
may has some issue.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
7 years agoMLK-13779 crypto: caam - initialize kslock spinlock
Octavian Purdila [Wed, 11 Jan 2017 10:43:48 +0000 (12:43 +0200)]
MLK-13779 crypto: caam - initialize kslock spinlock

Fixes the following lockdep message:

INFO: trying to register non-static key.
the code is fine but needs lockdep annotation.
turning off the locking correctness validator.
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.1.30-02225-g55e4b9e #8
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[<800162b0>] (unwind_backtrace) from [<80012ba0>] (show_stack+0x10/0x14)
[<80012ba0>] (show_stack) from [<808d09d0>] (dump_stack+0xa8/0xd4)
[<808d09d0>] (dump_stack) from [<8007aed0>] (__lock_acquire+0x1eb0/0x2224)
[<8007aed0>] (__lock_acquire) from [<8007b840>] (lock_acquire+0xa4/0xd0)
[<8007b840>] (lock_acquire) from [<808dc28c>] (_raw_spin_lock+0x3c/0x4c)
[<808dc28c>] (_raw_spin_lock) from [<80666724>] (sm_keystore_slot_alloc+0x24/0x74)
[<80666724>] (sm_keystore_slot_alloc) from [<806677c8>] (caam_sm_example_init+0x1ec/0xb68)
[<806677c8>] (caam_sm_example_init) from [<80c6ff48>] (caam_sm_test_init+0x50/0x58)
[<80c6ff48>] (caam_sm_test_init) from [<80009770>] (do_one_initcall+0x8c/0x1d8)
[<80009770>] (do_one_initcall) from [<80c26dc8>] (kernel_init_freeable+0x144/0x1e4)
[<80c26dc8>] (kernel_init_freeable) from [<808cbff0>] (kernel_init+0x8/0xe8)
[<808cbff0>] (kernel_init) from [<8000f618>] (ret_from_fork+0x14/0x3c)

Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Reviewed-by: Dan Douglass <dan.douglass@nxp.com>
7 years agoMLK-13457 ARM: imx: busfreq: fix deadlock detected by lockdep
Octavian Purdila [Mon, 14 Nov 2016 16:20:05 +0000 (18:20 +0200)]
MLK-13457 ARM: imx: busfreq: fix deadlock detected by lockdep

The deadlock scenario is the following:

1. We schedule low_bus_freq_handle() but it does not run yet.

2. We run set_high_bus_freq() or some other function, that does the
following two things: (a) takes the busfreq mutex and (b)
synchronously cancel the low_bus_freq_handle work

If between (a) and (b) the low_bus_freq_handle work starts running, it
will take the bus freq mutex and block which will cause (b) to
deadlock since the work will never finish now.

To fix this issue avoid synchronously canceling the work and instead
use a new global variable (protected by the busfreq mutex) to mark the
cancellation and abort the work when it is scheduled. In order to
avoid unnecessary schedules we also try to cancel the work with
cancel_delayed_work().

 ======================================================
 [ INFO: possible circular locking dependency detected ]
 4.9.0-rc4-00776-gd4f2779 #348 Tainted: G        W
 -------------------------------------------------------
 kworker/3:1/68 is trying to acquire lock:
  (
 bus_freq_mutex
 ){+.+...}
 , at:
 [<c0128a20>] reduce_bus_freq_handler+0x1c/0x30

 but task is already holding lock:
  (
 (&(&low_bus_freq_handler)->work)
 ){+.+...}
 , at:
 [<c014f4ec>] process_one_work+0x128/0x418

 which lock already depends on the new lock.

 the existing dependency chain (in reverse order) is:

 -> #1
  (
 (&(&low_bus_freq_handler)->work)
 ){+.+...}
 :

 [<c014dafc>] flush_work+0x44/0x234
 [<c0150348>] __cancel_work_timer+0x98/0x1c8
 [<c01504a4>] cancel_delayed_work_sync+0x14/0x18
 [<c0129d9c>] request_bus_freq+0x9c/0x150
 [<c06b2b28>] imx6q_cpufreq_init+0x8c/0xb8
 [<c06afc9c>] cpufreq_online+0xc0/0x67c
 [<c06b0308>] cpufreq_add_dev+0xb0/0xd4
 [<c05251b0>] subsys_interface_register+0x9c/0xd8
 [<c06af124>] cpufreq_register_driver+0x130/0x1dc
 [<c06b3224>] imx6q_cpufreq_probe+0x5c8/0x8a0
 [<c0528768>] platform_drv_probe+0x54/0xb8
 [<c0526bf8>] driver_probe_device+0x20c/0x2c4
 [<c0526e4c>] __device_attach_driver+0x9c/0xb4
 [<c0524e3c>] bus_for_each_drv+0x6c/0xa0
 [<c05268c8>] __device_attach+0xb8/0x11c
 [<c0526fc4>] device_initial_probe+0x14/0x18
 [<c0525ee8>] bus_probe_device+0x90/0x98
 [<c052401c>] device_add+0x3c8/0x578
 [<c052846c>] platform_device_add+0xa8/0x208
 [<c0529030>] platform_device_register+0x28/0x2c
 [<c0d0f63c>] imx6q_init_late+0x180/0x1c8
 [<c0d03880>] init_machine_late+0x24/0x98
 [<c01019ec>] do_one_initcall+0x44/0x180
 [<c0d00e28>] kernel_init_freeable+0x12c/0x1f4
 [<c0978ba8>] kernel_init+0x10/0x120
 [<c0107ff0>] ret_from_fork+0x14/0x24

 -> #0
  (
 bus_freq_mutex
 ){+.+...}
 :

 [<c01811e4>] lock_acquire+0x78/0x98
 [<c097cedc>] mutex_lock_nested+0x54/0x3e4
 [<c0128a20>] reduce_bus_freq_handler+0x1c/0x30
 [<c014f558>] process_one_work+0x194/0x418
 [<c014f810>] worker_thread+0x34/0x4fc
 [<c0155e44>] kthread+0xdc/0xf8
 [<c0107ff0>] ret_from_fork+0x14/0x24

 other info that might help us debug this:

  Possible unsafe locking scenario:

        CPU0                    CPU1
        ----                    ----
   lock( (&(&low_bus_freq_handler)->work) );
                                lock( bus_freq_mutex );
                                lock( (&(&low_bus_freq_handler)->work) );
   lock( bus_freq_mutex );

  *** DEADLOCK ***

 2 locks held by kworker/3:1/68:
  #0:
  (
 "events"
 ){.+.+.+}
 , at:
 [<c014f4ec>] process_one_work+0x128/0x418
  #1:
  (
 (&(&low_bus_freq_handler)->work)
 ){+.+...}
 , at:
 [<c014f4ec>] process_one_work+0x128/0x418

 stack backtrace:
 CPU: 3 PID: 68 Comm: kworker/3:1 Tainted: G        W       4.9.0-rc4-00776-gd4f2779 #348
 Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
 Workqueue: events reduce_bus_freq_handler
 Backtrace:
 [<c010c538>] (dump_backtrace) from [<c010c730>] (show_stack+0x18/0x1c)
 [<c010c718>] (show_stack) from [<c0403a58>] (dump_stack+0xb4/0xe8)
 [<c04039a4>] (dump_stack) from [<c017d4f0>] (print_circular_bug+0x1d4/0x318)
 [<c017d31c>] (print_circular_bug) from [<c0180bb4>] (__lock_acquire+0x1864/0x1ad4)
 [<c017f350>] (__lock_acquire) from [<c01811e4>] (lock_acquire+0x78/0x98)
 [<c018116c>] (lock_acquire) from [<c097cedc>] (mutex_lock_nested+0x54/0x3e4)
 [<c097ce88>] (mutex_lock_nested) from [<c0128a20>] (reduce_bus_freq_handler+0x1c/0x30)
 [<c0128a04>] (reduce_bus_freq_handler) from [<c014f558>] (process_one_work+0x194/0x418)
 [<c014f3c4>] (process_one_work) from [<c014f810>] (worker_thread+0x34/0x4fc)
 [<c014f7dc>] (worker_thread) from [<c0155e44>] (kthread+0xdc/0xf8)
 [<c0155d68>] (kthread) from [<c0107ff0>] (ret_from_fork+0x14/0x24)

Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
7 years agoMLK-13783 char: otp: no need to check bank0/bank1 when prog
Peng Fan [Thu, 19 Jan 2017 07:05:29 +0000 (15:05 +0800)]
MLK-13783 char: otp: no need to check bank0/bank1 when prog

Bank0/Bank1 are not in ECC mode, so no need to check.
Each bank contains 8 words, so we check (phy_index > 15).

Signed-off-by: Peng Fan <peng.fan@nxp.com>
7 years agoMLK-13774 ARM: imx: fix lpddr2 busfreq support on i.mx6ull
Bai Ping [Thu, 19 Jan 2017 06:07:38 +0000 (14:07 +0800)]
MLK-13774 ARM: imx: fix lpddr2 busfreq support on i.mx6ull

Fix busfreq support on i.MX6ULL LPDDR2 board.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
7 years agoMLK-13766 ARM: dts: imx6ull-9x9-evk: correct the xnur pad setting
Haibo Chen [Thu, 19 Jan 2017 06:14:36 +0000 (14:14 +0800)]
MLK-13766 ARM: dts: imx6ull-9x9-evk: correct the xnur pad setting

Setting the xnur-gpio to GPIO_ACTIVE_LOW, otherwise touch calibration
may has some issue.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
7 years agoMLK-13773 gpio: pca953x: correct device_reset() return value check on kernel 4.1
Andy Duan [Wed, 18 Jan 2017 05:20:32 +0000 (13:20 +0800)]
MLK-13773 gpio: pca953x: correct device_reset() return value check on kernel 4.1

Correct device_reset() return value checking.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
7 years agoMLK-13538-2 char: otp: support i.MX7ULP1
Peng Fan [Wed, 18 Jan 2017 02:56:10 +0000 (10:56 +0800)]
MLK-13538-2 char: otp: support i.MX7ULP1

Add ULP1 OTP support.

No timing required for ULP1 OTP.
The CTRL_ADDR is 8 bits width.
When finished access to OTP, gate the power to OTP memory to save power.

Fix store, when invalid args, not return 0, but return the error values.
To ULP, fuse only support being programmed once, so add a check before
program.

Test log:
root@imx6qdlsolo:/sys/fsl_otp# cat HW_OCOTP_GP84
0x0
root@imx6qdlsolo:/sys/fsl_otp# echo 1 > HW_OCOTP_GP84
root@imx6qdlsolo:/sys/fsl_otp# cat HW_OCOTP_GP84
0x1
root@imx6qdlsolo:/sys/fsl_otp# echo 1 > HW_OCOTP_GP84
-sh: echo: write error: Operation not permitted
root@imx6qdlsolo:/sys/fsl_otp# echo fg > HW_OCOTP_GP84
-sh: echo: write error: Invalid argument

Signed-off-by: Peng Fan <peng.fan@nxp.com>
7 years agoMLK-13538-1 arm: dts: imx7ulp1: add ocotp node
Peng Fan [Wed, 18 Jan 2017 02:54:58 +0000 (10:54 +0800)]
MLK-13538-1 arm: dts: imx7ulp1: add ocotp node

Add ocotp node.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
7 years agoMA-9165 fix kernel panic issue reported by some android stress test
Richard Liu [Fri, 13 Jan 2017 09:12:19 +0000 (17:12 +0800)]
MA-9165 fix kernel panic issue reported by some android stress test

The issue can be reproduced when run some android stress test, such as
monkey test, usb camera long time recording, AndroidSurface.apk.
When the issue happen we always found some zero memory is tampered
to 1, and then some kernel panic happen.

Two changes to fix the issue:
1. Requires mutex-lock in when reference gctSIGNAL in gckOS_MapSignal,
   to fix concurrent issue. If the signal is already freed at this point,
   atomic_inc_return may change zero memory to 1 and cause memory corruption.

     if (atomic_inc_return(&signal->ref) <= 1)
     {
         /* The previous value is 0, it has been deleted. */
         gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
     }
2. Refine gckOS_UserSignal in kernel code, do not need reference and dereference
   around gckOS_Signal.

Change-Id: Ib5970e86dbfbfd7d73f27a07d5e77a38c78a5fb6
Signed-off-by: Richard Liu <xuegang.liu@nxp.com>
7 years agoMLK-13748: ARM: dts: imx6ull-9x9-evk-ldo: add ldo enable dts
Robin Gong [Fri, 6 Jan 2017 03:05:48 +0000 (11:05 +0800)]
MLK-13748: ARM: dts: imx6ull-9x9-evk-ldo: add ldo enable dts

Add ldo enable dts

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years ago MLK-13751 [7ULP1]A7 mem mode suspend can't be resumed by M4 through M4 image after...
Yuchou Gan [Mon, 16 Jan 2017 16:04:31 +0000 (00:04 +0800)]
 MLK-13751 [7ULP1]A7 mem mode suspend can't be resumed by M4 through M4 image after suspend/resume 1 time and effect by GPU.100%

This reverts commit a6553be76f8368442bd976f39a6bc28352c57f99 and run power on before power off in gpu_suspend.
This issue happened in x11 because x11 gpu has more complicated power management than fb. Revert the commit which imported this issue and fix the former MGS-2513 in another way.

Date: Jan 16, 2017
Signed-off-by: yuchou.gan <yuchou.gan@nxp.com>
7 years agoMLK-13755: ARM: dts: fix the QSPI iomux issue
Han Xu [Fri, 13 Jan 2017 20:14:04 +0000 (14:14 -0600)]
MLK-13755: ARM: dts: fix the QSPI iomux issue

The iomux PAD setting for QSPI on i.MX7ULP should belong to
iomuxc0(refers to iomuxc in dtsi file) rather than iomuxc1.

Signed-off-by: Han Xu <han.xu@nxp.com>
7 years agoMLK-13724: ARM: dts: fix audio error log in kernel boot up
Shengjiu Wang [Wed, 11 Jan 2017 07:48:46 +0000 (15:48 +0800)]
MLK-13724: ARM: dts: fix audio error log in kernel boot up

Below error happen when boot up imx6ul/imx6ull 9x9 board. which is caused by
that dts is not updated in commit 0a4c5844f91de8 ("MLK-12059 ARM: dts:
imx6ul-14x14-evk: add mic detect gpio to support headset Jack")

[    1.871240] imx-wm8960 sound: ASoC: Failed to add route HP_L -> direct -> Headset Jack
[    1.884002] imx-wm8960 sound: ASoC: Failed to add route HP_R -> direct -> Headset Jack
[    1.896532] imx-wm8960 sound: ASoC: Failed to add route Hp MIC -> direct -> LINPUT2
[    1.909936] imx-wm8960 sound: ASoC: Failed to add route Hp MIC -> direct -> LINPUT3
[    1.923511] imx-wm8960 sound: ASoC: Failed to add route MICB -> direct -> Hp MIC

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
7 years agoMLK-13743-02 ARM: dtsi: imx7ulp-evk: add modem gpio reset
Andy Duan [Wed, 11 Jan 2017 09:27:33 +0000 (17:27 +0800)]
MLK-13743-02 ARM: dtsi: imx7ulp-evk: add modem gpio reset

Add modem gpio reset for lpuart6 port.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
7 years agoMLK-13735 ARM: dtsi: imx7ulp: set the lpuart module clock to 48Mhz
Andy Duan [Mon, 9 Jan 2017 09:12:56 +0000 (17:12 +0800)]
MLK-13735 ARM: dtsi: imx7ulp: set the lpuart module clock to 48Mhz

The untrimmed chip firc clock is 50Mhz after manually tuning.
Now the trimmed chip firc clock is stable to 48Mhz, so change
the lpuart module clock rate to 48Mhz.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
7 years agoMLK-13745: ARM: dts: imx6sll: sync with i.mx6ul
Robin Gong [Thu, 12 Jan 2017 05:55:21 +0000 (13:55 +0800)]
MLK-13745: ARM: dts: imx6sll: sync with i.mx6ul

Because i.mx6sll support mega_fast power off, sdma driver can sync
with i.mx6ul which support this feature. Modify compatible name

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
7 years agoMLK-13741: video: mxsfb: unchecked return value
Guoniu.Zhou [Wed, 11 Jan 2017 06:42:02 +0000 (14:42 +0800)]
MLK-13741: video: mxsfb: unchecked return value

In overlayfb_enable(), unchecked the return value of lock_fb_info function, if
it return zero, it maybe cause mistakes.

Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
7 years agoMLK-13737 pxp: refine dithering setting
Robby Cai [Tue, 10 Jan 2017 09:02:17 +0000 (17:02 +0800)]
MLK-13737 pxp: refine dithering setting

- use different LUT setting and coefficient setting for different quantization
  bits.
- clear CTRL0_MUX14_SEL to 0 only when use dithering algorithm, set to 1 for
  not using dithering module.
- bypass PXP_OUT_AS for dithering and add DITHER_STORE_SIZE setting

Signed-off-by: Robby Cai <robby.cai@nxp.com>
7 years agoMLK-13739 video: mxsfb: use a pointer after free.
Guoniu.Zhou [Wed, 11 Jan 2017 02:07:28 +0000 (10:07 +0800)]
MLK-13739 video: mxsfb: use a pointer after free.

In mxsfb_overlay_exit, a pointer to freed memory is dereferenced, used as a
function argument, exchange the reference and freed function position.

Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
7 years agoMGS-2540 [#ccc] Need set baseAddress with RAM start address on IMX6Q
Yuchou Gan [Tue, 10 Jan 2017 16:53:16 +0000 (00:53 +0800)]
MGS-2540 [#ccc] Need set baseAddress with RAM start address on IMX6Q

set the baseAddress with 0x10000000 on IMX6Q

Signed-off-by: Yuchou Gan <yuchou.gan@nxp.com>
Date: Jan 10, 2017

7 years agoMLK-13679-2 PCI: imx: workaround of ERR010728 for pcie on imx7d
Richard Zhu [Tue, 27 Dec 2016 02:15:50 +0000 (10:15 +0800)]
MLK-13679-2 PCI: imx: workaround of ERR010728 for pcie on imx7d

Description: Initial VCO oscillation may fail under
corner conditions such as cold temperature. It causes
PCIe PLL fail to lock in initialization phase.

Project Impact: iMX7 PCIe PLL fails to lock and iMX7D
PCIe doesn't work.

Workarounds: To toggle internal PLL_PD signal to make
VCO oscillate after G_RST signal is de-asserted by
following the sequences:
  - De-asserted G_RST signal
  - Toggle internal PLL_PD signal:
    - Write "0x04" to the address "0x306D_0054"
    - Write "0xA4" to the address "0x306D_0054"
    - Write "0x04" to the address "0x306D_0054"
  - De-asserted CMN_RST signal

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
7 years agoMLK-13679-1 ARM: imx: add the imx7d pcie phy node
Richard Zhu [Tue, 27 Dec 2016 08:58:03 +0000 (16:58 +0800)]
MLK-13679-1 ARM: imx: add the imx7d pcie phy node

add imx7d pcie phy node into 7d dts

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>