Ye Li [Mon, 13 Aug 2018 08:49:19 +0000 (01:49 -0700)]
MLK-19157 imx8mm_evk: Disable dsi panel before booting kernel
Pull down the DSI_EN gpio to disable mipi dsi panel before booting kernel.
This avoids display full yellow screen before kernel mipi driver probes
the device.
For MIPI2HDMI card, this DSI_EN gpio is not used. So nothing impact to it.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
e73adc9a139f2e8bb92bda1631fa2f2391a8a5e3)
(cherry picked from commit
7e07aa674bfdd37c6334f3a4b37d166f09d3ef90)
Bai Ping [Wed, 25 Jul 2018 09:30:05 +0000 (17:30 +0800)]
MLK-19045 imx8mm_evk: enable the dispmix & mipi phy power domain
dispmix & mipi phy power domain must be enabled before doing any
config for lcfif and dsi.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit
240475ecb29aff22fb362ea39f3bf8e7045281db)
(cherry picked from commit
44d97952c66ef4d82302c871da9b91107a771ca7)
Ye Li [Wed, 18 Jul 2018 06:22:54 +0000 (23:22 -0700)]
MLK-18945-10 imx8mm_evk: Add splash screen support for MIPI DSI
Add board level codes for enabling splash screen on imx8mm EVK. We
support two different display connecting to MIPI DSI miniSAS interfaces:
1. MIPI2HDMI daughter card (default)
2. RM67191 OLED panel
Users can set "panel" env vairable to "MIPI2HDMI" or "RM67191_OLED" to
switch them after reboot.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
41f896ce26aa0f518b5cacb1d9660a0a085ee691)
(cherry picked from commit
ed7a612dac7401ab5a342522bbfc2ac9a74a7cdd)
Ye Li [Wed, 18 Jul 2018 06:13:59 +0000 (23:13 -0700)]
MLK-18945-9 imx8mm: Update SOC codes to support LCDIF
Enable the video PLL (594Mhz) and clocks in displaymix. Add the LCDIF clock
set interface to change its dot clock rate.
Update registers header file for LCDIF base address.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
3c27bc4bfa35dbebee2b5797c9137a2257946eca)
(cherry picked from commit
65bac60d03335a44cc0a7a0afab0e638a6ba53d6)
Ye Li [Wed, 18 Jul 2018 06:02:16 +0000 (23:02 -0700)]
MLK-18945-8 video: mxsfb: Update LCDIF driver for sec_mipi_dsi on iMX8MM
Update LCDIF driver for integrating with samsung mipi dsi controller on
iMX8MM platform.
The changes include:
1. Fix build warning for ARM64 platform.
2. Change max outstanding transactions req to 16 for better performance
on system bus.
3. Set ENABLE signal to active low for valid data transfer.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
43ee03181bd4e26ea389882dcd5285398438390d)
(cherry picked from commit
694351cb02474e195934f8a7068f225c094c0581)
Ye Li [Wed, 18 Jul 2018 05:56:19 +0000 (22:56 -0700)]
MLK-18945-7 video: Add mipi panel driver RM67191
Add a mipi dsi panel driver for RM67191 panel which is attached to mipi dsi
controller.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
01e116ccd2e2705be3fb427da74cb19bab7ab4e0)
(cherry picked from commit
074cbb1c8fe2841f152b861e434772807a2ec3bb)
Ye Li [Wed, 18 Jul 2018 03:35:11 +0000 (20:35 -0700)]
MLK-18945-6 video: Add driver sec_mipi_dsim for mipi dsi on iMX8MM and iMX7D
Add new mipi dsi driver sec_mipi_dsim to support the samsung mipi dsi used
on iMX8MM and iMX7D platforms. This driver implements the interfaces required
by mipi dsi bridge. Users can use mipi dsi bridge common APIs to access it.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
b08b17cde486a232b602b806862de56a26117c51)
(cherry picked from commit
782400a71844b0f0cbe0a5312cea555e797e1ae8)
Ye Li [Wed, 18 Jul 2018 03:29:41 +0000 (20:29 -0700)]
MLK-18945-5 mx7ulp_evk: Update board codes for mipi display
Setup the mipi_dsi_northwest driver and register a the HX8363 panel
device to mipi dsi bridge in board codes.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
fca13cf24f4a7be15747d92e4622d5e3749f80ef)
(cherry picked from commit
3005907903a4bdcfe69dd38b84d8627e15172a0e)
Ye Li [Wed, 18 Jul 2018 03:25:11 +0000 (20:25 -0700)]
MLK-18945-4 video: mxsfb: Update LCDIF driver to use dsi bridge
Remove the functions for northwest driver and HX8363 driver, change
to use mipi dsi bridge interfaces.
The mipi_dsi_northwest driver setup and hx8363 init will move to
board level codes.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
0b8dc73e42ade9f44a3bbcf3662898772434988d)
(cherry picked from commit
13b169618402876c3fffa786701c796c38bc0f6a)
Ye Li [Wed, 18 Jul 2018 02:22:52 +0000 (19:22 -0700)]
MLK-18945-3 video: Update mipi panel driver HX8363
Update the HX8363 mipi panel to use new mipi dsi bridge interfaces
to register a panel device and send command packets. So this panel
driver can decouple with mipi_dsi_northwest driver.
A new header file mipi_dsi_panel.h is added for all panel init
functions declare.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
1d355d37cce9a844011fbf27f7d4801068919ac4)
(cherry picked from commit
1bd8d4f4a339ec3f9a77e49ffb6a4a945acd3e4c)
Ye Li [Wed, 18 Jul 2018 02:13:13 +0000 (19:13 -0700)]
MLK-18945-2 video: Update mipi dsi northwest to implement bridge interface
Update the mipi_dsi_northwest driver to implement mipi dsi bridge interfaces
and register it as a bridge controller. Users can call bridge common interfaces
to access the northwest driver, don't need to call its private driver functions.
We also add a kconfig entry for this driver, the name is changed to
CONFIG_IMX_NORTHWEST_MIPI_DSI
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
a668cdb1ef5bcef4a574640f5c06ff07520254df)
(cherry picked from commit
f7a9859569c3677f6f48dd4807da7d993b40a9bf)
Ye Li [Tue, 17 Jul 2018 10:32:11 +0000 (03:32 -0700)]
MLK-18945-1 video: Add mipi dsi bridge driver
Add a mipi dsi bridge driver to abstract mipi dsi interfaces for
mipi panel and display controller drivers.
So for panel and display conntroller drivers, they can use same functions
to access mipi dsi controller.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
4bb9c1168a9b2796a1360d5e93420e4737fc3ba3)
(cherry picked from commit
2880a49732e3ecfd048a324df18975b79aa7a8e2)
Fabio Estevam [Mon, 14 May 2018 16:46:58 +0000 (13:46 -0300)]
MLK-18318: mx7ulp: Enable QSPI interrupt as a wakeup source on MX7ULP
MX7ULP needs to have the QSPI interrupt configured as a wakeup source
in the SIM_WKPU_WAKEUP_ENABLE register, otherwise the QSPI interrupts
do not wakeup the CPU from idle mode leading to poor performance in
Linux.
The SIM_WKPU_WAKEUP_ENABLE register only exists in B0 silicon, so
make sure to only write to this register in the B0 version (or greater).
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
(cherry picked from commit
1ab33446d6843f560fb6d14c781f6417225f8f3d)
(cherry picked from commit
8116f34387f8164dd72656fb8278e6df9fdf4c05)
Ye Li [Mon, 9 Apr 2018 09:06:16 +0000 (02:06 -0700)]
MLK-14606 mx7ulp: Modify ENV offset to 896K
Since the u-boot size increases after using OF_CONTROL to including DTB,
we have to adjust ENV_OFFSET to 896K for SD/eMMC/FLASH.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
9d2df7407c58cd8b29fcbf57144e8ad9d8795207)
Haibo Chen [Wed, 14 Mar 2018 09:15:23 +0000 (17:15 +0800)]
MLK-17586-3 i.MX7ULP: change USDHC clock rate
Change USDHC0 and USDHC1 per clock source from APLL_PFD1,
and set the APll_PFD1 clock rate to 352.8MHz.
Also gate off APll_PFD1/2/3 before boot OS, otherwise set
the clock rate of APll_PFD1/2/3 during OS boot up will triger
some warning message.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit
07ef0fab23204684d82f27baf721a72b247f30c5)
(cherry picked from commit
1c30a73542990afbe48bf7a398baba9c5efaf4fe)
Breno Lima [Tue, 20 Mar 2018 13:09:47 +0000 (10:09 -0300)]
MLK-17897: mx7ulp: Move CONFIG_SECURE_BOOT option to Kconfig
Since commit
6e1f4d2652e79 ("arm: imx-common: add SECURE_BOOT option
to Kconfig") it's preferable to select CONFIG_SECURE_BOOT via Kconfig.
Add ARCH_MX7ULP as a CONFIG_SECURE_BOOT dependency, do not select
CONFIG_FSL_CAAM since CAAM is not implemented for i.MX7ULP yet.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
d4c01cd3f6f5ba59ca17ebf52f610f629895ac7a)
(cherry picked from commit
4ba6e5aa05ec8872426aa68da3879e8fcd835710)
Ye Li [Tue, 6 Mar 2018 08:19:13 +0000 (00:19 -0800)]
MLK-17785 mx7ulp_evk: Update DDR freq to 352.8Mhz for ULP B0
On i.MX7ULP B0, the DDR clock target is increased from 320Mhz to 380Mhz.
We update DDR clock relevant settings to approach the target. But since the
limitation on LCDIF pix clock for HDMI output
(refer commit
dba948539edd4611610d9f1fc3711d1d922262ae), we set DDR clock to
352.8Mhz (25.2Mhz * 14) by using the clock path:
APLL PFD0 -> DDR CLK -> NIC0 -> NIC1 -> LCDIF clock
To reduce the impact to entire system, the NIC0_DIV and NIC1_DIV are kept,
so the divider 14 is calculated as:
14 = (NIC0_DIV + 1) * (NIC1_DIV + 1) * (LCDIF_PCC_DIV + 1)
NIC0_DIV: 1
NIC1_DIV: 0
LCDIF_PCC_DIV: 6
APLL and APLL PFD0 settings:
PFD0 FRAC: 27
APLL MULT: 22
APLL NUM: 1
APLL DENOM: 20
This patch applies the new settings for both DCD and plugin.
There is no DDR script change on this new frequency.
Overnight memtester is passed.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit
a48daae2d43cb0415ad8b3cfca0f6d064ac6cd74)
(cherry picked from commit
a3b6fff130f1cc1406d24fa534faa925beb2c87b)
Ye Li [Mon, 22 Jan 2018 03:22:40 +0000 (19:22 -0800)]
MLK-17439 mx7ulp: Change clock rate calculation for NIC1 BUS and EXT
On i.MX7ULP B0, there is change in NIC clock dividers architecture.
On A0, the NIC1 BUS and EXT dividers were in a chain with NIC1 DIV, but
on B0 they are parallel with NIC1 DIV. So now the dividers are independent.
This patch modifies the scg_nic_get_rate function according to this change.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit
1a53e025c6be73a84570a3857cb709d98e49ef96)
(cherry picked from commit
ae54e190e6085687658419c4d971ae51fe91c589)
Ye Li [Fri, 15 Dec 2017 07:28:06 +0000 (01:28 -0600)]
MLK-17292 mx7ulp: Set A7 core frequency to 500Mhz for B0 chip
The normal target frequency for ULP A7 core is 500Mhz, but now ROM
set the core frequency to 413Mhz. So change it to 500Mhz in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
4f822410518cd5847f8621d66c3e3b2599145b9e)
(cherry picked from commit
a590c741855f95fecaf2ba9fe3a5e936321d294d)
Ye Li [Wed, 13 Dec 2017 06:22:09 +0000 (00:22 -0600)]
MLK-17200-3 mx7ulp: Select the SCG1 APLL PFD as a system clock source
Due to the APLL out glitch issue TKT332232, the APLLCFG PLLS bit must be set
to select SCG1 APLL PFD for generating system clock to align with the design.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit
242823400c5bd59960e1b40d941e177e8ebad57e)
(cherry picked from commit
3c8d8b0a95f8b1132e301e7e00955846b12aa4cc)
Ye Li [Wed, 13 Dec 2017 06:16:31 +0000 (00:16 -0600)]
MLK-17200-1 mx7ulp: Add CPU revision check for B0
Since there is no register for CPU revision, we use ROM version to
check the A0 or B0 chip.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit
9ad30c8439ece3a8b88040847155405fca40facf)
(cherry picked from commit
380791dc105256494d30fc1883978808cf83fc04)
Ye Li [Wed, 14 Jun 2017 13:19:06 +0000 (08:19 -0500)]
MLK-15087 mx7ulp_evk: Add m4 boot defconfig
Add back the defconfig to boot M4 in single mode, because some customers
are using the defconfig during development.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit
ad2298d04fe2443e2b60114001523555d0cd5a50)
(cherry picked from commit
26697788474a1a38d84679a9a6b86a6b455cbd0b)
Ye Li [Tue, 28 Mar 2017 08:52:12 +0000 (16:52 +0800)]
MLK-14533 mx7ulp_evk: Change APLL and its PFD0 frequencies
To support HDMI display on EVK board, the LCDIF pix clock must be 25.2Mhz. Since
the its PCC divider range is from 1-8, the max rate of LCDIF PCC source clock is
201.6Mhz. This limits the source clock must from NIC1 bus clock or NIC1 clock, other sources
from APLL PFDs are higher than this max rate.
The NIC1 bus clock and NIC1 clock are from DDRCLK whose parent source is APLL PFD0, so we must
change the APLL PFD0 and have impact to DDRCLK, NIC1 and NIC1 bus.
Eventually, this requests to set the APLL PFD0 frequency to 302.4Mhz (25.2 * 12),
with settings:
PFD0 FRAC: 32
APLL MULT: 22
APLL NUM: 2
APLL DENOM: 5
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
91be2789a93288cc087cd9e8db522c8308ef007c)
(cherry picked from commit
dba948539edd4611610d9f1fc3711d1d922262ae)
(cherry picked from commit
b2842f99262f10ac6595d1350e2a97c2e92118c9)
Ye Li [Thu, 13 Apr 2017 03:40:46 +0000 (11:40 +0800)]
MLK-14689 mx7ulp: Workaround APLL PFD2 to 345.6Mhz
The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider set to 1.
This frequecy is out of ULP A0 spec. The MAX rate for GPU is 350Mhz.
So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28) to workaround the problem.
The correct fix should let GPU handle the clock rate in kernel.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
e931d534fd68e0e639082766de17a20e705fd908)
(cherry picked from commit
e72f766c98a3df9b620feb51484e33c7d50bed3c)
(cherry picked from commit
da29f331eded32b5de637ef2c4664b43ab184cee)
Ye Li [Fri, 17 Mar 2017 07:38:43 +0000 (15:38 +0800)]
MLK-14483 mx7ulp: Fix SPLL/APLL clock rate calculation issue
The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
4a8f51499ca098637e9ee2036066374d34458865)
(cherry picked from commit
65e74eb0b354cb01c8422f30f9e14dead42201b9)
(cherry picked from commit
a84ceb62b8c7e45353cccecf527e3471dada5b7a)
Ye Li [Fri, 17 Mar 2017 09:52:42 +0000 (17:52 +0800)]
MLK-14445-10 mx7ulp_evk: Enable OCOTP fuse
Add the OCOTP driver and fuse command configurations.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
ab7ce08ea33342adee44f6a4de86a2c8b8ec993c)
(cherry picked from commit
1525557a007851fef21ce570cf641ce731ed6625)
Ye Li [Fri, 17 Mar 2017 09:17:59 +0000 (17:17 +0800)]
MLK-14445-9 mx7ulp_evk: Add eMMC reworked board support
Add build configuration and DTS file to enable eMMC for eMMC reworked
EVK board.
Because the eMMC DTS file has QSPI node disabled, so we change to use
non-DM QSPI driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
9ae0e03eb829f694d26caec22f91d1f0fdba980d)
(cherry picked from commit
29a10734150e91d3b5596f11a7533cb52dc5a4d2)
Ye Li [Fri, 17 Mar 2017 08:23:46 +0000 (16:23 +0800)]
MLK-14445-8 mx7ulp_evk: Add dynamical MMC device detection
Add board_late_mmc_env_init to support MMC device detection for environment
variables.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
6c2fe5b60692e7d0e86383c44792e5f2938bfa14)
(cherry picked from commit
74f5fffe9aee3e1434b63b95e33e7ecc7e5a2b08)
Ye Li [Fri, 17 Mar 2017 08:14:46 +0000 (16:14 +0800)]
MLK-14445-7 DTS: mx7ulp: Add PTA and PTB two GPIO banks
PTA and PTB banks are at M4 domain, but some boards like ARM2 use
them for controlling A7 domain modules. So we may need to support
them in GPIO driver.
In the imx_rgpio2p driver, the non-DM driver supports full 6 GPIO
banks, with PTA from index 0. But the DM driver which uses DTB only
have 4 GPIO banks, with PTC from index 0.
This will cause problem when using GPIO. So this patch add PTA and PTB
banks to DTB, and reorder the sequence for gpio with PTA from index 0.
So the non-DM driver and DM driver are aligned.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
0b4965271702d6a40047bd0c9b419dd007c03f35)
(cherry picked from commit
00a9e360416cf099a7697a375469d91cf63d5701)
Peter Chen [Wed, 16 Nov 2016 06:07:53 +0000 (14:07 +0800)]
MLK-13547 configs: mx7ulp_evk: enable ethernet boot support
Since we can use USB ethernet instead of local ethernet, add ethernet support
for it. To use USB ethernet function at u-boot, just plug in Micro-AB cable
at USBOTG1 port with USB2Ethernet adapter connected.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit
60ffddf87cf6b8502c5d5fc6540364adfd66ebb3)
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
63c2e1de37e1e24f35279f50efa5a330e2cb3d07)
(cherry picked from commit
c82f3bef0aa0cba4937eb6c39501e446dca01746)
Ye Li [Wed, 15 Feb 2017 09:45:17 +0000 (17:45 +0800)]
MLK-13929-6 mx7ulp_evk: Enable the MIPI DSI splashscreen
Enable and setup board level codes for MIPI DSI splashscreen on EVK board.
User needs set env variable"panel=HX8363_WVGA" for displaying.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
49cb68f5c17e42f9290336e1252ace6ac7d0b5ce)
(cherry picked from commit
be3d3d5c140a1617c1ce35e8657f2d45bc8c70eb)
(cherry picked from commit
b7bb615158936fc4b819ed632ee0b207f3316394)
Ye Li [Wed, 15 Feb 2017 09:38:55 +0000 (17:38 +0800)]
MLK-13929-5 mx7ulp: Update clock and SoC functions for video
Add the clocks functions for enabling LCDIF and DSI clocks.
Also add the arch_preboot_os to disable the video before enter into
the kernel.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
a783799017a929f9918c9c5981fe3a7a25cd8125)
(cherry picked from commit
fce3f6e59f6ae5a171bbb6581420712c4aaa14c3)
(cherry picked from commit
60d57156df1bbbd35c06ec3c9dfcf753c4280e39)
Ye Li [Wed, 15 Feb 2017 09:34:10 +0000 (17:34 +0800)]
MLK-13929-4 mx7ulp: Update registers and memory map for DSI and LCDIF
Update the registers base address and LCDIF registers structure for
mx7ulp.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
29a2032fc0c2330718dbab1f96c1201ae5b49b6f)
(cherry picked from commit
d9c18658e20ad8cca6f1d1fda39c2c0b8f4fed95)
(cherry picked from commit
d7f8f2690ceec70fdaebe91cbd3cc08688ef7543)
Ye Li [Wed, 15 Feb 2017 09:27:31 +0000 (17:27 +0800)]
MLK-13929-3 video: Update LCDIF driver to support MIPI-DSI
The LCDIF provides video source for MIPI DSI host at DPI-2 interface.
When the LCDIF Framebuffer driver is enabled, it uses the panel
parameters setup by environments to create a panel device and register
it to DSI host driver and then enable the DSI host.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
85659ea5ee975fa2d5fa7215e17a01f7006c39bf)
(cherry picked from commit
7ef1d78154fef4f799dbf7de0f3d9679911ffa39)
(cherry picked from commit
c08b971781fca4c6336bda71bae05c073e294e30)
Ye Li [Wed, 15 Feb 2017 09:04:08 +0000 (17:04 +0800)]
MLK-13929-2 video: Add mipi panel driver for hx8363
Add the mipi dsi panel driver for device HX8363 from kernel. The panel
driver needs work with mipi_dsi_northwest driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
0c6d0f4202bae7f61d38ecff1c9d255261f022f2)
(cherry picked from commit
d65bbb0585a906072f01a2d72169be0b13b1d9b8)
(cherry picked from commit
86264cba4b623e8b5bf57049f3e424e1537b7cdd)
Ye Li [Wed, 15 Feb 2017 08:34:50 +0000 (16:34 +0800)]
MLK-13929-1 video: Add MIPI DSI host controller driver for i.MX7ULP
Add the host driver base from kernel for MIPI DSI controller on i.MX7ULP.
The controller provides a DPI-2 interface for LCDIF video stream, and a APB interface
for packet transmission.
The driver provides APIs to register a MIPI panel device and its driver. The panel
driver can use the write packet function provided by the host driver to send control
packets to panel device via APB interface.
MIPI DSI has its PHY and dedicated PLL. The driver will setup them when enabling the DSI
host.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
e02115dd1c5d36ec06eabcb5a0b8e09aaf0f29a0)
(cherry picked from commit
1e984bba8cd961daa4c5bf994a6a90a72cc2f114)
(cherry picked from commit
a4f1e8b67658d4b828d792d5b28cbcf4e7600479)
Ye Li [Thu, 16 Mar 2017 09:02:56 +0000 (17:02 +0800)]
MLK-14445-6 mx7ulp_evk: Add USB OTG0 support
Porting codes to support USB OTG0 on the EVK board. Convert
to use DM USB driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
b4e01a67a0740c524e7522da7ace0488f86261db)
(cherry picked from commit
23144983d3347f8f91695cea73aab8558cc66629)
Ye Li [Thu, 16 Mar 2017 07:59:26 +0000 (15:59 +0800)]
MLK-14445-4 mx7ulp: Fix wrong i2c configuration name
Wrong I2c driver configuration name is used in codes, so I2c driver is
not built. Correct it.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
d54d59ecc1800a46d5ed897448496b8d73a822aa)
(cherry picked from commit
d7983b7aeaa669790c918670a2f9f9d74c9c00a5)
Ye Li [Thu, 16 Mar 2017 05:40:01 +0000 (13:40 +0800)]
MLK-14445-3 mx7ulp_evk: Enable wdog driver for reset cpu
Enable the CONFIG_ULP_WATCHDOG in defconfig, so that reset command
can work.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
da1c290f0b890fafeb8ce29b53b764eaee53520b)
(cherry picked from commit
7a4ba3eb22732ba0d4cc47552413bad8c1d94dbe)
Ye Li [Thu, 16 Mar 2017 03:25:35 +0000 (11:25 +0800)]
MLK-14445-2 mx7ulp_evk: Add QSPI flash support
Porting the QSPI flash board support from v2016.03, and convert to use
DM QSPI driver.
Since we need to support QSPI at default in u-boot, change the default
DTS file to qspi enabled DTS.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
41895cd598be6c4a64fc4fec521120e4962abc28)
(cherry picked from commit
b4698ce0e5b6952a88702075ce905a059da277d9)
Ye Li [Thu, 16 Mar 2017 05:31:38 +0000 (13:31 +0800)]
MLK-14445-1 mx7ulp: select CONFIG_MX7ULP for EVK board
Since many drivers need this CONFIG_MX7ULP to distiguish the settings
for i.MX7ULP only. So have to select this kconfig for EVK board.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
a4d958d120d29f6f79e9023715a42bac582f4c76)
(cherry picked from commit
ed4a4a9d1c695f8fafd31e92059b9d3e8e696708)
Ye Li [Tue, 14 Feb 2017 05:39:10 +0000 (13:39 +0800)]
MLK-13925-1 mx7ulp_evk: Update LPDDR3 script to V1.4
Update LPDDR3 script from v1.2 to v1.4 EVK_IMX7ULP1_LPDDR3_320MHz_1GB_32bit_V1.4.inc
with the changes below:
Version 1.3
-Update the precharge command to CMD=01 at the DDR initialization phase
Version 1.4
-remove unimplemented registers
Write data bit delay --refer to the DDR_TRIM bits in IOMUXC1_DDR_SW_PAD_CTL_PAD_DDRn
File:
http://compass.freescale.net/livelink/livelink?func=ll&objid=
235761218&objAction=browse&sort=name&viewType=1
Test:
One EVK board passes overnight stress test.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
e3343cb38eac2cc69b58247b5adcb500e5f19834)
(cherry picked from commit
f5dc17e6579f677eebe1df59570737f4d51430dd)
Ye Li [Tue, 14 Feb 2017 03:39:12 +0000 (11:39 +0800)]
MLK-13924 mx7ulp: Fix APLL num and denom setting issue
For the current APLL setting, as we want the APLL PFD0 to meet DDR clock 320Mhz requirement.
We set MULT to 20, NUM to 4 and DENOM to 2, to get final 22 multiplier. But according to the RM,
the NUM should always be less than the DENOM. So our setting violates the rule.
Actually the ROM has already set the MULT to 22 and leave NUM/DENOM in default value. The calculated APLL PFD0 clock
is 318.9888Mhz, which also meet the DDR requirement.
To fix the issue, we remove the PLL settings in DCD to use default value from ROM, and only set the PFD0 FRAC.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
8cc70b1ded5309dee522aa00b43bd702a209ba51)
(cherry picked from commit
4eb0fbdacfe0678e41d1ebf35c7863736e83637e)
Ye Li [Tue, 14 Feb 2017 02:30:18 +0000 (10:30 +0800)]
MLK-13923 mx7ulp: Fix PCC register bits mask and offset issue
The offset for FRAC and the mask for PCD are not correct. If we set FRAC, we
can't get the right frequency. Fix them to correct value.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
079db9559c06c5e68ab8f6cd67ec4f5115dd2d59)
(cherry picked from commit
cd293a66df0409c6d030c22f872353e8f2613f03)
Bai Ping [Thu, 9 Feb 2017 05:50:32 +0000 (13:50 +0800)]
MLK-13899 ARM: mx7ulp: Correct the clock index on imx7ulp
On i.MX7ULP, value zero is reserved in SCG1 RCCR register,
so the val should be decreased by 1 to get the correct clock
source index.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit
7c9a3573ec0191f1e0bea12956346a5eab2db43a)
(cherry picked from commit
de38b748fcd138ddcae4dda2bcfbf04466c33d21)
(cherry picked from commit
36dded26c8bbbdf57a5588604a14439e10fbdd8b)
Bai Ping [Thu, 19 Jan 2017 10:27:34 +0000 (18:27 +0800)]
MLK-13761 board: imx7ulp: Fix system reset after a7 rtc alarm expired.
The board will reboot if A7 core enter mem mode by rtc, then M4 core
enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode
to fix this issue.
Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access
it. So check the CPU rev and not apply the settings for B0.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit
5aa5974f487e0b4c2e963a86203161c5f05e2fdf)
(cherry picked from commit
f8e921300640044f25e6285e72969ecd2e7acbfd)
Ye Li [Fri, 23 Dec 2016 04:01:06 +0000 (12:01 +0800)]
MLK-13645 mx7ulp: Modify FDT file to disable SD3.0 for mfgtool
Since the SD3.0 kernel driver needs M4 image support, this causes problem to mfgtool.
To decouple the relationship, we modify the FDT file in u-boot to disable
SD3.0 when booting from USB for mfgtool. So the kernel won't depend on M4 image.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit
1826d6e4dc732521190c742f812193be95eea211)
(cherry picked from commit
589812f232a7a07873a74e5506153977ce11dce2)
(cherry picked from commit
6211998daee1c9c520edaa0d2b3cdc834e7b6ce8)
Ye Li [Fri, 25 Nov 2016 06:00:55 +0000 (14:00 +0800)]
MLK-13525-1 mx7ulp: Add common plugin codes for mx7ulp
Add common plugin codes to call ROM's hwcnfg_setup and generate IVT2
header.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
58ffe85c25ff554c185d8f6fd8b6443f167227da)
(cherry picked from commit
8dc963c970f81f9cdefff0955eba6b27ca7dc17e)
(cherry picked from commit
ba08d78c8486e767c85aff9823ecfecd9f1e148a)
Ye Li [Thu, 9 May 2019 02:36:07 +0000 (19:36 -0700)]
MLK-13450-17 sf: Add Macronix MX25R6435F SPI NOR flash to flash parameters array
On mx7ulp EVK board, we use MX25R6435F NOR flash, add its parameters
and IDs to flash parameter array. Otherwise, the flash probe will fails.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
0d6bee19bb3e87ebf984fdc218b3b020006cb2e9)
Ye Li [Mon, 14 Nov 2016 09:58:04 +0000 (17:58 +0800)]
MLK-13450-7 mx7ulp: Add M4 core boot support when using single boot mode
The single boot mode in MX7ULP will only boot up A7, the M4 is running in ROM
by checking entry from SIM0 GP register.
In this patch, We bind M4 image with u-boot.bin by allocating a section for m4 image.
So the whole image (included M4 image) will be loaded by A7 ROM into DDR. Then
when u-boot is up, it will try to load M4 image into TCML and boot it there.
Since M4 image will not be relocated in u-boot codes, we must load it during
board_f. Current implementation put it in arch_cpu_init to get M4 booted
as quick as possible.
We requires the M4 image with IVT head and padding embedded, not a RAW binary. The
image should be same as what is used for M4 QSPI boot in dual boot mode.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
04163dbd4f6190f310fff17b53b4bc7b8370ba89)
(cherry picked from commit
81b5ea14493ef25a6cca22bc5651ec3e93e941f3)
(cherry picked from commit
1e4414da2e9a671896af1af887ab710489a2007e)
Ye Li [Tue, 13 Dec 2016 07:33:41 +0000 (15:33 +0800)]
MLK-13602-3 mx6ullevk: Enable module fuse checking for mx6ull boards
Enable the module disable fuse checking configurations, and ENET fuse checking during
ENET setup.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit
d2192a3909be8ab9433082e7c04c917489b28e25)
(cherry picked from commit
5fa7d431db1c5eda903f211a99c426d8d57293bd)
(cherry picked from commit
5fc6fe6b0f85f61bc60712af5b8cd55e7b8b0789)
Ye Li [Tue, 15 Mar 2016 14:16:54 +0000 (22:16 +0800)]
MLK-12483-5 mx6ul: Enable module fuse check EVK board
Enable the configurations CONFIG_MODULE_FUSE and CONFIG_OF_SYSTEM_SETUP for
module fuse check. And modify board level codes for SD, FEC and EIM.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
9232e9f7637afa3b71b43ab2d1361582ec5a080a)
(cherry picked from commit
687b586bf7d3b0d2f796c8ea768e4fb450079adb)
(cherry picked from commit
f1cdd3b004b15d950b35f3ef625af23c2f106f5a)
Ye Li [Wed, 16 Mar 2016 05:50:54 +0000 (13:50 +0800)]
MLK-12483-4 mx6: Modify drivers to disable fused modules
Add the fuse checking in drivers, when the module is disabled in fuse,
the driver will not work.
Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C,
USB-EHCI, GIS, LCDIF and EPDC.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
1704e116f9b39aeb99201919a18bc2b1e19a980e)
(cherry picked from commit
2d3b5df8530cd5ef883750378838dea7c40259af)
(cherry picked from commit
6e8c9ae136bee8ec0121c1db4b935510caad09db)
Ye Li [Wed, 4 Apr 2018 08:46:32 +0000 (01:46 -0700)]
MLK-18156-3 configs: mx6ullevk: Update build configs
Add new build configs for 9x9 evk and NAND/QSPI boot.
Update 14x14 EVK build config to align with v2017.03
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
e93235cbcf624a476c95f4e9e8fd51e667ab4aa2)
Ye Li [Wed, 4 Apr 2018 08:45:41 +0000 (01:45 -0700)]
MLK-18156-2 mx6ullevk: Update board level codes
To align with v2018.03, add functions:
1. Support GPMI NAND
2. Support LCD splash screen
3. Add 9x9 EVK board support with LPDDR2 used
4. Update PMIC and LDO bypass for 9x9 EVK
5. Support two ethernet controllers
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
154d6c905a848eed3bcc1ae2e142da3508a61b92)
Ye Li [Wed, 4 Apr 2018 07:52:22 +0000 (00:52 -0700)]
MLK-18156-1 dts: mx6ullevk: Add DTS for i.MX6ULL EVK boards
Update the DTS files for 14x14 EVK and 9x9 EVK to align with
v2018.03
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
0519c07b74ee3eb6818d71abb02d256ed574bf61)
Ye Li [Wed, 4 Apr 2018 06:19:07 +0000 (23:19 -0700)]
MLK-18155-3 configs: mx6ulevk: Update build configs
Align the build config files with v2018.03.
Add config files for reworked eMMC, NAND boot, QSPI boot
and plugin support. Move original defconfig to _spl_defconfig to keep
SPL support.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
bf3882af8ddc804bc35a16dd73034b88eab5e4e2)
Ye Li [Wed, 4 Apr 2018 05:58:09 +0000 (22:58 -0700)]
MLK-18155-2 mx6ulevk: Update board level codes
Add functions below to align with v2018.03
1. Switch from SPL to Non-SPL
2. Add plugin and DCD for DDR initialization
3. Add two ethernet controllers support
4. Add LCD splash screen
5. Add GPMI NAND support
6. Add LDO bypass settings
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
35588e570f0232c56ac5b711bb47212205cccdd1)
Ye Li [Wed, 4 Apr 2018 05:54:49 +0000 (22:54 -0700)]
MLK-18155-1 dts: mx6ulevk: Add DTS for i.MX6UL EVK boards
Update imx6ul.dtsi file to align with kernel
(commit
f3834c73366f985fef6c1fdaaa129dfceb6151cb)
Remove the MMC alias due DM MMC will used as device index.
Add the DTS files for 14x14 EVK, 9x9 EVK, etc.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
c2e510834d88b4f3a04af240d9585d4ab3c6ac9c)
Ye Li [Wed, 4 Apr 2018 02:50:27 +0000 (19:50 -0700)]
MLK-18154-3 configs: mx6sllevk: Update build configs
Align the build configs with v2018.03, add new config for EPDC enabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
bbc43351ab3da32bcdb33ad1d9aa0bd6c7d7f193)
Ye Li [Wed, 4 Apr 2018 02:48:37 +0000 (19:48 -0700)]
MLK-18154-2 mx6sllevk: Update board level codes
Add EPDC and LCD splash screen display support
Update environment settings to align with v2018.03
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
5c2afb47a6ce15e6a0830771b09452d346c87688)
Ye Li [Wed, 4 Apr 2018 02:41:18 +0000 (19:41 -0700)]
MLK-18154-1 dts: mx6sllevk: Update DTS to align with v2018.03
Update DTS, DTSi and clock binding file for mx6sllevk:
1. Fix USDHC pad settings
2. Add pin settings for i2c bus force idle
3. Fix non-removable bug for usdhc2
4. Update clock
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
26bd5feefec059a0176768e89016cdc289839103)
Ye Li [Tue, 3 Apr 2018 08:59:43 +0000 (01:59 -0700)]
MLK-18153-3 configs: mx6slevk: Update build configs for mx6slevk
Add two build configs for EPDC and plugin.
Update default mx6slevk defconfig and spinor defconfig to align
with v2017.03
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
c635b7f4f0eeb29510896f0df2715b8c1fb59553)
Ye Li [Tue, 3 Apr 2018 08:53:04 +0000 (01:53 -0700)]
MLK-18153-2 mx6slevk: Update board codes to align with v2018.03
Porting functions from v2018.03 in board level codes:
1. Add EPDC support
2. Update environment settings
3. Add LDO bypass and update PMIC settings
4. Add keypad support
5. Add plugin support
6. Add DM ethernet driver support
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
88232c1cbf9389e82f8e00c1cc3fcd6456292ed4)
Ye Li [Tue, 3 Apr 2018 08:49:54 +0000 (01:49 -0700)]
MLK-18153-1 dts: mx6slevk: Update DTS and DTSi to align with v2018.03
Copy the DTS and DTSi from 4.14 kernel.
Changes in DTS specified for u-boot:
1. Add alias for mmc and usb
2. Add pin settings for i2c bus force idle
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
e669373fc5f861750b2b7b59cde6c31c43cf61fb)
Ye Li [Tue, 3 Apr 2018 07:31:00 +0000 (00:31 -0700)]
MLK-18152-6 configs: mx6sxsabreauto: Update and add build configs
Update mx6sxsabreauto defconfig to align with v2018.03.
Add other configs to support QSPI1 boot, NAND boot and plugin.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
779b3bd0ede4050689b12982bfa2abe1d07b566e)
Ye Li [Tue, 3 Apr 2018 07:27:48 +0000 (00:27 -0700)]
MLK-18152-5 mx6sxsabreauto: Update board codes to align with v2018.03
Update DM PMIC settings and LDO bypass support.
Add BMODE support.
Add LVDS and LCD splash screen support
Add two ethernet controller support
Update environment settings
Add plugin support
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
beaea14e18f138249521f0de8a8ef902d555cb89)
Ye Li [Tue, 3 Apr 2018 07:21:44 +0000 (00:21 -0700)]
MLK-18152-4 dts: mx6sxsabreauto: Update DTS to align with v2018.03
Copy the DTS from 4.14 kernel
Compared with kernel DTS, the changes in DTS for u-boot:
1. Add pin settings for supporting i2c bus force idle.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
67d0c3427562a81713ac8d00f5a976ac2942cb1a)
Ye Li [Tue, 3 Apr 2018 04:00:43 +0000 (21:00 -0700)]
MLK-18152-3 configs: mx6sxsabresd: Update and add build configs
Update mx6sxsabresd defconfig to align with v2018.03 with DM
ethernet enabled.
Add other configs to support QSPI2 boot, reworked eMMC, M4 fastboot and
plugin.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
8b5dd6ebeedf3325aacc3f61c1ae77b584d8756a)
Ye Li [Tue, 3 Apr 2018 03:52:12 +0000 (20:52 -0700)]
MLK-18152-2 mx6sxsabresd: Update board codes to align with v2018.03
Add emmc support which needs board rework.
Add I2C2.
Update DM PMIC settings and LDO bypass support.
Add BMODE support.
Add LVDS and LCD splash screen support
Add PCI power and reset GPIO and disable PCI at default.
Update QSPI settings for QSPI boot and M4 fastup.
Update environment settings
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
e74716b6e78f016226dc9f800b04574f545d9367)
Ye Li [Tue, 3 Apr 2018 03:45:16 +0000 (20:45 -0700)]
MLK-18152-1 dts: mx6sxsabresd: Update and add mx6sxsabresd DTS files
Update i.MX6SX dtsi file and relevant DTS header files.
Add the imx6sx-sdb-emmc DTS file for reworked eMMC board.
Changes in DTS and DTSi:
1. Add spi0 and spi1 alias for qspi1 and qspi2.
2. Add USB alias for usb0 and usb1
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
9d8838cb1409c265db3dd0b64219e1286202c10d)
Ye Li [Tue, 7 May 2019 07:42:52 +0000 (00:42 -0700)]
MLK-18151-3 config: mx7dsabresd: Update config files to align with v2018.03
Add config files to support NAND boot.
Add config file for plugin.
Add config files for RevA board and RevB boards.
Remove the SYS_TEXT_BASE
Rename mx7dsabresd_qspi_defconfig to mx7dsabresd_qspi1_defconfig
Signed-off-by: Ye Li <ye.li@nxp.com>
Ye Li [Mon, 2 Apr 2018 08:33:43 +0000 (01:33 -0700)]
MLK-18151-2 mx7dsabresd: Update codes to align with v2018.03
1. Add plugin support
2. Update to latest ddr3 script v2.0 version
refer commit (
b4db09bc0fc96e7c7461afade6346e0700ad582f)
3. Add ddr3 script for TO1.1
5. Update header file for NAND boot settings.
6. Remove the wdog WCR bit 4 clear. Since we have implemented reset_cpu for mx7d.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
16e51b5b59700a49c48cdfd8b308aa8793eeb44a)
Ye Li [Tue, 7 May 2019 05:35:22 +0000 (22:35 -0700)]
MLK-18151-1 dts: mx7d: Update imx7d dts and binding files
Porting the the imx7d dtsi, dts files and binding files from 4.14 kernel
(
e88899128d81ea8b82dfd7d294572f21c388e568)
New dts files are added to support GPMI-WEIM, RevA boards.
Changes in DTS and DTSi:
1. Add USB alias
2. Modify the SPI alias for qspi
3. Disable USDHC2 since it is for SDIO
4. Add i2c force idle support pins
5. Add back mmc alias by comparing with 2018.03.
6. Update clock, pin and reset binding files
Signed-off-by: Ye Li <ye.li@nxp.com>
Ye Li [Mon, 13 Mar 2017 14:09:03 +0000 (22:09 +0800)]
MLK-14418-12 imx: mx7dsabresd: Update LCD splash screen codes
Update LCD setup codes to use the parameters structure used for all
i.mx platforms, discard to use videmode environment variable.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
3b0609ca267baaf6a78bebaccc6896e6508d1844)
(cherry picked from commit
e97965bbd8f9346d909cda433cafd04a750d9867)
Peng Fan [Tue, 7 Feb 2017 02:22:02 +0000 (10:22 +0800)]
MLK-14418-8 imx: mx7dsabresd: add epdc support
Add epdc support from v2016.03.
Add a epdc specified DTS file for using epdc
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
ab2f9e136f5da034a8335dc8ca276a54367132e8)
(cherry picked from commit
ccfa28aec4093ac30a9b76d973f0288ab9c8f92c)
Peng Fan [Tue, 7 Feb 2017 01:44:16 +0000 (09:44 +0800)]
MLK-14418-7 imx: mx7dsabresd: add FEC DM support
Add FEC2 and convert to use FEC DM driver.
Add board rev check.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
0137915ed40e2da5a6de4d30574d08e2bf3a0363)
(cherry picked from commit
a9678f16455526b171a7d7118ba5865336964477)
Ye Li [Tue, 7 May 2019 10:51:04 +0000 (03:51 -0700)]
MLK-21851 mxs_nand: Update compatible string for i.MX6SX
The iMX6SX uses compatible string "fsl,imx6sx-gpmi-nand" for gpmi
node in DTS, so update the driver for the string
Signed-off-by: Ye Li <ye.li@nxp.com>
Ye.Li [Mon, 13 Apr 2015 09:18:14 +0000 (17:18 +0800)]
MLK-10647 armv7: Fix Dcache disable issue on i.MX7
The issue on the i.MX7D is that, there is one cache-able memory access
between the L1 and L2 cache flush by calling the flush_dache_all->
v7_maint_dcache_all() [Flush L1 and L2 cache) which written in the C code.
L1-cache-flush -> This will flush L1 cache to L2 cache in the end.
Cache-able memory access -> This will have the chance cause the L1 line-fill
with dirty data from L2 cache(L1 cache-line dirty,
L2 clean)
L2-cache-flush -> This will only flush L2 cache to L3, but still
some dirty data on the L1 cacheline.
After C & M bit clean, -> The dirty data on the L1 cache line lost, which will
cause memory coherent issue if that dirty cache line
has some useful data
This patch should works fine on the i.MX6 and i.MX7.
The second cache flush have zero impact on the i.MX6, but this is really need for
the i.MX7D platform due to the L1 line-fill during the first dcache_flush.
And the second flush will not bring in the L1 dirty cache line due to the C bit is
clear now, which means the dcache is disabled.
Acked-by: Jason Liu<r64343@freescale.com>
Reviewed-by: Jason Liu<r64343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit
f5d5f07fba936c4bb05c887de9d72fb75b3dc0f2)
(cherry picked from commit
86c784cf4c4b633d37a76de7d47155c08f75dc82)
(cherry picked from commit
d85cd484e6825631aa1ab572e5e0539f2191d795)
(cherry picked from commit
2b29c1873c2293abe1c4b361392521223b9c9ecf)
(cherry picked from commit
3eaf56494f3000f841531e8c219cf3dd9ca024f7)
(cherry picked from commit
fd1ecbfba9ba0fb52a757a70a2fcbeb325508be2)
Peng Fan [Tue, 23 Feb 2016 02:12:20 +0000 (10:12 +0800)]
MLK-12425-6: mx7: add epdc qos settings
This EPDC/EPXP QoS setting is needed for EPDC stress test to pass.
Signed-off-by: Robby Cai <r63905@freescale.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit
1b32518d1c27f05eb84a4cb93594710354b2e343)
(cherry picked from commit
8fd2dbe9097b09715f84e1c0c17dcd6a6351fb35)
(cherry picked from commit
a92a02f984aa7871aa5bb1a83e0e3f444796fedd)
Peng Fan [Thu, 19 Mar 2015 02:10:07 +0000 (10:10 +0800)]
MLK-10774-2 HDMI: splash screen function enhancement
-Change HDMI video mode to VGA.
-Add pixel clock fraction part setting in IPU driver,
fix video mode timing issue.
-Add overflow state clear workaround,
fix kernel hang in HDMI driver issue.
-Correct IPU clock to 264MHz.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
5028519b434d5dfbe53c48ac4b115ff8b69bbac7)
(cherry picked from commit
8dcbd43b971616fb67dc3b2af32e2d33f68ed0ce)
(cherry picked from commit
46b20bec72b53f10c1edf0bd8add5b356fbd7c42)
Liu Ying [Mon, 27 Apr 2015 10:07:47 +0000 (18:07 +0800)]
MLK-10747-2 video: ipu: Enable/disable LDB_DI clock when necessary
This patch adds enable/disable hooks support for ldb_di[0/1] clocks
and enables/disables them when necessary.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit
615d4c51679a6c2ee0ed4c5e3922eec76646eef1)
(cherry picked from commit
152192507c3bbaba093783d7da32b88327705c63)
(cherry picked from commit
036b71e1cd77ddb1827fd85eb7035fb7eccb7b12)
(cherry picked from commit
1e926d675270d5cbac604632319849e897c32048)
Liu Ying [Tue, 28 Apr 2015 06:20:44 +0000 (14:20 +0800)]
MLK-10747-1 video: ipu: Build ldb_di clock relevant code only for MX6 and MX53
The LDB is found in MX6 variants and MX53, so this patch makes the ldb_di clock
relevant code be built only for them.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit
3e40c7466ae7d1d6ca74011bfe69ae059d412a3b)
(cherry picked from commit
0c47d4138fd2fe8aa864160e23428b2ef95f16ae)
(cherry picked from commit
a59c901317e70da111b426db1be77f289eccbcbc)
(cherry picked from commit
e83a985b7170446b753f96e71f45bfaa67b53b08)
Han Xu [Thu, 14 Dec 2017 22:33:51 +0000 (16:33 -0600)]
MLK-17656: mtd: qspi: support read the flag status in fspi driver
support to read the flag status in driver to avoid the spi-nor framework
wait_for_ready hang issue.
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit
767faa948d2d140b6d56ee505f81f8f57c045a3d)
(cherry picked from commit
55e83ccb588c3e953f55148161bc524b5dab7a25)
Ye Li [Wed, 10 May 2017 14:52:42 +0000 (09:52 -0500)]
MLK-14878 qspi: Fix issue when enabling DDR mode
There are two problems in enabling DDR mode in this new driver:
1. The TDH bits in FLSHCR register should be set to 1. Otherwise, the TX DDR delay logic
won't be enabled. Since u-boot driver does not have DDR commands in LUT. So this won't
cause explicit problem.
2. When doing read/write/readid/erase operations, the MCR register is overwritten, the bits
like DDR_EN are cleared during these operations. When we using DDR mode QSPI boot, the TDH bit
is set to 1 by ROM. if the DDR_EN is cleared, there is no clk2x output for TX data shift.
So these operations will fail.
The explicit problem is users may get "SF: unrecognized JEDEC id bytes: ff, ff, ff" error
after using DDR mode QSPI boot on 6UL/ULL EVK boards.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
16270556212e6c7422e87f69572c90f1afe6998b)
(cherry picked from commit
1c84e2e3ceeb0c7dce3d5a8b139e7ef6d56725bf)
Ye Li [Mon, 6 May 2019 08:58:10 +0000 (01:58 -0700)]
MLK-13450-16 fsl_qspi: Update changes for mx7ulp
The mx7ulp has small TX/RX FIFO (64Bytes) and AHB buffer size (128Bytes)
than other i.MX. Change some parameters for it.
Also found when the DDR_EN bit is set, sometime the page programming will fail
during large data programming. The 64 bytes data is not programmed into flash.
But when DDR_EN is clear, there is no such issue. Suspect this is a IC issue.
We have disable the DDR_EN for mx7ulp.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
5a69ddb7e9886e082da42ddf673415702975ee60)
Ye Li [Fri, 5 Jan 2018 02:55:03 +0000 (20:55 -0600)]
MLK-17345 mxc_ocotp: Update redundancy banks for mx7ulp B0
On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to
Redundancy mode not ECC, so they can support to program different bits of
a word in multiple times.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
af901cae281a617063559f60761ad4e912fccd5f)
(cherry picked from commit
fe82358d1b881acb7a89d2e17036acf78d49e931)
Ye Li [Wed, 9 Mar 2016 12:59:43 +0000 (20:59 +0800)]
MLK-12527-1 mxc_keyb: Add MXC keyboard driver
The i.MX6SL EVK needs this driver in android fastboot support. Add
this driver to u-boot.
To use the driver, user must define:
CONFIG_MXC_KPD Enable the driver
CONFIG_MXC_KEYMAPPING Key mapping matrix
CONFIG_MXC_KPD_COLMAX The column size of key mapping matrix
CONFIG_MXC_KPD_ROWMAX The row size of the key mapping matrix
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
5096e572667ff41217deb4ba9b1bd15e93fa6b59)
(cherry picked from commit
e84160eaf5c057da45a227039c6f8a7911f43a82)
(cherry picked from commit
7f8757016e97adeacba256bd0cb6ad8882f6a51e)
Ye Li [Tue, 27 Mar 2018 07:45:10 +0000 (00:45 -0700)]
MLK-14930-2 dwc_ahsata: Fix memory issue in reset_sata
The reset_sata should reset the sata device info and free the probe_ent
memory. Otherwise, it will cause memory leak if we init the sata again.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
148488728486137a790a89e9b869cc938c3e0c57)
Ye Li [Tue, 27 Mar 2018 07:56:19 +0000 (00:56 -0700)]
MLK-14930-1 cmd: sata: Fix sata init and stop issue
When sata stop is executed, the sata_curr_device is not reset to -1, so
any following sata commands will not initialize the sata again and cause
problem.
Additional, in sata init implementation, the sata_curr_device should be updated,
otherwise sata will be initialized again when doing other sata commands like
read/write/info/part/device.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
9bccfd01c618a5d059f332c000c42e5bf39880d9)
Ye Li [Fri, 28 Apr 2017 14:36:57 +0000 (09:36 -0500)]
MLK-14938-22 mxc_gpio: Change to get value from DR register
Currently the driver gets value from PSR register, but this register
is only for input mode. For output mode, it always return 0 not the
value we set for output.
This patch changes to use DR register, which returns the DR value for
output mode, and PSR value for input mode.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
4afc3f90943c6b117f79b66d2cd04e64f437b0c2)
(cherry picked from commit
8cca3efba0d508b2c267f8a32b302970dd05244d)
Ye.Li [Wed, 11 Jun 2014 08:21:29 +0000 (16:21 +0800)]
ENGR00315894-60 GPIO: Modify driver mxc_gpio to support RDC Semaphores
For GPIO group which shared by multiple masters, it may set in RDC
to shared and semaphore required. Before access the GPIO register,
the GPIO driver must get the RDC semaphore, and release the semaphore
after the GPIO register access.
When CONFIG_MXC_RDC is set, the features related to RDC semaphores
is enabled in mxc_gpio driver.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit
84d63e2e2ce12f714e88baad8b2325684614a7c1)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
drivers/gpio/mxc_gpio.c
(cherry picked from commit
c9943b9c8a78bb2c9886bfe582e82978387d8dee)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit
faf94726cac8316c4342e19936f1e03ef283ace3)
(cherry picked from commit
6c0474fe0e4fc543c62b22c05c2702a881f56418)
(cherry picked from commit
7cd5fec7ce6a9ecfdaa1a9c1aaaa0d0ac18a4f86)
(cherry picked from commit
74d68c1b9f098c44992d591616372f0ec5ff13dd)
Ye Li [Tue, 4 Apr 2017 16:24:46 +0000 (00:24 +0800)]
MLK-14608 fsl_esdhc: Fix wp_enable issue
The wp-gpios property is used for gpio, if this is set, the WP pin is muxed
to gpio function, can't be used as internal WP checking.
This patch changes to examine the "fsl,wp-controller" for using internal WP checking. And
wp-gpios for using gpio pin.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit
733a7fde6fea35d6f2ea18c7759a06904b655e54)
(cherry picked from commit
9da605be6d73b8fca627cdd272fce51bdc4c0b6d)
Peng Fan [Tue, 23 Feb 2016 04:43:10 +0000 (12:43 +0800)]
MLK-12434-1: imx: dynamic setting mmcdev and mmcroot
Align to imx_v2015.04, dynamic setting mmcdev and mmcroot.
Then when boot linux, we can have correct "root=/dev/mmcblk[x]p2"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit
b46b99a901eb194e81fc4836ee2259ad8857f4d3)
(cherry picked from commit
6f6a828fbe7478efd5932c302e6368877107bbca)
(cherry picked from commit
bb628be4e993e98fb2fe8fc6af7b16e706d0f32d)
Ye.Li [Wed, 11 Jun 2014 07:34:49 +0000 (15:34 +0800)]
ENGR00315894-55 iMX6SX: add debug monitor support
Debug monitor will print out last failed AXI access info when
system reboot is caused by AXI access failure, only works when
debug monitor is enabled.
Enable this module on i.MX6SX.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit
df6ac8531d498021ed379c74fc1847bd2cec7179)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit
4f4ecdbf6fe2673b8ad117df1a4974bdb7e6aa4a)
(cherry picked from commit
e1c98a672e50fd0405686b74dad50680a75a8a9f)
(cherry picked from commit
5265a3052505fae2a212af292412a62b20a16f97)
Ye.Li [Thu, 12 Jun 2014 11:47:27 +0000 (19:47 +0800)]
ENGR00315894-81 gis: Add gis module
Add gis module, current gis is support vadc input.
Add power down function to lcdif driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit
a007b00dd8ef9f773dfdebef0b1deb0990281793)
(cherry picked from commit
a31dcdafb0963381e7213c59f79a340ef27ec2e2)
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02dfe2e4af5f51d39a51542fb0e81f93faf505bc)
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a8e94954d8ccc44c41d77a5e356d6a99b3d45649)
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0864a17afbc93fed72273c7d7d3be0fc8681e794)
Ye.Li [Thu, 12 Jun 2014 11:40:53 +0000 (19:40 +0800)]
ENGR00315894-80 pxp: Add pxp module
Add pxp module.
Support csc between YUV444 and RGB888 and scaling.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit
4c6e1f9ed1b2f5c98a34502b44b6414593fdd290)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit
92295fafcdbaa3a3fe0a63ede15f896dfc9ce0b0)
(cherry picked from commit
096a63e81a8c78b3f8bbc65a9d418aa032d62231)
(cherry picked from commit
b24cce0ad3ec9f386ca7aa231d8a2db33462f092)
(cherry picked from commit
40c2e2c2160ac23f89a682c965ebea6488b8bffc)
Ye.Li [Thu, 12 Jun 2014 11:39:16 +0000 (19:39 +0800)]
ENGR00315894-79 csi: Add csi module
Add csi module.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit
854ae26758ec8132ef749b98645dd2f43b84e5e2)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit
5f133bd9420109951fd03bd5168801327e929c3b)
(cherry picked from commit
16960e59fa3334162d2e2212ee4bc1e7f0c420a3)
(cherry picked from commit
bc0639ed8f5069f198067916caf088908492329d)
(cherry picked from commit
c7232ae1c27ef561d2235bb4db837ef9805f86d2)
(cherry picked from commit
039bb76082a16b0e43e818a4d9df68ab4320ede5)
Ye.Li [Thu, 12 Jun 2014 11:37:19 +0000 (19:37 +0800)]
ENGR00315894-78 vadc: Add vadc module
Add vadc module.
Both PAL and NTSC mode can work.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit
03c31ae30c1e81c99f6824221e4801433445e04a)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit
b5d776ffc1519c16091736445b3217ffb7fcd7db)
(cherry picked from commit
2377eb9fd299b76888f11faf76383b68e77bcc8a)
(cherry picked from commit
808d447235bd0f9134c7d00fa480cd55b4e0426e)
(cherry picked from commit
99977a1152981247a84252dba1d1cf55c0406b08)
Ye Li [Mon, 26 Mar 2018 08:56:39 +0000 (01:56 -0700)]
ENGR00315894-77 mx6: soc: Add vadc power up/down function
Add vadc power up/down function.
When gis enable in uboot, the CSI0 input mux select setting
to vadc module, clean the bit when gis disabled
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit
e0cfa889531d0a2587fb1fc607fffcc9599a2f4e)